improve language for verilog

2 files changed, 60 insertions, 15 deletions

diff --git a/xmake/rules/iverilog/xmake.lua b/xmake/rules/iverilog/xmake.lua
index 2a0d392d1..4295d1625 100644
--- a/xmake/rules/iverilog/xmake.lua
+++ b/xmake/rules/iverilog/xmake.lua
@@ -44,33 +44,33 @@ rule("iverilog.binary")
 
         -- get languages
         --
-        -- Select  the  Verilog language generation to support in the compiler.
-        -- This selects between IEEE1364-1995, IEEE1364-2001, IEEE1364-2005, IEEE1800-2005, IEEE1800-2009, IEEE1800-2012.
+        -- Select the Verilog language generation to support in the compiler.
+        -- This selects between v1364-1995, v1364-2001, v1364-2005, v1800-2005, v1800-2009, v1800-2012.
         --
-        local language_ieee
+        local language_v
         local languages = target:get("languages")
         if languages then
             for _, language in ipairs(languages) do
-                if language:startswith("IEEE") then
-                    language_ieee = language
+                if language:startswith("v") then
+                    language_v = language
                     break
                 end
             end
         end
-        if language_ieee then
+        if language_v then
             local maps = {
-                ["IEEE1364-1995"] = "-g1995",
-                ["IEEE1364-2001"] = "-g2001",
-                ["IEEE1364-2005"] = "-g2005",
-                ["IEEE1800-2005"] = "-g2005-sv",
-                ["IEEE1800-2009"] = "-g2009",
-                ["IEEE1800-2012"] = "-g2012",
+                ["v1364-1995"] = "-g1995",
+                ["v1364-2001"] = "-g2001",
+                ["v1364-2005"] = "-g2005",
+                ["v1800-2005"] = "-g2005-sv",
+                ["v1800-2009"] = "-g2009",
+                ["v1800-2012"] = "-g2012",
             }
-            local flag = maps[language_ieee]
+            local flag = maps[language_v]
             if flag then
                 table.insert(argv, flag)
             else
-                assert("unknown language(%s) for iverilog!", language_ieee)
+                assert("unknown language(%s) for iverilog!", language_v)
             end
         else
             local extension = path.extension(sourcefiles[1])
diff --git a/xmake/rules/verilator/verilator.lua b/xmake/rules/verilator/verilator.lua
index fb7025baa..2314bad23 100644
--- a/xmake/rules/verilator/verilator.lua
+++ b/xmake/rules/verilator/verilator.lua
@@ -66,6 +66,43 @@ function _get_sourcefiles_from_cmake(target, cmakefile)
     return sourcefiles
 end
 
+-- get languages
+--
+-- Select the Verilog language generation to support in the compiler.
+-- This selects between v1364-1995, v1364-2001, v1364-2005, v1800-2005, v1800-2009, v1800-2012.
+--
+function _get_lanuage_flags(target)
+    local language_v
+    local languages = target:get("languages")
+    if languages then
+        for _, language in ipairs(languages) do
+            if language:startswith("v") then
+                language_v = language
+                break
+            end
+        end
+    end
+    if language_v then
+        local maps = {
+            -- Verilog
+            ["v1364-1995"] = "+1364-1995ext+v",
+            ["v1364-2001"] = "+1364-2001ext+v",
+            ["v1364-2005"] = "+1364-2005ext+v",
+            -- SystemVerilog
+            ["v1800-2005"] = "+1800-2005ext+v",
+            ["v1800-2009"] = "+1800-2009ext+v",
+            ["v1800-2012"] = "+1800-2012ext+v",
+            ["v1800-2017"] = "+1800-2017ext+v",
+        }
+        local flag = maps[language_v]
+        if flag then
+            return flag
+        else
+            assert("unknown language(%s) for verilator!", language_v)
+        end
+    end
+end
+
 function config(target)
     local toolchain = assert(target:toolchain("verilator"), 'we need set_toolchains("verilator") in target("%s")', target:name())
     local verilator = assert(toolchain:config("verilator"), "verilator not found!")
@@ -150,7 +187,7 @@ endmodule]])
         end
     end
     if not cxxlang then
-        target:set("languages", "c++20")
+        target:add("languages", "c++20")
     end
 
     -- add defines for switches
@@ -180,6 +217,10 @@ function build_cppfiles(target, batchjobs, sourcebatch, opt)
         if flags then
             table.join2(argv, flags)
         end
+        local language_flags = _get_lanuage_flags(target)
+        if language_flags then
+            table.join2(argv, language_flags)
+        end
         local sourcefiles = sourcebatch.sourcefiles
         for _, sourcefile in ipairs(sourcefiles) do
             progress.show(opt.progress or 0, "${color.build.object}compiling.verilog %s", sourcefile)
@@ -231,6 +272,10 @@ function buildcmd_vfiles(target, batchcmds, sourcebatch, opt)
     if flags then
         table.join2(argv, flags)
     end
+    local language_flags = _get_lanuage_flags(target)
+    if language_flags then
+        table.join2(argv, language_flags)
+    end
     local sourcefiles = sourcebatch.sourcefiles
     for _, sourcefile in ipairs(sourcefiles) do
         batchcmds:show_progress(opt.progress, "${color.build.object}compiling.verilog %s", sourcefile)