diff options
| author | Anup Patel <[email protected]> | 2019-03-30 17:43:23 +0530 |
|---|---|---|
| committer | Anup Patel <[email protected]> | 2019-04-01 10:10:38 +0530 |
| commit | 13877c3a6752138018f99214273dc3d7376cf5eb (patch) | |
| tree | db38165d1c2bba5e8f1e3149792bfef611be0c30 | |
| parent | cfff0126ab80d8c53e55f6eaae1a59e08159160b (diff) | |
include: Rename sbi_unpriv.h to riscv_unpriv.h
The sbi_unpriv.h has quite a few load_xyz() and store_xyz() helper
routines based on RISC-V inline assembly for unpriviledged accesses
from M-mode. These helper routines are similar to helper routines
present in riscv_locks.h, riscv_io.h, and riscv_atomic.h so let's
rename sbi_unpriv.h to riscv_unpriv.h.
Signed-off-by: Anup Patel <[email protected]>
| -rw-r--r-- | include/sbi/riscv_unpriv.h (renamed from include/sbi/sbi_unpriv.h) | 4 | ||||
| -rw-r--r-- | lib/sbi_illegal_insn.c | 2 | ||||
| -rw-r--r-- | lib/sbi_ipi.c | 2 | ||||
| -rw-r--r-- | lib/sbi_misaligned_ldst.c | 2 |
4 files changed, 5 insertions, 5 deletions
diff --git a/include/sbi/sbi_unpriv.h b/include/sbi/riscv_unpriv.h index 2d9dbb97..c1094176 100644 --- a/include/sbi/sbi_unpriv.h +++ b/include/sbi/riscv_unpriv.h @@ -7,8 +7,8 @@ * Anup Patel <[email protected]> */ -#ifndef __SBI_UNPRIV_H__ -#define __SBI_UNPRIV_H__ +#ifndef __RISCV_UNPRIV_H__ +#define __RISCV_UNPRIV_H__ #include <sbi/riscv_encoding.h> #include <sbi/sbi_bits.h> diff --git a/lib/sbi_illegal_insn.c b/lib/sbi_illegal_insn.c index 58567f46..820f96c5 100644 --- a/lib/sbi_illegal_insn.c +++ b/lib/sbi_illegal_insn.c @@ -9,12 +9,12 @@ #include <sbi/riscv_asm.h> #include <sbi/riscv_encoding.h> +#include <sbi/riscv_unpriv.h> #include <sbi/sbi_bits.h> #include <sbi/sbi_emulate_csr.h> #include <sbi/sbi_error.h> #include <sbi/sbi_illegal_insn.h> #include <sbi/sbi_trap.h> -#include <sbi/sbi_unpriv.h> typedef int (*illegal_insn_func)(ulong insn, u32 hartid, ulong mcause, diff --git a/lib/sbi_ipi.c b/lib/sbi_ipi.c index 609de0df..471b5939 100644 --- a/lib/sbi_ipi.c +++ b/lib/sbi_ipi.c @@ -11,13 +11,13 @@ #include <sbi/riscv_asm.h> #include <sbi/riscv_barrier.h> #include <sbi/riscv_atomic.h> +#include <sbi/riscv_unpriv.h> #include <sbi/sbi_hart.h> #include <sbi/sbi_bitops.h> #include <sbi/sbi_console.h> #include <sbi/sbi_ipi.h> #include <sbi/sbi_platform.h> #include <sbi/sbi_timer.h> -#include <sbi/sbi_unpriv.h> static int sbi_ipi_send(struct sbi_scratch *scratch, u32 hartid, u32 event, void *data) diff --git a/lib/sbi_misaligned_ldst.c b/lib/sbi_misaligned_ldst.c index f1df3f02..3fe67ea6 100644 --- a/lib/sbi_misaligned_ldst.c +++ b/lib/sbi_misaligned_ldst.c @@ -9,11 +9,11 @@ #include <sbi/riscv_asm.h> #include <sbi/riscv_encoding.h> +#include <sbi/riscv_unpriv.h> #include <sbi/riscv_fp.h> #include <sbi/sbi_error.h> #include <sbi/sbi_misaligned_ldst.h> #include <sbi/sbi_trap.h> -#include <sbi/sbi_unpriv.h> union reg_data { u8 data_bytes[8]; |