diff options
| author | Anup Patel <[email protected]> | 2019-03-30 18:43:49 +0530 |
|---|---|---|
| committer | Anup Patel <[email protected]> | 2019-04-01 10:10:38 +0530 |
| commit | 78c87cd13a75c167a693b173e6e2e0e44ad57328 (patch) | |
| tree | 8b851a9fd84add28837ef4480f88f25a67b3f2a0 | |
| parent | 13877c3a6752138018f99214273dc3d7376cf5eb (diff) | |
include: Make mstatus parameter optional for get_insn()
The mstatus parameter of get_insn() is used to return MSTATUS CSR
value which get_insn() saw. Most of the get_insn() callers don't
use the value returned in mstatus so this patch makes mstatus
parameter optional for get_insn().
Signed-off-by: Anup Patel <[email protected]>
| -rw-r--r-- | include/sbi/riscv_unpriv.h | 7 | ||||
| -rw-r--r-- | lib/sbi_illegal_insn.c | 7 | ||||
| -rw-r--r-- | lib/sbi_misaligned_ldst.c | 6 |
3 files changed, 8 insertions, 12 deletions
diff --git a/include/sbi/riscv_unpriv.h b/include/sbi/riscv_unpriv.h index c1094176..bd134b5b 100644 --- a/include/sbi/riscv_unpriv.h +++ b/include/sbi/riscv_unpriv.h @@ -82,7 +82,7 @@ static inline ulong get_insn(ulong mepc, ulong *mstatus) #endif "csrw "STR(CSR_MSTATUS)", %[mstatus]" : [mstatus] "+&r" (__mstatus), [insn] "=&r" (val) - : [mprv] "r" (MSTATUS_MPRV | MSTATUS_MXR), [addr] "r" (__mepc)); + : [mprv] "r" (MSTATUS_MPRV|MSTATUS_MXR), [addr] "r" (__mepc)); #else ulong rvc_mask = 3, tmp; asm ("csrrs %[mstatus], "STR(CSR_MSTATUS)", %[mprv]\n" @@ -107,10 +107,11 @@ static inline ulong get_insn(ulong mepc, ulong *mstatus) "add %[insn], %[insn], %[tmp]\n" "2: csrw "STR(CSR_MSTATUS)", %[mstatus]" : [mstatus] "+&r" (__mstatus), [insn] "=&r" (val), [tmp] "=&r" (tmp) - : [mprv] "r" (MSTATUS_MPRV | MSTATUS_MXR), [addr] "r" (__mepc), + : [mprv] "r" (MSTATUS_MPRV|MSTATUS_MXR), [addr] "r" (__mepc), [rvc_mask] "r" (rvc_mask), [xlen_minus_16] "i" (__riscv_xlen - 16)); #endif - *mstatus = __mstatus; + if (mstatus) + *mstatus = __mstatus; return val; } diff --git a/lib/sbi_illegal_insn.c b/lib/sbi_illegal_insn.c index 820f96c5..7184feab 100644 --- a/lib/sbi_illegal_insn.c +++ b/lib/sbi_illegal_insn.c @@ -122,14 +122,11 @@ int sbi_illegal_insn_handler(u32 hartid, ulong mcause, struct sbi_trap_regs *regs, struct sbi_scratch *scratch) { - ulong mstatus; ulong insn = csr_read(mbadaddr); if (unlikely((insn & 3) != 3)) { - if (insn == 0) { - mstatus = csr_read(CSR_MSTATUS); - insn = get_insn(regs->mepc, &mstatus); - } + if (insn == 0) + insn = get_insn(regs->mepc, NULL); if ((insn & 3) != 3) return truly_illegal_insn(insn, hartid, mcause, regs, scratch); diff --git a/lib/sbi_misaligned_ldst.c b/lib/sbi_misaligned_ldst.c index 3fe67ea6..5b2df939 100644 --- a/lib/sbi_misaligned_ldst.c +++ b/lib/sbi_misaligned_ldst.c @@ -26,8 +26,7 @@ int sbi_misaligned_load_handler(u32 hartid, ulong mcause, struct sbi_scratch *scratch) { union reg_data val; - ulong mstatus = csr_read(CSR_MSTATUS); - ulong insn = get_insn(regs->mepc, &mstatus); + ulong insn = get_insn(regs->mepc, NULL); ulong addr = csr_read(CSR_MTVAL); int i, fp = 0, shift = 0, len = 0; @@ -112,8 +111,7 @@ int sbi_misaligned_store_handler(u32 hartid, ulong mcause, struct sbi_scratch *scratch) { union reg_data val; - ulong mstatus = csr_read(CSR_MSTATUS); - ulong insn = get_insn(regs->mepc, &mstatus); + ulong insn = get_insn(regs->mepc, NULL); ulong addr = csr_read(CSR_MTVAL); int i, len = 0; |