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authorAtish Patra <[email protected]>2019-11-24 23:33:48 -0800
committerAnup Patel <[email protected]>2019-12-23 09:12:16 +0530
commit94072025325b639d603f428366b53b470e625f64 (patch)
tree69fde845727dda8f86c32eb34b5450009616ce0d /include
parent9777aeef41a613b3c27056a695d4d6007760b3a8 (diff)
lib: Add hfence instruction encoding
Currently, the toolchains do not have support for hfence instruction. Hence, the instruction are hardcode until we have toolchain support. Signed-off-by: Atish Patra <[email protected]> Reviewed-by: Anup Patel <[email protected]>
Diffstat (limited to 'include')
-rw-r--r--include/sbi/sbi_hfence.h36
1 files changed, 36 insertions, 0 deletions
diff --git a/include/sbi/sbi_hfence.h b/include/sbi/sbi_hfence.h
new file mode 100644
index 00000000..824a8d60
--- /dev/null
+++ b/include/sbi/sbi_hfence.h
@@ -0,0 +1,36 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2019 Western Digital Corporation or its affiliates.
+ *
+ * Authors:
+ * Atish Patra <[email protected]>
+ * Anup Patel <[email protected]>
+ */
+
+#ifndef __SBI_FENCE_H__
+#define __SBI_FENCE_H__
+/** Invalidate Stage2 TLBs for given VMID and guest physical address */
+void __sbi_hfence_gvma_vmid_gpa(unsigned long vmid, unsigned long gpa);
+
+/** Invalidate Stage2 TLBs for given VMID */
+void __sbi_hfence_gvma_vmid(unsigned long vmid);
+
+/** Invalidate Stage2 TLBs for given guest physical address */
+void __sbi_hfence_gvma_gpa(unsigned long gpa);
+
+/** Invalidate all possible Stage2 TLBs */
+void __sbi_hfence_gvma_all(void);
+
+/** Invalidate unified TLB entries for given asid and guest virtual address */
+void __sbi_hfence_vvma_asid_va(unsigned long asid, unsigned long va);
+
+/** Invalidate unified TLB entries for given ASID for a guest*/
+void __sbi_hfence_vvma_asid(unsigned long asid);
+
+/** Invalidate unified TLB entries for a given guest virtual address */
+void __sbi_hfence_vvma_va(unsigned long va);
+
+/** Invalidate all possible Stage2 TLBs */
+void __sbi_hfence_vvma_all(void);
+#endif