diff options
| author | Pawandeep Oza <[email protected]> | 2026-07-21 14:48:29 -0700 |
|---|---|---|
| committer | Anup Patel <[email protected]> | 2026-07-22 13:20:20 +0530 |
| commit | b2ead3b037c0b864b0770891586d121c0dc68761 (patch) | |
| tree | e571489573e30dfa54271ea5273efc3f9d16f931 /lib/utils/cppc/fdt_cppc.c | |
| parent | 193b1d9e7ecb06c6a374665bcc177f6997a58505 (diff) | |
lib: utils/irqchip/imsic: track IRQ enable state and restore EIE on warm init
Add an irq_state field to struct sbi_irqchip_hwirq_data with a single
IRQ_ENABLED flag (bit 0) to track whether a hardware interrupt has been
enabled via the irqchip framework. Set IRQ_ENABLED in
sbi_irqchip_unmask_hwirq() when the unmask callback is invoked.
Add sbi_irqchip_get_irq_state() as a private inline accessor and expose
sbi_irqchip_is_irq_enabled() as a public API for drivers to query the
enabled state of a hardware interrupt by chip pointer and hwirq number.
Refactor imsic_local_eix_update() to operate on a single interrupt ID
instead of a base+count range, simplifying the CSR bit manipulation to
a direct BIT(id) write without the inner loop. Update all call sites
accordingly.
Use sbi_irqchip_is_irq_enabled() in imsic_warm_irqchip_init() to
restore per-EIID EIE CSR state on warm boot and HSM resume based on
the saved irq_state, replacing the previous blanket disable of all
interrupts. This ensures that EIIDs enabled during hotplug/warminit
cycle are correctly re-enabled on the resuming hart without requiring
software to re-register or re-unmask each interrupt.
Signed-off-by: Oza Pawandeep <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Anup Patel <[email protected]>
Diffstat (limited to 'lib/utils/cppc/fdt_cppc.c')
0 files changed, 0 insertions, 0 deletions
