diff options
| author | Amanieu d'Antras <[email protected]> | 2023-10-01 10:12:02 +0100 |
|---|---|---|
| committer | Anup Patel <[email protected]> | 2023-10-09 13:53:20 +0530 |
| commit | ec0559eb315bd11a5ef8865a8a8fa91ab6888250 (patch) | |
| tree | b154ae11eeb53a4016cae5f7560fd7f02d88d983 /lib/utils/timer | |
| parent | 3632f2b5c43e2a01bbfdcf4864d358845dcf281e (diff) | |
lib: sbi_misaligned_ldst: Fix handling of C.SWSP and C.SDSP
Unlike C.LWSP/C.LDSP, these encodings can be used with the zero
register, so checking that the rs2 field is non-zero is unnecessary.
Additionally, the previous check was incorrect since it was checking
the immediate field of the instruction instead of the rs2 field.
Signed-off-by: Amanieu d'Antras <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
Diffstat (limited to 'lib/utils/timer')
0 files changed, 0 insertions, 0 deletions