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The MSWI present in the MIPS P8700 is compliant with the ACLINT
specification, so add a dedicated compatible string for it.
Signed-off-by: Benoît Monin <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Anup Patel <[email protected]>
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The fdt_ipi_init() is already called from generic_early_init() so
let's convert IPI drivers as early drivers.
Signed-off-by: Anup Patel <[email protected]>
Reviewed-by: Samuel Holland <[email protected]>
Tested-by: Nick Hu <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Anup Patel <[email protected]>
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A platform can have multiple IPI devices (such as ACLINT MSWI,
AIA IMSIC, etc). Currently, OpenSBI rely on platform calling
the sbi_ipi_set_device() function in correct order and prefer
the first avaiable IPI device which is fragile.
Instead of the above, introduce IPI device rating and prefer
the highest rated IPI device. This further allows extending
the sbi_ipi_raw_clear() to clear all available IPI devices.
Signed-off-by: Anup Patel <[email protected]>
Tested-by: Nick Hu <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Anup Patel <[email protected]>
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The ipi driver subsystem does not need any extra data, so it can use
`struct fdt_driver` directly. The generic fdt_ipi_init() performs a
best-effort initialization of all matching DT nodes.
Signed-off-by: Samuel Holland <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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This allows the compiler to generate significantly better code, because
it does not have to maintain either the loop counter or loop limit. Plus
there are half as many symbols to relocate. This also simplifies passing
carray arrays to helper functions.
Signed-off-by: Samuel Holland <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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Now that the SBI IPI core clears IPIs at warm boot in a generic way,
none of the drivers or platforms use these hooks, and we can remove
them. Platforms need only to initialize the driver once during cold
init. If other hooks are needed in the future, they can be added to
struct sbi_ipi_device.
Signed-off-by: Samuel Holland <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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sbi_ipi_init() expects the platform warm init function to clear IPIs
on the local hart, but there is already a generic function to do this.
After this change, none of the existing drivers need a warm init
callback.
Signed-off-by: Samuel Holland <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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All existing users of this operation target the current hart, and it
seems unlikely that a future user will need to clear the pending IPI
status of a remote hart. Simplify the logic by changing .ipi_clear (and
its wrapper sbi_ipi_raw_clear()) to always operate on the current hart.
This incidentally fixes a bug introduced in commit 78c667b6fc07 ("lib:
sbi: Prefer hartindex over hartid in IPI framework"), which changed the
.ipi_clear parameter from a hartid to a hart index, but failed to update
the warm_init functions to match.
Fixes: 78c667b6fc07 ("lib: sbi: Prefer hartindex over hartid in IPI framework")
Signed-off-by: Samuel Holland <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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The sbi_domain_root_add_memrange() should be preferred for creating
multiple memregions over a range. Update ACLINT mswi driver to use
sbi_domain_root_add_memrange() instead of explicitly registering
memregions.
Signed-off-by: Anup Patel <[email protected]>
Reviewed-by: Samuel Holland <[email protected]>
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Since commit 78c667b6fc07 ("lib: sbi: Prefer hartindex over hartid in
IPI framework"), The .ipi_clear callback functions take a hart index,
not a hartid. However, these warm_init functions were never updated.
Fixes: 78c667b6fc07 ("lib: sbi: Prefer hartindex over hartid in IPI framework")
Signed-off-by: Samuel Holland <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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Indicate that none of these functions modify the devicetree by
constifying the parameter type.
Signed-off-by: Samuel Holland <[email protected]>
Reviewed-by: Andrew Jones <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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We would like to clean any files generated by the carray
scripts by just searching for the filename as the current
make system turns f.carray into f.o. Change to make the
make system turn f.carray into f.carray.o
note, command to go through .mk files changing the .o
in the .mk files is:
find . -type f -name "*.carray" | xargs -t -I fname /bin/bash -x -c ' fn=`basename -s .carray fname`; echo "$fn"; sed -i `dirname fname `/objects.mk -e s/"$fn".o/"$fn".carray.o/g'
Link: https://patchwork.ozlabs.org/project/opensbi/patch/[email protected]/
Reported-by: Ivan Orlov <[email protected]>
Suggested-by: Andrew Jones <[email protected]>
Signed-off-by: Ben Dooks <[email protected]>
Reviewed-by: Andrew Jones <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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When the dt node has a status property and the value is not ok or
okay, skip initializing ipi.
Signed-off-by: Xiang W <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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The parser will fail if the timer is clint timer and has regname
property. As the regname is only meaningful for aclint, it is more
robust to only check regname for aclint timer.
Fixes: 6112d58 ("lib: utils/fdt: Allow to use reg-names when parsing ACLINT")
Signed-off-by: Inochi Amaoto <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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The old scheme doesn't allow sending hart0 self-IPI as the
corresponding bit on pending register is hardwired to 0, this
could lead to unhandle IPIs on SMP systems, esp. on single-core.
Furthermore, the limitation of old scheme is 8-core, instead of
reserving source hart information, we assign bit (x + 1) as the
enable and pending bit of hartx, this also expands the bootable
hart number.
The following diagram shows the enable bits of the new scheme
on 32-core Andes platform.
Pending regs: 0x1000 x---0---0---0---0------0---0
Pending hart ID: 0 1 2 3 ... 30 31
Interrupt ID: 0 1 2 3 4 ... 31 32
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Enable regs: 0x2000 x---1---0---0---0-...--0---0---> hart0
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0x2080 x---0---1---0---0-...--0---0---> hart1
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0x2100 x---0---0---1---0-...--0---0---> hart2
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0x2180 x---0---0---0---1-...--0---0---> hart3
. . . . . . .
. . . . . . .
. . . . . . .
0x2f00 x---0---0---0---0-...--1---0---> hart30
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0x2f80 x---0---0---0---0-...--0---1---> hart31
<-------- word 0 -------><--- word 1 --->
To send IPI to hart0, for example, another hart (including hart0
itself) will set bit 1 of first word on the pending register.
We also fix indentation in andes_plicsw.h along with this patch.
Fixes: ce7c490719ed ("lib: utils/ipi: Add Andes fdt ipi driver support")
Signed-off-by: Leo Yu-Chi Liang <[email protected]>
Reviewed-by: Yu Chien Peter Lin <[email protected]>
Reviewed-by: Randolph <[email protected]>
Reported-by: Lad Prabhakar <[email protected]>
Link: https://lists.infradead.org/pipermail/opensbi/2023-October/005665.html
Reviewed-by: Lad Prabhakar <[email protected]>
Tested-by: Lad Prabhakar <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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Currently, there are no barriers before or after the ipi_clear()
device callback which forces ipi_clear() device callback to always
use non-relaxed MMIO writes.
Instead of above, we use wmb() in after the ipi_clear() device
callback which pairs with the wmb() done before the ipi_send()
device callback. This also allows device ipi_clear() callback
to use relaxed MMIO writes.
Signed-off-by: Anup Patel <[email protected]>
Reported-by: Bo Gan <[email protected]>
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Currently, we have a smp_wmb() between atomic_raw_set_bit() and
ipi_send() device callback whereas the MMIO writes done by the
device ipi_send() callback will also include a barrier.
We can avoid unnecessary/redundant barriers described above by
allowing relaxed MMIO writes in device ipi_send() callback. To
achieve this, we simply use wmb() instead of smp_wmb() before
calling device ipi_send().
Signed-off-by: Anup Patel <[email protected]>
Reported-by: Bo Gan <[email protected]>
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Like the mtimer of T-HEAD C9xx clint, the mswi also needs new compatible
string to avoid misuse.
Signed-off-by: Inochi Amaoto <[email protected]>
Link: https://lore.kernel.org/linux-riscv/1f6b82a1864477a51db33d3f295889ff985b497b.1696433229.git.unicorn_wang@outlook.com/
Reviewed-by: Guo Ren <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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This patch adds unspecified permission flags for the PLICSW region
and updates the permission of the PLMT region.
With this update, both regions will become M-mode only read/write
regions in the root domain.
Domain0 Region00: 0x00000000f0300000-0x00000000f0300fff M: (I,R,W) S/U: (R,W)
Domain0 Region01: 0x0000000000040000-0x000000000005ffff M: (R,W) S/U: ()
Domain0 Region02: 0x0000000000000000-0x000000000003ffff M: (R,X) S/U: ()
> Domain0 Region03: 0x00000000e6000000-0x00000000e60fffff M: (I,R,W) S/U: ()
> Domain0 Region04: 0x00000000e6400000-0x00000000e67fffff M: (I,R,W) S/U: ()
Domain0 Region05: 0x0000000000000000-0xffffffffffffffff M: () S/U: (R,W,X)
The PMP rules of AE350-AX65 (single-core) w/ Smepmp:
p/x $pmpcfg0
$1 = {0x1f9b9b9d9b1e00,
pmp0cfg = {0x0},
L--AAXWR
pmp1cfg = {0x1e} (00011110), pmpaddr1: 0xf0300000 ~ 0xf0300fff (UART1)
pmp2cfg = {0x9b} (10011011), pmpaddr2: 0x40000 ~ 0x5ffff
pmp3cfg = {0x9d} (10011101), pmpaddr3: 0x0 ~ 0x3ffff
pmp4cfg = {0x9b} (10011011), pmpaddr4: 0xe6000000 ~ 0xe60fffff (PLMT)
pmp5cfg = {0x9b} (10011011), pmpaddr5: 0xe6400000 ~ 0xe67fffff (PLICSW)
pmp6cfg = {0x1f} (00011111), pmpaddr6: 0x0 ~ 0xffffffffff
pmp7cfg = {0x0 }}
The PMP rules of AE350-AX45MP (qual-core) w/o Smepmp:
p/x $pmpcfg0
$1 = {0x1f181818181b,
L--AAXWR
pmp0cfg = {0x1b}, (00011011), pmpaddr0: 0xf0300000 ~ 0xf0300fff (UART1)
pmp1cfg = {0x18}, (00011000), pmpaddr1: 0x40000 ~ 0x5ffff
pmp2cfg = {0x18}, (00011000), pmpaddr2: 0x0 ~ 0x3ffff
pmp3cfg = {0x18}, (00011000), pmpaddr3: 0xe6000000 ~ 0xe60fffff (PLMT)
pmp4cfg = {0x18}, (00011000), pmpaddr4: 0xe6400000 ~ 0xe67fffff (PLICSW)
pmp5cfg = {0x1f}, (00011111), pmpaddr5: 0x0 ~ 0x1ffffffff
pmp6cfg = {0x0 }}
Note that starting from this patch, we restrict the S/U-mode read
permission to the PLMT region, since we should read the TIME CSR
in a lower privilege mode.
Signed-off-by: Yu Chien Peter Lin <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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Let us prefer hartindex over hartid in IPI framework which in-turn
forces IPI users to also prefer hartindex.
Signed-off-by: Anup Patel <[email protected]>
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The cold_init() functions of ACLINT drivers should skip the HART
if sbi_hartid_to_scratch() returns NULL because we might be dealing
with a HART that is disabled in the device tree.
Signed-off-by: Anup Patel <[email protected]>
Reviewed-by: Xiang W <[email protected]>
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Instead of using a global array indexed by hartid, we should use
scratch space to save per-HART MSWI pointer.
Signed-off-by: Anup Patel <[email protected]>
Reviewed-by: Andrew Jones <[email protected]>
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Let's use heap allocation in ACLINT MSWI driver instead of using
a fixed size global array.
Signed-off-by: Anup Patel <[email protected]>
Reviewed-by: Andrew Jones <[email protected]>
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The parameter checks in aclint_mswi_cold_init() don't guard against a
buffer overrun.
mswi_hartid2data is defined as an array of SBI_HARTMASK_MAX_BITS entries.
The current check allows
mswi->hart_count = ACLINT_MSWI_MAX_HARTS
mswi->first_hartid = SBI_HARTMASK_MAX_BITS - 1.
With these values mswi_hartid2data will be accessed at index
SBI_HARTMASK_MAX_BITS + SBI_HARTMASK_MAX_BITS - 2.
We have to check the sum of mswi->first_hartid and mswi->hart_count.
Furthermore mswi->hart_count = 0 would not make much sense.
Addresses-Coverity-ID: 1529705 ("Out-of-bounds write")
Fixes: 5a049fe1d6a5 ("lib: utils/ipi: Add ACLINT MSWI library")
Signed-off-by: Heinrich Schuchardt <[email protected]>
Reviewed-by: Xiang W <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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Remove dummy driver. Optimize fdt_ipi_cold_init to exit the loop
early.
Signed-off-by: Xiang W <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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Add the M-mode readable/writable flags to mmio regions
of various drivers.
Signed-off-by: Himanshu Chauhan <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
Tested-by: Anup Patel <[email protected]>
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Althoug the MTIMER part of a C9xx CLINT differs from a SiFive one, the
MSWI part is compliant.
Add T-Head C9xx CLINT compatible string to fdt_ipi_mswi code, sharing
the same codepath with SiFive CLINT.
Signed-off-by: Icenowy Zheng <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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Move Andes PLICSW ipi device to fdt ipi framework, this patch is based
on Leo's modified IPI scheme on PLICSW.
Current IPI scheme uses bit 0 of pending reigster on PLICSW to send IPI
from hart 0 to hart 7, but bit 0 needs to be hardwired to 0 according
to spec. After some investigation, self-IPI seems to be seldom or never
used, so we re-order the IPI scheme to support 8 core platforms.
dts example (Quad-core AX45MP):
plicsw: interrupt-controller@e6400000 {
compatible = "andestech,plicsw";
reg = <0x00000000 0xe6400000 0x00000000 0x00400000>;
interrupts-extended = <&CPU0_intc 3
&CPU1_intc 3
&CPU2_intc 3
&CPU3_intc 3>;
interrupt-controller;
#address-cells = <2>;
#interrupt-cells = <2>;
};
Signed-off-by: Yu Chien Peter Lin <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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We update FDT support makefile to use kconfig for enabling/disabling.
To avoid compilation errors, we also enable FDT for each platform.
Signed-off-by: Anup Patel <[email protected]>
Tested-by: Andrew Jones <[email protected]>
Acked-by: Atish Patra <[email protected]>
Tested-by: Atish Patra <[email protected]>
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We update ipi drivers makefile to use kconfig for enabling/disabling
drivers. To avoid compile errors, we also enable appropriate ipi
drivers for each platform.
Signed-off-by: Anup Patel <[email protected]>
Tested-by: Andrew Jones <[email protected]>
Acked-by: Atish Patra <[email protected]>
Tested-by: Atish Patra <[email protected]>
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The allwinner,sun20i-d1-clint compatible string is not documented in any
official binding, so it should not be used by drivers.
The MSWI in the D1 CLINT is compatible with the ACLINT specification, so
it can take advantage of generic driver support. However, that is only
possible if the MSWI and MTIMER are split into separate DT nodes. This
means the final binding for this device is likely to be incompatible
with what is implemented here.
Remove this compatible string from the driver to prevent it from
appearing in a stable version and causing future issues.
Signed-off-by: Samuel Holland <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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The CLINT in the Allwinner D1 SoC apparently does not support 64-bit
MMIO access. A property was added to support this quirk (and that
property was copied to the ACLINT MTIMER code). However, since this
difference in behavior makes the D1 CLINT incompatible with the SiFive
CLINT's programming interface, a better solution is to use a separate
compatible string.
Signed-off-by: Samuel Holland <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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Match data stores hardware attributes which do not change at runtime, so
it does not need to be mutable. Make it const.
Reviewed-by: Guo Ren <[email protected]>
Reviewed-by: Xiang W <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
Signed-off-by: Samuel Holland <[email protected]>
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Instead of having FDT ipi driver list hard-coded in the C source,
we generate it using carray.sh at compile-time.
Signed-off-by: Anup Patel <[email protected]>
Reviewed-by: Atish Patra <[email protected]>
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Currently, the ACLINT MSWI size check is forcing size to be at least
0x4000. This is inappropriate check because most systems will never
utilize full 16KB for a single ACLINT MSWI device so instead we should
check that ACLINT MSWI size is enough for on the associated HARTs.
Signed-off-by: Anup Patel <[email protected]>
Reviewed-by: Dong Du <[email protected]>
Reviewed-by: Alistair Francis <[email protected]>
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This simply adds an helper to get fdt address which is more explicit than
sbi_scratch_thishart_arg1_ptr.
Signed-off-by: Alexandre Ghiti <[email protected]>
Reviewed-by: Xiang W <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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The fdt_parse_aclint_node() is used to parse DT node for SiFive
CLINT, ACLINT MTIMER, and ACLINT MSWI devices.
The ACLINT MTIMER has undergone following changes:
1) MTIMER DT node now requires separate addresses in for MTIME
register and MTIMECMPx registers in the reg DT property.
2) MTIMER DT node might have no interrupts-extended DT property
when the MTIMER device has no associated HARTs (i.e. the
MTIMER device has no MTIMECMPx registers)
This patch extends fdt_parse_aclint_node() to handle above
mentioned changes in ACLINT MTIMER DT bindings.
Signed-off-by: Anup Patel <[email protected]>
Reviewed-by: Atish Patra <[email protected]>
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We add a new FDT based ACLINT MSWI IPI driver which works for both
CLINT device and standalone ACLINT MSWI device.
Signed-off-by: Anup Patel <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
Reviewed-by: Xiang W <[email protected]>
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We add fdt_parse_aclint_node() which can parse both ACLINT and
CLINT DT nodes. This means fdt_parse_clint_node() is not required
anymore so we remove it as well.
Signed-off-by: Anup Patel <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
Reviewed-by: Xiang W <[email protected]>
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We add common ACLINT MSWI library similar to the CLINT library
so that OpenSBI platforms can use it.
Signed-off-by: Anup Patel <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
Reviewed-by: Xiang W <[email protected]>
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We should try other FDT drivers when we see SBI_ENODEV returned
by cold_init() of FDT driver.
Signed-off-by: Anup Patel <[email protected]>
Reviewed-by: Atish Patra <[email protected]>
Reviewed-by: Xiang W <[email protected]>
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Instead of having ipi_send() and ipi_clear() callbacks in
platform operations, it will be much simpler for ipi driver
to directly register these operations as a device to sbi_ipi
implementation.
Signed-off-by: Anup Patel <[email protected]>
Reviewed-by: Alistair Francis <[email protected]>
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Linux kernel commit a2770b57d083 ("dt-bindings: timer: Add CLINT bindings")
adds the official DT bindings for CLINT, which uses "sifive,clint0"
as the compatible string. "riscv,clint0" is now legacy and has to
be kept for backward compatibility of legacy systems.
Signed-off-by: Bin Meng <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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We can have multiple matching DT nodes of the same FDT ipi driver
so in this case we should call cold_init() for all matching DT nodes
instead of just first matching DT node.
Signed-off-by: Anup Patel <[email protected]>
Reviewed-by: Atish Patra <[email protected]>
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We add fdt_parse_clint_node() function which will be used by
fdt_ipi_clint and fdt_timer_clint drivers to parse CLINT details
from DT node.
Signed-off-by: Anup Patel <[email protected]>
Reviewed-by: Atish Patra <[email protected]>
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We extend CLINT cold init function to have a "struct clint_data *"
parameter pointing to CLINT details. This allows platforms to use
CLINT functions for multiple CLINT instances.
When multiple CLINTs are present, the platform can also provide
one of the CLINT as reference CLINT for other CLINTs. This will
help CLINTs to sync their time value with reference CLINT using
a time_delta computed in warm init function.
Signed-off-by: Anup Patel <[email protected]>
Reviewed-by: Atish Patra <[email protected]>
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We extend fdt_find_match() implementation by adding node offset
parameter which represents the first node to match from.
The improved fdt_find_match() can be used to find multiple
match nodes.
Signed-off-by: Anup Patel <[email protected]>
Reviewed-by: Atish Patra <[email protected]>
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We add simple ipi framework which will select and use ipi driver
based on details in FDT passed by previous booting stage.
Signed-off-by: Anup Patel <[email protected]>
Reviewed-by: Atish Patra <[email protected]>
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