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Altera provides a JTAG UART core that provides virtual UART over JTAG
and can coexist with their virtual JTAG. [1] This core has already been
supported by Linux and the programming interface has always been stable.
Add support for it to OpenSBI to ease JTAG prototype bringing up.
The driver follows the device tree binding in mainline Linux. [2]
[1] https://docs.altera.com/r/docs/683130/25.3/embedded-peripherals-ip-user-guide/jtag-uart-core
[2] https://github.com/torvalds/linux/blob/v6.19-rc1/Documentation/devicetree/bindings/serial/altr%2Cjuart-1.0.yaml
Signed-off-by: Icenowy Zheng <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Anup Patel <[email protected]>
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We would like to clean any files generated by the carray
scripts by just searching for the filename as the current
make system turns f.carray into f.o. Change to make the
make system turn f.carray into f.carray.o
note, command to go through .mk files changing the .o
in the .mk files is:
find . -type f -name "*.carray" | xargs -t -I fname /bin/bash -x -c ' fn=`basename -s .carray fname`; echo "$fn"; sed -i `dirname fname `/objects.mk -e s/"$fn".o/"$fn".carray.o/g'
Link: https://patchwork.ozlabs.org/project/opensbi/patch/[email protected]/
Reported-by: Ivan Orlov <[email protected]>
Suggested-by: Andrew Jones <[email protected]>
Signed-off-by: Ben Dooks <[email protected]>
Reviewed-by: Andrew Jones <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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Add FDT driver for Renesas SCIF.
dts example:
soc: soc {
....
scif0: serial@1004b800 {
compatible = "renesas,scif-r9a07g043",
"renesas,scif-r9a07g044";
reg = <0 0x1004b800 0 0x400>;
interrupts = <412 IRQ_TYPE_LEVEL_HIGH>,
<414 IRQ_TYPE_LEVEL_HIGH>,
<415 IRQ_TYPE_LEVEL_HIGH>,
<413 IRQ_TYPE_LEVEL_HIGH>,
<416 IRQ_TYPE_LEVEL_HIGH>,
<416 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "eri", "rxi", "txi",
"bri", "dri", "tei";
clocks = <&cpg CPG_MOD R9A07G043_SCIF0_CLK_PCK>;
clock-names = "fck";
power-domains = <&cpg>;
resets = <&cpg R9A07G043_SCIF0_RST_SYSTEM_N>;
status = "disabled";
};
....
};
Signed-off-by: Lad Prabhakar <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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Add Renesas SCIF driver.
Based on a patch in the BSP by Takeki Hamada
<[email protected]>
Link: https://github.com/renesas-rz/rz_opensbi/commits/work/OpenSBI-PMA
Signed-off-by: Lad Prabhakar <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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We add RISC-V semihosting based serial console for JTAG based early
debugging.
The RISC-V semihosting specification is available at:
https://github.com/riscv/riscv-semihosting-spec/blob/main/riscv-semihosting-spec.adoc
Signed-off-by: Anup Patel <[email protected]>
Signed-off-by: Kautuk Consul <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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Add Cadence UART driver
Signed-off-by: Jun Liang Tan <[email protected]>
Signed-off-by: Wei Liang Lim <[email protected]>
Reviewed-by: Andrew Jones <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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We update serial drivers makefile to use kconfig for enabling/disabling
drivers. To avoid compile errors, we also enable appropriate serial
drivers for each platform.
Signed-off-by: Anup Patel <[email protected]>
Tested-by: Andrew Jones <[email protected]>
Acked-by: Atish Patra <[email protected]>
Tested-by: Atish Patra <[email protected]>
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Instead of having FDT serial driver list hard-coded in the C source,
we generate it using carray.sh at compile-time.
Signed-off-by: Anup Patel <[email protected]>
Reviewed-by: Atish Patra <[email protected]>
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Initial commit of the xlnx-uartlite device and FDT support. This was
tested by running OpenSBI on a modified QEMU virt machine using the
xlnx-uartlite for serial.
Signed-off-by: Alistair Francis <[email protected]>
Reviewed-by: Xiang W <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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Add support for the UART provided by the LiteX SoC
framework (https://github.com/enjoy-digital/litex),
based on its FDT info (described in the Linux tree at
Documentation/devicetree/bindings/serial/litex,liteuart.yaml).
Signed-off-by: Gabriel Somlo <[email protected]>
Reviewed-by: Xiang W <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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This patch adds support for the UART used by the NOEL-V processor.
Cobham Gaisler's NOEL-V RISC-V processor IP is available under GPL
and commercial license and is described in more detail at
https://www.gaisler.com/noelv.
Signed-off-by: Daniel Cederman <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
Reviewed-by: Bin Meng <[email protected]>
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C-Class is a member of the SHAKTI family of processors from Indian
Institute of Technology - Madras(IIT-M).
It is an extremely configurable and commercial-grade 5-stage in-order
core supporting the standard RV64GCSUN ISA extensions.
https://gitlab.com/shaktiproject/cores/c-class/blob/master/README.md
We add OpenSBI support for Shakti C-class SoC.
Signed-off-by: Vijai Kumar K <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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We add simple serial framework which will select and use serial driver
based on details in FDT passed by previous booting stage.
Signed-off-by: Anup Patel <[email protected]>
Reviewed-by: Atish Patra <[email protected]>
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Signed-off-by: Bin Meng <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
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The drivers and libfdt are built as libsbiutils.a
instead of libplatsbi.a.
libsbiutils.a are not built per platform specific. Thus,
enable all drivers by default.
Signed-off-by: Atish Patra <[email protected]>
Acked-by: Anup Patel <[email protected]>
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Currently, platform/common contains platform/non-platform specific
common minimal drivers and libraries. This is helpful is all platforms
are built within opensbi framework.
Move them to lib/utils so that any external platform code also can
reuse the minimalistic drivers or other common libraries.
This patch doesn't introduce any functional changes.
Signed-off-by: Atish Patra <[email protected]>
Acked-by: Anup Patel <[email protected]>
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