| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 11 days | lib: sbi: Allow platforms to override local TLB operations | Xiang W | |
| Some T-Head based processors, for example the Sophgo SG2044, have a JTLB errata that requires special handling of certain TLB maintenance instructions (sfence.vma). Introduce a sbi_tlb_local_operations structure so platforms can provide custom local TLB flush implementations. Use it to implement the JTLB workaround on affected SoCs (currently Sophgo SG2044). Signed-off-by: Xiang W <[email protected]> Signed-off-by: Han Gao <[email protected]> Reviewed-by: Anup Patel <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Anup Patel <[email protected]> | |||
| 2024-05-09 | platform: generic: thead: separate T-Head PMU Errata | Yangyu Chen | |
| As Guo Ren said from the kernel mailing list [1], future T-Head CPUs, including the newer versions of T-Head C908, will feature standard Sscofpmf extension. For these CPUs, T-Head's implementation of PMU Overflow Interrupts may not needed anymore. In this case, we shouldn't apply T-Head PMU for all T-Head CPUs. Thus, this patch separated T-Head PMU errata. [1] https://lore.kernel.org/linux-riscv/[email protected]/ Signed-off-by: Yangyu Chen <[email protected]> Reviewed-by: Inochi Amaoto <[email protected]> Reviewed-by: Anup Patel <[email protected]> | |||
| 2023-11-14 | platform: generic: thead: separate implement of T-HEAD c9xx errata | Inochi Amaoto | |
| Separate the implement of T-HEAD c9xx errata to allow any platform with bug related to c9xx cores can use it. Signed-off-by: Inochi Amaoto <[email protected]> Reviewed-by: Anup Patel <[email protected]> | |||
