[component][drivers]add pinctrl/pin-irqchip (#8383)

3 files changed, 154 insertions, 0 deletions

diff --git a/components/drivers/include/drivers/pin.h b/components/drivers/include/drivers/pin.h
index 4b369d5b8d..53e4465f8d 100644
--- a/components/drivers/include/drivers/pin.h
+++ b/components/drivers/include/drivers/pin.h
@@ -18,10 +18,25 @@
 extern "C" {
 #endif
 
+#ifdef RT_USING_DM
+#include <drivers/pic.h>
+
+struct rt_pin_irqchip
+{
+    struct rt_pic parent;
+
+    int irq;
+    rt_base_t pin_range[2];
+};
+#endif /* RT_USING_DM */
+
 /* pin device and operations for RT-Thread */
 struct rt_device_pin
 {
     struct rt_device parent;
+#ifdef RT_USING_DM
+    struct rt_pin_irqchip irqchip;
+#endif /* RT_USING_DM */
     const struct rt_pin_ops *ops;
 };
 
@@ -36,6 +51,39 @@ struct rt_device_pin
 #define PIN_MODE_INPUT_PULLDOWN 0x03
 #define PIN_MODE_OUTPUT_OD      0x04
 
+#ifdef RT_USING_PINCTRL
+enum
+{
+    PIN_CONFIG_BIAS_BUS_HOLD,
+    PIN_CONFIG_BIAS_DISABLE,
+    PIN_CONFIG_BIAS_HIGH_IMPEDANCE,
+    PIN_CONFIG_BIAS_PULL_DOWN,
+    PIN_CONFIG_BIAS_PULL_PIN_DEFAULT,
+    PIN_CONFIG_BIAS_PULL_UP,
+    PIN_CONFIG_DRIVE_OPEN_DRAIN,
+    PIN_CONFIG_DRIVE_OPEN_SOURCE,
+    PIN_CONFIG_DRIVE_PUSH_PULL,
+    PIN_CONFIG_DRIVE_STRENGTH,
+    PIN_CONFIG_DRIVE_STRENGTH_UA,
+    PIN_CONFIG_INPUT_DEBOUNCE,
+    PIN_CONFIG_INPUT_ENABLE,
+    PIN_CONFIG_INPUT_SCHMITT,
+    PIN_CONFIG_INPUT_SCHMITT_ENABLE,
+    PIN_CONFIG_MODE_LOW_POWER,
+    PIN_CONFIG_MODE_PWM,
+    PIN_CONFIG_OUTPUT,
+    PIN_CONFIG_OUTPUT_ENABLE,
+    PIN_CONFIG_OUTPUT_IMPEDANCE_OHMS,
+    PIN_CONFIG_PERSIST_STATE,
+    PIN_CONFIG_POWER_SOURCE,
+    PIN_CONFIG_SKEW_DELAY,
+    PIN_CONFIG_SLEEP_HARDWARE_STATE,
+    PIN_CONFIG_SLEW_RATE,
+    PIN_CONFIG_END = 0x7f,
+    PIN_CONFIG_MAX = 0xff,
+};
+#endif /* RT_USING_PINCTRL */
+
 #define PIN_IRQ_MODE_RISING             0x00
 #define PIN_IRQ_MODE_FALLING            0x01
 #define PIN_IRQ_MODE_RISING_FALLING     0x02
@@ -66,6 +114,16 @@ struct rt_pin_irq_hdr
     void (*hdr)(void *args);
     void             *args;
 };
+
+#ifdef RT_USING_PINCTRL
+struct rt_pin_ctrl_conf_params
+{
+    const char *propname;
+    rt_uint32_t param;
+    rt_uint32_t default_value;
+};
+#endif /* RT_USING_PINCTRL */
+
 struct rt_pin_ops
 {
     void (*pin_mode)(struct rt_device *device, rt_base_t pin, rt_uint8_t mode);
@@ -76,6 +134,13 @@ struct rt_pin_ops
     rt_err_t (*pin_detach_irq)(struct rt_device *device, rt_base_t pin);
     rt_err_t (*pin_irq_enable)(struct rt_device *device, rt_base_t pin, rt_uint8_t enabled);
     rt_base_t (*pin_get)(const char *name);
+#ifdef RT_USING_DM
+    rt_err_t (*pin_irq_mode)(struct rt_device *device, rt_base_t pin, rt_uint8_t mode);
+    rt_ssize_t (*pin_parse)(struct rt_device *device, struct rt_ofw_cell_args *args, rt_uint32_t *flags);
+#endif
+#ifdef RT_USING_PINCTRL
+    rt_err_t (*pin_ctrl_confs_apply)(struct rt_device *device, void *fw_conf_np);
+#endif /* RT_USING_PINCTRL */
 };
 
 int rt_device_pin_register(const char *name, const struct rt_pin_ops *ops, void *user_data);
@@ -88,6 +153,24 @@ rt_err_t rt_pin_attach_irq(rt_base_t pin, rt_uint8_t mode,
 rt_err_t rt_pin_detach_irq(rt_base_t pin);
 rt_err_t rt_pin_irq_enable(rt_base_t pin, rt_uint8_t enabled);
 
+#ifdef RT_USING_DM
+rt_ssize_t rt_pin_get_named_pin(struct rt_device *dev, const char *propname, int index,
+        rt_uint8_t *out_mode, rt_uint8_t *out_value);
+rt_ssize_t rt_pin_get_named_pin_count(struct rt_device *dev, const char *propname);
+
+#ifdef RT_USING_OFW
+rt_ssize_t rt_ofw_get_named_pin(struct rt_ofw_node *np, const char *propname, int index,
+        rt_uint8_t *out_mode, rt_uint8_t *out_value);
+rt_ssize_t rt_ofw_get_named_pin_count(struct rt_ofw_node *np, const char *propname);
+#endif
+#endif /* RT_USING_DM */
+
+#ifdef RT_USING_PINCTRL
+rt_ssize_t rt_pin_ctrl_confs_lookup(struct rt_device *device, const char *name);
+rt_err_t rt_pin_ctrl_confs_apply(struct rt_device *device, int index);
+rt_err_t rt_pin_ctrl_confs_apply_by_name(struct rt_device *device, const char *name);
+#endif /* RT_USING_PINCTRL */
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/components/drivers/include/dt-bindings/pin/pin.h b/components/drivers/include/dt-bindings/pin/pin.h
new file mode 100644
index 0000000000..00df8e17d0
--- /dev/null
+++ b/components/drivers/include/dt-bindings/pin/pin.h
@@ -0,0 +1,42 @@
+/*
+ * Copyright (c) 2006-2022, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef __DT_BINDINGS_PIN_PIN_H__
+#define __DT_BINDINGS_PIN_PIN_H__
+
+/* Bit 0 express polarity */
+#define PIN_ACTIVE_HIGH         0
+#define PIN_ACTIVE_LOW          1
+
+/* Bit 1 express single-endedness */
+#define PIN_PUSH_PULL           0
+#define PIN_SINGLE_ENDED        2
+
+/* Bit 2 express Open drain or open source */
+#define PIN_LINE_OPEN_SOURCE    0
+#define PIN_LINE_OPEN_DRAIN     4
+
+/*
+ * Open Drain/Collector is the combination of single-ended open drain interface.
+ * Open Source/Emitter is the combination of single-ended open source interface.
+ */
+#define PIN_OPEN_DRAIN          (PIN_SINGLE_ENDED | PIN_LINE_OPEN_DRAIN)
+#define PIN_OPEN_SOURCE         (PIN_SINGLE_ENDED | PIN_LINE_OPEN_SOURCE)
+
+/* Bit 3 express PIN suspend/resume and reset persistence */
+#define PIN_PERSISTENT          0
+#define PIN_TRANSITORY          8
+
+/* Bit 4 express pull up */
+#define PIN_PULL_UP             16
+
+/* Bit 5 express pull down */
+#define PIN_PULL_DOWN           32
+
+/* Bit 6 express pull disable */
+#define PIN_PULL_DISABLE        64
+
+#endif /* __DT_BINDINGS_PIN_PIN_H__ */
diff --git a/components/drivers/include/dt-bindings/pin/state.h b/components/drivers/include/dt-bindings/pin/state.h
new file mode 100644
index 0000000000..6a0475d3b6
--- /dev/null
+++ b/components/drivers/include/dt-bindings/pin/state.h
@@ -0,0 +1,29 @@
+/*
+ * Copyright (c) 2006-2022, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef __DT_BINDINGS_PIN_STATE_H__
+#define __DT_BINDINGS_PIN_STATE_H__
+
+#define PIND_FLAGS_BIT_DIR_SET       (1 << 0)
+#define PIND_FLAGS_BIT_DIR_OUT       (1 << 1)
+#define PIND_FLAGS_BIT_DIR_VAL       (1 << 2)
+#define PIND_FLAGS_BIT_OPEN_DRAIN    (1 << 3)
+#define PIND_FLAGS_BIT_NONEXCLUSIVE  (1 << 4)
+
+/* Don't change anything */
+#define PIND_ASIS                 0
+/* Set lines to input mode */
+#define PIND_IN                   PIND_FLAGS_BIT_DIR_SET
+/* Set lines to output and drive them low */
+#define PIND_OUT_LOW              (PIND_FLAGS_BIT_DIR_SET | PIND_FLAGS_BIT_DIR_OUT)
+/* Set lines to output and drive them high */
+#define PIND_OUT_HIGH             (PIND_FLAGS_BIT_DIR_SET | PIND_FLAGS_BIT_DIR_OUT | PIND_FLAGS_BIT_DIR_VAL)
+/* Set lines to open-drain output and drive them low */
+#define PIND_OUT_LOW_OPEN_DRAIN   (PIND_OUT_LOW | PIND_FLAGS_BIT_OPEN_DRAIN)
+/* Set lines to open-drain output and drive them high */
+#define PIND_OUT_HIGH_OPEN_DRAIN  (PIND_OUT_HIGH | PIND_FLAGS_BIT_OPEN_DRAIN)
+
+#endif /* __DT_BINDINGS_PIN_STATE_H__ */