diff options
| author | CYFS <[email protected]> | 2026-04-17 11:43:20 +0800 |
|---|---|---|
| committer | Bernard Xiong <[email protected]> | 2026-04-20 20:47:09 +0800 |
| commit | fa0a61c45bbdc8d7a0173069d74fbfab4631c908 (patch) | |
| tree | b4034df3f826319d1f2b80acfc4d3aaebd0103f7 /components | |
| parent | ae5b5ed1821b7a9ddcafa024856252fd724634f4 (diff) | |
[bsp][cvitek] fix timer clock frequency for 25MHz crystal
Update rt_hw_get_clock_timer_freq() in the c906_little and cv18xx_risc-v BSPs from 245000000 to 25000000.
The timer clock source uses a 25MHz crystal, so the previous 245MHz setting was incorrect and caused wrong timer frequency reporting.
Diffstat (limited to 'components')
0 files changed, 0 insertions, 0 deletions