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authorYunjie Gu <[email protected]>2022-10-20 04:41:13 +0100
committerGitHub <[email protected]>2022-10-19 23:41:13 -0400
commit8fa9fde43a2e9cb978b52c0eb536fe2bafcc6e73 (patch)
tree467394dde2b65c1ab6274059a1c475e72eefdb1d /include
parent65baa8b697ab77e24c9d3f510e601893526e33e2 (diff)
[bsp][c28x] add support to not disable global interrupt in context-switch to enable zero-latency isr for critical interrupts.
Diffstat (limited to 'include')
-rw-r--r--include/rtdef.h8
1 files changed, 8 insertions, 0 deletions
diff --git a/include/rtdef.h b/include/rtdef.h
index 89ac9edf6e..4a13c554a5 100644
--- a/include/rtdef.h
+++ b/include/rtdef.h
@@ -210,10 +210,18 @@ typedef __gnuc_va_list va_list;
* GCC and MDK) compilers. See ARM Optimizing C/C++ Compiler 5.9.3 for more
* details. */
#define RT_SECTION(x) __attribute__((section(x)))
+#ifdef __TI_EABI__
+#define RT_USED __attribute__((retain)) __attribute__((used))
+#else
#define RT_USED __attribute__((used))
+#endif
#define PRAGMA(x) _Pragma(#x)
#define ALIGN(n) __attribute__((aligned(n)))
+#ifdef __TI_EABI__
#define RT_WEAK __attribute__((weak))
+#else
+#define RT_WEAK
+#endif
#define rt_inline static inline
#define RTT_API
#elif defined (__TASKING__)