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authorRbb666 <[email protected]>2026-08-03 11:54:48 +0800
committerRbb666 <[email protected]>2026-08-12 12:54:50 +0800
commit46fdeefb3239f8f4a22a373fc6fd362499389c9e (patch)
tree57464ca099223e8ad42219eaf1ff3d9e36ed63d2 /libcpu
parent1f23e3f27052a6b7fd75def2da634c79db5773e2 (diff)
refactor(pic): dispatch NVIC IRQs through traps
Diffstat (limited to 'libcpu')
-rw-r--r--libcpu/arm/cortex-m4/cpuport.h37
-rw-r--r--libcpu/arm/cortex-m7/cpuport.h37
-rw-r--r--libcpu/arm/cortex-m85/cpuport.h37
3 files changed, 111 insertions, 0 deletions
diff --git a/libcpu/arm/cortex-m4/cpuport.h b/libcpu/arm/cortex-m4/cpuport.h
index 05bb12cf2f..9bf02e57af 100644
--- a/libcpu/arm/cortex-m4/cpuport.h
+++ b/libcpu/arm/cortex-m4/cpuport.h
@@ -10,6 +10,43 @@
#ifndef CPUPORT_H__
#define CPUPORT_H__
+#include <rtdef.h>
+
+#ifdef rt_hw_isb
+#undef rt_hw_isb
+#endif
+#ifdef rt_hw_dsb
+#undef rt_hw_dsb
+#endif
+
+rt_inline void rt_hw_isb(void)
+{
+#if defined(__CC_ARM)
+ __asm
+ {
+ ISB
+ }
+#elif defined(__clang__) || defined(__CLANG_ARM) || defined(__GNUC__)
+ __asm volatile("isb 0xf" ::: "memory");
+#elif defined(__IAR_SYSTEMS_ICC__)
+ __asm("ISB");
+#endif
+}
+
+rt_inline void rt_hw_dsb(void)
+{
+#if defined(__CC_ARM)
+ __asm
+ {
+ DSB
+ }
+#elif defined(__clang__) || defined(__CLANG_ARM) || defined(__GNUC__)
+ __asm volatile("dsb 0xf" ::: "memory");
+#elif defined(__IAR_SYSTEMS_ICC__)
+ __asm("DSB");
+#endif
+}
+
#ifdef RT_USING_SMP
typedef union {
unsigned long slock;
diff --git a/libcpu/arm/cortex-m7/cpuport.h b/libcpu/arm/cortex-m7/cpuport.h
index 05bb12cf2f..9bf02e57af 100644
--- a/libcpu/arm/cortex-m7/cpuport.h
+++ b/libcpu/arm/cortex-m7/cpuport.h
@@ -10,6 +10,43 @@
#ifndef CPUPORT_H__
#define CPUPORT_H__
+#include <rtdef.h>
+
+#ifdef rt_hw_isb
+#undef rt_hw_isb
+#endif
+#ifdef rt_hw_dsb
+#undef rt_hw_dsb
+#endif
+
+rt_inline void rt_hw_isb(void)
+{
+#if defined(__CC_ARM)
+ __asm
+ {
+ ISB
+ }
+#elif defined(__clang__) || defined(__CLANG_ARM) || defined(__GNUC__)
+ __asm volatile("isb 0xf" ::: "memory");
+#elif defined(__IAR_SYSTEMS_ICC__)
+ __asm("ISB");
+#endif
+}
+
+rt_inline void rt_hw_dsb(void)
+{
+#if defined(__CC_ARM)
+ __asm
+ {
+ DSB
+ }
+#elif defined(__clang__) || defined(__CLANG_ARM) || defined(__GNUC__)
+ __asm volatile("dsb 0xf" ::: "memory");
+#elif defined(__IAR_SYSTEMS_ICC__)
+ __asm("DSB");
+#endif
+}
+
#ifdef RT_USING_SMP
typedef union {
unsigned long slock;
diff --git a/libcpu/arm/cortex-m85/cpuport.h b/libcpu/arm/cortex-m85/cpuport.h
index 05bb12cf2f..9bf02e57af 100644
--- a/libcpu/arm/cortex-m85/cpuport.h
+++ b/libcpu/arm/cortex-m85/cpuport.h
@@ -10,6 +10,43 @@
#ifndef CPUPORT_H__
#define CPUPORT_H__
+#include <rtdef.h>
+
+#ifdef rt_hw_isb
+#undef rt_hw_isb
+#endif
+#ifdef rt_hw_dsb
+#undef rt_hw_dsb
+#endif
+
+rt_inline void rt_hw_isb(void)
+{
+#if defined(__CC_ARM)
+ __asm
+ {
+ ISB
+ }
+#elif defined(__clang__) || defined(__CLANG_ARM) || defined(__GNUC__)
+ __asm volatile("isb 0xf" ::: "memory");
+#elif defined(__IAR_SYSTEMS_ICC__)
+ __asm("ISB");
+#endif
+}
+
+rt_inline void rt_hw_dsb(void)
+{
+#if defined(__CC_ARM)
+ __asm
+ {
+ DSB
+ }
+#elif defined(__clang__) || defined(__CLANG_ARM) || defined(__GNUC__)
+ __asm volatile("dsb 0xf" ::: "memory");
+#elif defined(__IAR_SYSTEMS_ICC__)
+ __asm("DSB");
+#endif
+}
+
#ifdef RT_USING_SMP
typedef union {
unsigned long slock;