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-rw-r--r--bsp/lpc2478/drivers/board.c28
-rw-r--r--bsp/lpc2478/drivers/board.h132
-rw-r--r--bsp/lpc2478/drivers/serial.c458
3 files changed, 309 insertions, 309 deletions
diff --git a/bsp/lpc2478/drivers/board.c b/bsp/lpc2478/drivers/board.c
index 65ff918711..956ec5c03f 100644
--- a/bsp/lpc2478/drivers/board.c
+++ b/bsp/lpc2478/drivers/board.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2006-2018, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -14,7 +14,7 @@
#include <LPC24xx.h>
#include "board.h"
-#define DATA_COUNT 14400000/RT_TICK_PER_SECOND /* T0MR0 = delayInMs * (Fpclk / 1000); */
+#define DATA_COUNT 14400000/RT_TICK_PER_SECOND /* T0MR0 = delayInMs * (Fpclk / 1000); */
extern void rt_hw_serial_init(void);
@@ -25,9 +25,9 @@ extern void rt_hw_serial_init(void);
void rt_timer_handler(int vector, void* param)
{
- T0IR |= 0x01; /* clear interrupt flag */
- rt_tick_increase();
- VICVectAddr = 0; /* Acknowledge Interrupt */
+ T0IR |= 0x01; /* clear interrupt flag */
+ rt_tick_increase();
+ VICVectAddr = 0; /* Acknowledge Interrupt */
}
/**
@@ -36,19 +36,19 @@ void rt_timer_handler(int vector, void* param)
void rt_hw_board_init(void)
{
#if defined(RT_USING_DEVICE) && defined(RT_USING_UART1)
- rt_hw_serial_init();
- rt_console_set_device("uart1");
+ rt_hw_serial_init();
+ rt_console_set_device("uart1");
#endif
- T0IR = 0xff;
- T0TC = 0;
- T0MCR = 0x03;
- T0MR0 = (DATA_COUNT);
+ T0IR = 0xff;
+ T0TC = 0;
+ T0MCR = 0x03;
+ T0MR0 = (DATA_COUNT);
- rt_hw_interrupt_install(TIMER0_INT, rt_timer_handler, RT_NULL, "tick");
- rt_hw_interrupt_umask(TIMER0_INT);
+ rt_hw_interrupt_install(TIMER0_INT, rt_timer_handler, RT_NULL, "tick");
+ rt_hw_interrupt_umask(TIMER0_INT);
- T0TCR = 0x01; //enable timer0 counter
+ T0TCR = 0x01; //enable timer0 counter
}
/*@}*/
diff --git a/bsp/lpc2478/drivers/board.h b/bsp/lpc2478/drivers/board.h
index 6386c19ba8..075fe354b8 100644
--- a/bsp/lpc2478/drivers/board.h
+++ b/bsp/lpc2478/drivers/board.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2006-2018, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -14,7 +14,7 @@
/* RT_USING_UART */
#define RT_USING_UART1
#define RT_USING_UART2
-#define RT_UART_RX_BUFFER_SIZE 64
+#define RT_UART_RX_BUFFER_SIZE 64
void rt_hw_board_init(void);
void rt_hw_led_set(rt_uint32_t led);
void rt_hw_led_flash(void);
@@ -23,93 +23,93 @@ void rt_hw_led_flash(void);
void rt_hw_finsh_init(void);
#endif
-#define USE_USB 0
+#define USE_USB 0
-#if USE_USB /* 1 is USB, 0 is non-USB related */
-#define PLL_MValue 11
-#define PLL_NValue 0
-#define CCLKDivValue 4
-#define USBCLKDivValue 5
+#if USE_USB /* 1 is USB, 0 is non-USB related */
+#define PLL_MValue 11
+#define PLL_NValue 0
+#define CCLKDivValue 4
+#define USBCLKDivValue 5
-#define Fosc 12000000
-#define Fcclk 57600000
-#define Fcco 288000000
+#define Fosc 12000000
+#define Fcclk 57600000
+#define Fcco 288000000
#else
-#define PLL_MValue 12
-#define PLL_NValue 1
-#define CCLKDivValue 5
+#define PLL_MValue 12
+#define PLL_NValue 1
+#define CCLKDivValue 5
-#define Fosc 12000000
-#define Fcclk 72000000
-#define Fcco 360000000
+#define Fosc 12000000
+#define Fcclk 72000000
+#define Fcco 360000000
#endif
#if USE_USB
-#define Fpclk (Fcclk / 2)
+#define Fpclk (Fcclk / 2)
#else
-#define Fpclk (Fcclk / 4)
+#define Fpclk (Fcclk / 4)
#endif
/* IRQ define */
-#define SYS32Mode 0x1F
-#define IRQ32Mode 0x12
-#define FIQ32Mode 0x11
+#define SYS32Mode 0x1F
+#define IRQ32Mode 0x12
+#define FIQ32Mode 0x11
-#define HIGHEST_PRIORITY 0x01
-#define LOWEST_PRIORITY 0x0F
+#define HIGHEST_PRIORITY 0x01
+#define LOWEST_PRIORITY 0x0F
-#define WDT_INT 0
-#define SWI_INT 1
-#define ARM_CORE0_INT 2
-#define ARM_CORE1_INT 3
-#define TIMER0_INT 4
-#define TIMER1_INT 5
-#define UART0_INT 6
-#define UART1_INT 7
-#define PWM0_1_INT 8
-#define I2C0_INT 9
-#define SPI0_INT 10 /* SPI and SSP0 share VIC slot */
-#define SSP0_INT 10
-#define SSP1_INT 11
-#define PLL_INT 12
-#define RTC_INT 13
-#define EINT0_INT 14
-#define EINT1_INT 15
-#define EINT2_INT 16
-#define EINT3_INT 17
-#define ADC0_INT 18
-#define I2C1_INT 19
-#define BOD_INT 20
-#define EMAC_INT 21
-#define USB_INT 22
-#define CAN_INT 23
-#define MCI_INT 24
-#define GPDMA_INT 25
-#define TIMER2_INT 26
-#define TIMER3_INT 27
-#define UART2_INT 28
-#define UART3_INT 29
-#define I2C2_INT 30
-#define I2S_INT 31
+#define WDT_INT 0
+#define SWI_INT 1
+#define ARM_CORE0_INT 2
+#define ARM_CORE1_INT 3
+#define TIMER0_INT 4
+#define TIMER1_INT 5
+#define UART0_INT 6
+#define UART1_INT 7
+#define PWM0_1_INT 8
+#define I2C0_INT 9
+#define SPI0_INT 10 /* SPI and SSP0 share VIC slot */
+#define SSP0_INT 10
+#define SSP1_INT 11
+#define PLL_INT 12
+#define RTC_INT 13
+#define EINT0_INT 14
+#define EINT1_INT 15
+#define EINT2_INT 16
+#define EINT3_INT 17
+#define ADC0_INT 18
+#define I2C1_INT 19
+#define BOD_INT 20
+#define EMAC_INT 21
+#define USB_INT 22
+#define CAN_INT 23
+#define MCI_INT 24
+#define GPDMA_INT 25
+#define TIMER2_INT 26
+#define TIMER3_INT 27
+#define UART2_INT 28
+#define UART3_INT 29
+#define I2C2_INT 30
+#define I2S_INT 31
-#define VIC_SIZE 32
+#define VIC_SIZE 32
-#define VECT_ADDR_INDEX 0x100
+#define VECT_ADDR_INDEX 0x100
#define VECT_CNTL_INDEX 0x200
-#define CCLK 60000000 /* Fosc = 12MHz, M = 5 */
-#define PCLK 15000000 /* CCLK/4, use default */
+#define CCLK 60000000 /* Fosc = 12MHz, M = 5 */
+#define PCLK 15000000 /* CCLK/4, use default */
/******************************************************************************
-** Function name: TargetInit
+** Function name: TargetInit
**
-** Descriptions: Initialize the target board; it is called in a
-** necessary place, change it as needed
+** Descriptions: Initialize the target board; it is called in a
+** necessary place, change it as needed
**
-** parameters: None
-** Returned value: None
+** parameters: None
+** Returned value: None
**
******************************************************************************/
extern void TargetInit(void);
diff --git a/bsp/lpc2478/drivers/serial.c b/bsp/lpc2478/drivers/serial.c
index dff575c7cc..8e1fe1f91f 100644
--- a/bsp/lpc2478/drivers/serial.c
+++ b/bsp/lpc2478/drivers/serial.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2006-2018, RT-Thread Development Team
+ * Copyright (c) 2006-2021, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -15,8 +15,8 @@
#include "board.h"
/* serial hardware register */
-#define REG8(d) (*((volatile unsigned char *)(d)))
-#define REG32(d) (*((volatile unsigned long *)(d)))
+#define REG8(d) (*((volatile unsigned char *)(d)))
+#define REG32(d) (*((volatile unsigned long *)(d)))
#define UART_RBR(base) REG8(base + 0x00)
#define UART_THR(base) REG8(base + 0x00)
@@ -37,16 +37,16 @@
/* LPC serial device */
struct rt_lpcserial
{
- /* inherit from device */
- struct rt_device parent;
+ /* inherit from device */
+ struct rt_device parent;
- rt_uint32_t hw_base;
- rt_uint32_t irqno;
- rt_uint32_t baudrate;
+ rt_uint32_t hw_base;
+ rt_uint32_t irqno;
+ rt_uint32_t baudrate;
- /* reception field */
- rt_uint16_t save_index, read_index;
- rt_uint8_t rx_buffer[RT_UART_RX_BUFFER_SIZE];
+ /* reception field */
+ rt_uint16_t save_index, read_index;
+ rt_uint8_t rx_buffer[RT_UART_RX_BUFFER_SIZE];
};
#ifdef RT_USING_UART1
@@ -58,55 +58,55 @@ struct rt_lpcserial serial2;
void rt_hw_serial_init(void);
-#define U0PINS 0x00000005
+#define U0PINS 0x00000005
void rt_hw_uart_isr(int irqno, void *param)
{
- RT_UNUSED rt_uint32_t iir;
- struct rt_lpcserial* lpc_serial = (struct rt_lpcserial*)param;
+ RT_UNUSED rt_uint32_t iir;
+ struct rt_lpcserial* lpc_serial = (struct rt_lpcserial*)param;
- RT_ASSERT(lpc_serial != RT_NULL)
-
- if (UART_LSR(lpc_serial->hw_base) & 0x01)
- {
- rt_base_t level;
+ RT_ASSERT(lpc_serial != RT_NULL)
- while (UART_LSR(lpc_serial->hw_base) & 0x01)
- {
- /* disable interrupt */
- level = rt_hw_interrupt_disable();
+ if (UART_LSR(lpc_serial->hw_base) & 0x01)
+ {
+ rt_base_t level;
- /* read character */
- lpc_serial->rx_buffer[lpc_serial->save_index] =
- UART_RBR(lpc_serial->hw_base);
- lpc_serial->save_index ++;
- if (lpc_serial->save_index >= RT_UART_RX_BUFFER_SIZE)
- lpc_serial->save_index = 0;
-
- /* if the next position is read index, discard this 'read char' */
- if (lpc_serial->save_index == lpc_serial->read_index)
- {
- lpc_serial->read_index ++;
- if (lpc_serial->read_index >= RT_UART_RX_BUFFER_SIZE)
- lpc_serial->read_index = 0;
- }
+ while (UART_LSR(lpc_serial->hw_base) & 0x01)
+ {
+ /* disable interrupt */
+ level = rt_hw_interrupt_disable();
- /* enable interrupt */
- rt_hw_interrupt_enable(level);
- }
+ /* read character */
+ lpc_serial->rx_buffer[lpc_serial->save_index] =
+ UART_RBR(lpc_serial->hw_base);
+ lpc_serial->save_index ++;
+ if (lpc_serial->save_index >= RT_UART_RX_BUFFER_SIZE)
+ lpc_serial->save_index = 0;
- /* invoke callback */
- if(lpc_serial->parent.rx_indicate != RT_NULL)
- {
- lpc_serial->parent.rx_indicate(&lpc_serial->parent, 1);
- }
- }
+ /* if the next position is read index, discard this 'read char' */
+ if (lpc_serial->save_index == lpc_serial->read_index)
+ {
+ lpc_serial->read_index ++;
+ if (lpc_serial->read_index >= RT_UART_RX_BUFFER_SIZE)
+ lpc_serial->read_index = 0;
+ }
- /* clear interrupt source */
- iir = UART_IIR(lpc_serial->hw_base);
+ /* enable interrupt */
+ rt_hw_interrupt_enable(level);
+ }
- /* acknowledge Interrupt */
- VICVectAddr = 0;
+ /* invoke callback */
+ if(lpc_serial->parent.rx_indicate != RT_NULL)
+ {
+ lpc_serial->parent.rx_indicate(&lpc_serial->parent, 1);
+ }
+ }
+
+ /* clear interrupt source */
+ iir = UART_IIR(lpc_serial->hw_base);
+
+ /* acknowledge Interrupt */
+ VICVectAddr = 0;
}
@@ -117,243 +117,243 @@ void rt_hw_uart_isr(int irqno, void *param)
static rt_err_t rt_serial_init (rt_device_t dev)
{
- return RT_EOK;
+ return RT_EOK;
}
static rt_err_t rt_serial_open(rt_device_t dev, rt_uint16_t oflag)
{
- struct rt_lpcserial* lpc_serial;
- lpc_serial = (struct rt_lpcserial*) dev;
-
- RT_ASSERT(lpc_serial != RT_NULL);
- if (dev->flag & RT_DEVICE_FLAG_INT_RX)
- {
- /* init UART rx interrupt */
- UART_IER(lpc_serial->hw_base) = 0x01;
+ struct rt_lpcserial* lpc_serial;
+ lpc_serial = (struct rt_lpcserial*) dev;
- /* install ISR */
- rt_hw_interrupt_install(lpc_serial->irqno,
+ RT_ASSERT(lpc_serial != RT_NULL);
+ if (dev->flag & RT_DEVICE_FLAG_INT_RX)
+ {
+ /* init UART rx interrupt */
+ UART_IER(lpc_serial->hw_base) = 0x01;
+
+ /* install ISR */
+ rt_hw_interrupt_install(lpc_serial->irqno,
rt_hw_uart_isr, lpc_serial, RT_NULL);
- rt_hw_interrupt_umask(lpc_serial->irqno);
- }
+ rt_hw_interrupt_umask(lpc_serial->irqno);
+ }
- return RT_EOK;
+ return RT_EOK;
}
static rt_err_t rt_serial_close(rt_device_t dev)
{
- struct rt_lpcserial* lpc_serial;
- lpc_serial = (struct rt_lpcserial*) dev;
-
- RT_ASSERT(lpc_serial != RT_NULL);
+ struct rt_lpcserial* lpc_serial;
+ lpc_serial = (struct rt_lpcserial*) dev;
+
+ RT_ASSERT(lpc_serial != RT_NULL);
- if (dev->flag & RT_DEVICE_FLAG_INT_RX)
- {
- /* disable UART rx interrupt */
- UART_IER(lpc_serial->hw_base) = 0x00;
- }
+ if (dev->flag & RT_DEVICE_FLAG_INT_RX)
+ {
+ /* disable UART rx interrupt */
+ UART_IER(lpc_serial->hw_base) = 0x00;
+ }
- return RT_EOK;
+ return RT_EOK;
}
static rt_err_t rt_serial_control(rt_device_t dev, int cmd, void *args)
{
- return RT_EOK;
+ return RT_EOK;
}
static rt_size_t rt_serial_read(rt_device_t dev, rt_off_t pos, void* buffer, rt_size_t size)
{
- rt_uint8_t* ptr;
- struct rt_lpcserial *lpc_serial = (struct rt_lpcserial*)dev;
- RT_ASSERT(lpc_serial != RT_NULL);
+ rt_uint8_t* ptr;
+ struct rt_lpcserial *lpc_serial = (struct rt_lpcserial*)dev;
+ RT_ASSERT(lpc_serial != RT_NULL);
- /* point to buffer */
- ptr = (rt_uint8_t*) buffer;
+ /* point to buffer */
+ ptr = (rt_uint8_t*) buffer;
- if (dev->flag & RT_DEVICE_FLAG_INT_RX)
- {
- while (size)
- {
- /* interrupt receive */
- rt_base_t level;
+ if (dev->flag & RT_DEVICE_FLAG_INT_RX)
+ {
+ while (size)
+ {
+ /* interrupt receive */
+ rt_base_t level;
- /* disable interrupt */
- level = rt_hw_interrupt_disable();
- if (lpc_serial->read_index != lpc_serial->save_index)
- {
- *ptr = lpc_serial->rx_buffer[lpc_serial->read_index];
+ /* disable interrupt */
+ level = rt_hw_interrupt_disable();
+ if (lpc_serial->read_index != lpc_serial->save_index)
+ {
+ *ptr = lpc_serial->rx_buffer[lpc_serial->read_index];
- lpc_serial->read_index ++;
- if (lpc_serial->read_index >= RT_UART_RX_BUFFER_SIZE)
- lpc_serial->read_index = 0;
- }
- else
- {
- /* no data in rx buffer */
+ lpc_serial->read_index ++;
+ if (lpc_serial->read_index >= RT_UART_RX_BUFFER_SIZE)
+ lpc_serial->read_index = 0;
+ }
+ else
+ {
+ /* no data in rx buffer */
- /* enable interrupt */
- rt_hw_interrupt_enable(level);
- break;
- }
+ /* enable interrupt */
+ rt_hw_interrupt_enable(level);
+ break;
+ }
- /* enable interrupt */
- rt_hw_interrupt_enable(level);
+ /* enable interrupt */
+ rt_hw_interrupt_enable(level);
- ptr ++; size --;
- }
+ ptr ++; size --;
+ }
- return (rt_uint32_t)ptr - (rt_uint32_t)buffer;
- }
- else if (dev->flag & RT_DEVICE_FLAG_DMA_RX)
- {
- /* not support right now */
- RT_ASSERT(0);
- }
+ return (rt_uint32_t)ptr - (rt_uint32_t)buffer;
+ }
+ else if (dev->flag & RT_DEVICE_FLAG_DMA_RX)
+ {
+ /* not support right now */
+ RT_ASSERT(0);
+ }
- /* polling mode */
- while (size && (UART_LSR(lpc_serial->hw_base) & 0x01))
- {
- /* Read Character */
- *ptr = UART_RBR(lpc_serial->hw_base);
-
- ptr ++;
- size --;
- }
+ /* polling mode */
+ while (size && (UART_LSR(lpc_serial->hw_base) & 0x01))
+ {
+ /* Read Character */
+ *ptr = UART_RBR(lpc_serial->hw_base);
- return (rt_size_t)ptr - (rt_size_t)buffer;
+ ptr ++;
+ size --;
+ }
+
+ return (rt_size_t)ptr - (rt_size_t)buffer;
}
static rt_size_t rt_serial_write(rt_device_t dev, rt_off_t pos, const void* buffer, rt_size_t size)
{
- struct rt_lpcserial* lpc_serial;
- char *ptr;
+ struct rt_lpcserial* lpc_serial;
+ char *ptr;
+
+ lpc_serial = (struct rt_lpcserial*) dev;
+ if (dev->flag & RT_DEVICE_FLAG_INT_TX)
+ {
+ /* not support */
+ RT_ASSERT(0);
+ }
+ else if (dev->flag & RT_DEVICE_FLAG_DMA_TX)
+ {
+ /* not support */
+ RT_ASSERT(0);
+ }
+
+ /* polling write */
+ ptr = (char *)buffer;
+
+ if (dev->flag & RT_DEVICE_FLAG_STREAM)
+ {
+ /* stream mode */
+ while (size)
+ {
+ if (*ptr == '\n')
+ {
+ while (!(UART_LSR(lpc_serial->hw_base) & 0x20));
+ UART_THR(lpc_serial->hw_base) = '\r';
+ }
- lpc_serial = (struct rt_lpcserial*) dev;
- if (dev->flag & RT_DEVICE_FLAG_INT_TX)
- {
- /* not support */
- RT_ASSERT(0);
- }
- else if (dev->flag & RT_DEVICE_FLAG_DMA_TX)
- {
- /* not support */
- RT_ASSERT(0);
- }
+ while (!(UART_LSR(lpc_serial->hw_base) & 0x20));
+ UART_THR(lpc_serial->hw_base) = *ptr;
- /* polling write */
- ptr = (char *)buffer;
-
- if (dev->flag & RT_DEVICE_FLAG_STREAM)
- {
- /* stream mode */
- while (size)
- {
- if (*ptr == '\n')
- {
- while (!(UART_LSR(lpc_serial->hw_base) & 0x20));
- UART_THR(lpc_serial->hw_base) = '\r';
- }
+ ptr ++;
+ size --;
+ }
+ }
+ else
+ {
+ while (size)
+ {
+ while (!(UART_LSR(lpc_serial->hw_base) & 0x20));
+ UART_THR(lpc_serial->hw_base) = *ptr;
- while (!(UART_LSR(lpc_serial->hw_base) & 0x20));
- UART_THR(lpc_serial->hw_base) = *ptr;
-
- ptr ++;
- size --;
- }
- }
- else
- {
- while (size)
- {
- while (!(UART_LSR(lpc_serial->hw_base) & 0x20));
- UART_THR(lpc_serial->hw_base) = *ptr;
-
- ptr ++;
- size --;
- }
- }
-
- return (rt_size_t) ptr - (rt_size_t) buffer;
+ ptr ++;
+ size --;
+ }
+ }
+
+ return (rt_size_t) ptr - (rt_size_t) buffer;
}
void rt_hw_serial_init(void)
{
- struct rt_lpcserial* lpc_serial;
-
+ struct rt_lpcserial* lpc_serial;
+
#ifdef RT_USING_UART1
- lpc_serial = &serial1;
-
- lpc_serial->parent.type = RT_Device_Class_Char;
-
- lpc_serial->hw_base = 0xE000C000;
- lpc_serial->baudrate = 115200;
- lpc_serial->irqno = UART0_INT;
-
- rt_memset(lpc_serial->rx_buffer, 0, sizeof(lpc_serial->rx_buffer));
- lpc_serial->read_index = lpc_serial->save_index = 0;
+ lpc_serial = &serial1;
+
+ lpc_serial->parent.type = RT_Device_Class_Char;
+
+ lpc_serial->hw_base = 0xE000C000;
+ lpc_serial->baudrate = 115200;
+ lpc_serial->irqno = UART0_INT;
- /* Enable UART0 RxD and TxD pins */
- PINSEL0 |= 0x50;
+ rt_memset(lpc_serial->rx_buffer, 0, sizeof(lpc_serial->rx_buffer));
+ lpc_serial->read_index = lpc_serial->save_index = 0;
- /* 8 bits, no Parity, 1 Stop bit */
- UART_LCR(lpc_serial->hw_base) = 0x83;
-
- /* Setup Baudrate */
- UART_DLL(lpc_serial->hw_base) = (PCLK/16/lpc_serial->baudrate) & 0xFF;
- UART_DLM(lpc_serial->hw_base) = ((PCLK/16/lpc_serial->baudrate) >> 8) & 0xFF;
+ /* Enable UART0 RxD and TxD pins */
+ PINSEL0 |= 0x50;
- /* DLAB = 0 */
- UART_LCR(lpc_serial->hw_base) = 0x03;
+ /* 8 bits, no Parity, 1 Stop bit */
+ UART_LCR(lpc_serial->hw_base) = 0x83;
- lpc_serial->parent.type = RT_Device_Class_Char;
- lpc_serial->parent.init = rt_serial_init;
- lpc_serial->parent.open = rt_serial_open;
- lpc_serial->parent.close = rt_serial_close;
- lpc_serial->parent.read = rt_serial_read;
- lpc_serial->parent.write = rt_serial_write;
- lpc_serial->parent.control = rt_serial_control;
- lpc_serial->parent.user_data = RT_NULL;
+ /* Setup Baudrate */
+ UART_DLL(lpc_serial->hw_base) = (PCLK/16/lpc_serial->baudrate) & 0xFF;
+ UART_DLM(lpc_serial->hw_base) = ((PCLK/16/lpc_serial->baudrate) >> 8) & 0xFF;
- rt_device_register(&lpc_serial->parent,
- "uart1", RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM);
+ /* DLAB = 0 */
+ UART_LCR(lpc_serial->hw_base) = 0x03;
+
+ lpc_serial->parent.type = RT_Device_Class_Char;
+ lpc_serial->parent.init = rt_serial_init;
+ lpc_serial->parent.open = rt_serial_open;
+ lpc_serial->parent.close = rt_serial_close;
+ lpc_serial->parent.read = rt_serial_read;
+ lpc_serial->parent.write = rt_serial_write;
+ lpc_serial->parent.control = rt_serial_control;
+ lpc_serial->parent.user_data = RT_NULL;
+
+ rt_device_register(&lpc_serial->parent,
+ "uart1", RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM);
#endif
#ifdef RT_USING_UART2
- lpc_serial = &serial2;
-
- lpc_serial->parent.type = RT_Device_Class_Char;
+ lpc_serial = &serial2;
+
+ lpc_serial->parent.type = RT_Device_Class_Char;
+
+ lpc_serial->hw_base = 0xE0010000;
+ lpc_serial->baudrate = 115200;
+ lpc_serial->irqno = UART1_INT;
- lpc_serial->hw_base = 0xE0010000;
- lpc_serial->baudrate = 115200;
- lpc_serial->irqno = UART1_INT;
+ rt_memset(lpc_serial->rx_buffer, 0, sizeof(lpc_serial->rx_buffer));
+ lpc_serial->read_index = lpc_serial->save_index = 0;
- rt_memset(lpc_serial->rx_buffer, 0, sizeof(lpc_serial->rx_buffer));
- lpc_serial->read_index = lpc_serial->save_index = 0;
+ /* Enable UART1 RxD and TxD pins */
+ PINSEL0 |= 0x05 << 16;
- /* Enable UART1 RxD and TxD pins */
- PINSEL0 |= 0x05 << 16;
+ /* 8 bits, no Parity, 1 Stop bit */
+ UART_LCR(lpc_serial->hw_base) = 0x83;
- /* 8 bits, no Parity, 1 Stop bit */
- UART_LCR(lpc_serial->hw_base) = 0x83;
-
- /* Setup Baudrate */
- UART_DLL(lpc_serial->hw_base) = (PCLK/16/lpc_serial->baudrate) & 0xFF;
- UART_DLM(lpc_serial->hw_base) = ((PCLK/16/lpc_serial->baudrate) >> 8) & 0xFF;
+ /* Setup Baudrate */
+ UART_DLL(lpc_serial->hw_base) = (PCLK/16/lpc_serial->baudrate) & 0xFF;
+ UART_DLM(lpc_serial->hw_base) = ((PCLK/16/lpc_serial->baudrate) >> 8) & 0xFF;
- /* DLAB = 0 */
- UART_LCR(lpc_serial->hw_base) = 0x03;
+ /* DLAB = 0 */
+ UART_LCR(lpc_serial->hw_base) = 0x03;
- lpc_serial->parent.type = RT_Device_Class_Char;
- lpc_serial->parent.init = rt_serial_init;
- lpc_serial->parent.open = rt_serial_open;
- lpc_serial->parent.close = rt_serial_close;
- lpc_serial->parent.read = rt_serial_read;
- lpc_serial->parent.write = rt_serial_write;
- lpc_serial->parent.control = rt_serial_control;
- lpc_serial->parent.user_data = RT_NULL;
+ lpc_serial->parent.type = RT_Device_Class_Char;
+ lpc_serial->parent.init = rt_serial_init;
+ lpc_serial->parent.open = rt_serial_open;
+ lpc_serial->parent.close = rt_serial_close;
+ lpc_serial->parent.read = rt_serial_read;
+ lpc_serial->parent.write = rt_serial_write;
+ lpc_serial->parent.control = rt_serial_control;
+ lpc_serial->parent.user_data = RT_NULL;
- rt_device_register(&lpc_serial->parent,
- "uart2", RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX);
+ rt_device_register(&lpc_serial->parent,
+ "uart2", RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX);
#endif
}
generated by cgit v1.3.1 (git 2.54.0) at 2026-10-24 23:22:09 +0000