diff options
Diffstat (limited to 'bsp/stm32/libraries/HAL_Drivers/config')
4 files changed, 226 insertions, 2 deletions
diff --git a/bsp/stm32/libraries/HAL_Drivers/config/f0/spi_config.h b/bsp/stm32/libraries/HAL_Drivers/config/f0/spi_config.h index 6f218780c8..5aacf9de90 100644 --- a/bsp/stm32/libraries/HAL_Drivers/config/f0/spi_config.h +++ b/bsp/stm32/libraries/HAL_Drivers/config/f0/spi_config.h @@ -5,7 +5,7 @@ * * Change Logs: * Date Author Notes - * 2018-11-06 SummerGift change to new framework + * 2018-11-06 SummerGift first version */ #ifndef __SPI_CONFIG_H__ diff --git a/bsp/stm32/libraries/HAL_Drivers/config/f7/spi_config.h b/bsp/stm32/libraries/HAL_Drivers/config/f7/spi_config.h index 86bf38199e..ef32a32f4f 100644 --- a/bsp/stm32/libraries/HAL_Drivers/config/f7/spi_config.h +++ b/bsp/stm32/libraries/HAL_Drivers/config/f7/spi_config.h @@ -5,7 +5,7 @@ * * Change Logs: * Date Author Notes - * 2018-11-06 SummerGift change to new framework + * 2018-11-06 SummerGift first version */ #ifndef __SPI_CONFIG_H__ diff --git a/bsp/stm32/libraries/HAL_Drivers/config/g0/dma_config.h b/bsp/stm32/libraries/HAL_Drivers/config/g0/dma_config.h new file mode 100644 index 0000000000..8dd8598a28 --- /dev/null +++ b/bsp/stm32/libraries/HAL_Drivers/config/g0/dma_config.h @@ -0,0 +1,57 @@ +/* + * Copyright (c) 2006-2018, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2018-01-05 zylx first version + * 2019-01-08 SummerGift clean up the code + */ + +#ifndef __DMA_CONFIG_H__ +#define __DMA_CONFIG_H__ + +#include <rtthread.h> + +#ifdef __cplusplus +extern "C" { +#endif + +/* DMA1 channel1 */ + +/* DMA1 channel2-3 DMA2 channel1-2 */ +#if defined(BSP_UART1_RX_USING_DMA) && !defined(UART1_RX_DMA_INSTANCE) +#define UART1_DMA_RX_IRQHandler DMA1_Channel2_3_IRQHandler +#define UART1_RX_DMA_RCC RCC_AHBENR_DMA1EN +#define UART1_RX_DMA_INSTANCE DMA1_Channel3 +#define UART1_RX_DMA_IRQ DMA1_Channel2_3_IRQn +#endif +/* DMA1 channel2-3 DMA2 channel1-2 */ + +/* DMA1 channel4-7 DMA2 channel3-5 */ +#if defined(BSP_UART2_RX_USING_DMA) && !defined(UART2_RX_DMA_INSTANCE) +#define UART2_DMA_RX_IRQHandler DMA1_Ch4_7_DMAMUX1_OVR_IRQHandler +#define UART2_RX_DMA_RCC RCC_AHBENR_DMA1EN +#define UART2_RX_DMA_INSTANCE DMA1_Channel5 +#define UART2_RX_DMA_IRQ DMA1_Ch4_7_DMAMUX1_OVR_IRQn +#endif +/* DMA1 channel4-7 DMA2 channel3-5 */ +#if defined(BSP_UART3_RX_USING_DMA) && !defined(UART3_RX_DMA_INSTANCE) +#define UART3_DMA_RX_IRQHandler DMA1_Ch4_7_DMAMUX1_OVR_IRQHandler +#define UART3_RX_DMA_RCC RCC_AHBENR_DMA1EN +#define UART3_RX_DMA_INSTANCE DMA1_Channel4 +#define UART3_RX_DMA_IRQ DMA1_Ch4_7_DMAMUX1_OVR_IRQn +#endif +#if defined(BSP_UART4_RX_USING_DMA) && !defined(UART4_RX_DMA_INSTANCE) +#define UART4_DMA_RX_IRQHandler DMA1_Ch4_7_DMAMUX1_OVR_IRQHandler +#define UART4_RX_DMA_RCC RCC_AHBENR_DMA1EN +#define UART4_RX_DMA_INSTANCE DMA1_Channel6 +#define UART4_RX_DMA_IRQ DMA1_Ch4_7_DMAMUX1_OVR_IRQn +#endif + +#ifdef __cplusplus +} +#endif + +#endif /* __DMA_CONFIG_H__ */ diff --git a/bsp/stm32/libraries/HAL_Drivers/config/g0/uart_config.h b/bsp/stm32/libraries/HAL_Drivers/config/g0/uart_config.h new file mode 100644 index 0000000000..bca5ef2cc4 --- /dev/null +++ b/bsp/stm32/libraries/HAL_Drivers/config/g0/uart_config.h @@ -0,0 +1,167 @@ +/* + * Copyright (c) 2006-2018, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2018-10-30 zylx first version + */ + +#ifndef __UART_CONFIG_H__ +#define __UART_CONFIG_H__ + +#include <rtthread.h> + +#if defined(BSP_USING_LPUART1) +#ifndef LPUART1_CONFIG +#define LPUART1_CONFIG \ + { \ + .name = "lpuart1", \ + .Instance = LPUART1, \ + .irq_type = USART3_4_LPUART1_IRQn, \ + } +#endif /* LPUART1_CONFIG */ +#if defined(BSP_LPUART1_RX_USING_DMA) +#ifndef LPUART1_DMA_CONFIG +#define LPUART1_DMA_CONFIG \ + { \ + .Instance = DMA1_Channel1, \ + .dma_rcc = RCC_AHBENR_DMA1EN, \ + .dma_irq = DMA1_Channel1_IRQn, \ + } +#endif /* LPUART1_DMA_CONFIG */ +#endif /* BSP_LPUART1_RX_USING_DMA */ +#endif /* BSP_USING_LPUART1 */ + +#if defined(BSP_USING_UART1) +#ifndef UART1_CONFIG +#define UART1_CONFIG \ + { \ + .name = "uart1", \ + .Instance = USART1, \ + .irq_type = USART1_IRQn, \ + } +#endif /* UART1_CONFIG */ +#endif /* BSP_USING_UART1 */ + +#if defined(BSP_UART1_RX_USING_DMA) +#ifndef UART1_DMA_CONFIG +#define UART1_DMA_CONFIG \ + { \ + .Instance = UART1_RX_DMA_INSTANCE, \ + .dma_rcc = UART1_RX_DMA_RCC, \ + .dma_irq = UART1_RX_DMA_IRQ, \ + } +#endif /* UART1_DMA_CONFIG */ +#endif /* BSP_UART1_RX_USING_DMA */ + +#if defined(BSP_USING_UART2) +#ifndef UART2_CONFIG +#define UART2_CONFIG \ + { \ + .name = "uart2", \ + .Instance = USART2, \ + .irq_type = USART2_IRQn, \ + } +#endif /* UART2_CONFIG */ +#endif /* BSP_USING_UART2 */ + +#if defined(BSP_UART2_RX_USING_DMA) +#ifndef UART2_DMA_CONFIG +#define UART2_DMA_CONFIG \ + { \ + .Instance = UART2_RX_DMA_INSTANCE, \ + .dma_rcc = UART2_RX_DMA_RCC, \ + .dma_irq = UART2_RX_DMA_IRQ, \ + } +#endif /* UART2_DMA_CONFIG */ +#endif /* BSP_UART2_RX_USING_DMA */ + +#if defined(BSP_USING_UART3) +#ifndef UART3_CONFIG +#ifndef SOC_SERIES_STM32G0 +#define UART3_CONFIG \ + { \ + .name = "uart3", \ + .Instance = USART3, \ + .irq_type = USART3_IRQn, \ + } +#else +#define UART3_CONFIG \ + { \ + .name = "uart3", \ + .Instance = USART3, \ + .irq_type = USART3_4_LPUART1_IRQn, \ + } +#endif /* SOC_SERIES_STM32G0 */ +#endif /* UART3_CONFIG */ +#endif /* BSP_USING_UART3 */ + +#if defined(BSP_UART3_RX_USING_DMA) +#ifndef UART3_DMA_CONFIG +#define UART3_DMA_CONFIG \ + { \ + .Instance = UART3_RX_DMA_INSTANCE, \ + .dma_rcc = UART3_RX_DMA_RCC, \ + .dma_irq = UART3_RX_DMA_IRQ, \ + } +#endif /* UART3_DMA_CONFIG */ +#endif /* BSP_UART3_RX_USING_DMA */ + +#if defined(BSP_USING_UART4) +#ifndef UART4_CONFIG +#ifndef SOC_SERIES_STM32G0 +#define UART4_CONFIG \ + { \ + .name = "uart4", \ + .Instance = UART4, \ + .irq_type = UART4_IRQn, \ + } +#else +#define UART4_CONFIG \ + { \ + .name = "uart4", \ + .Instance = USART4, \ + .irq_type = USART3_4_LPUART1_IRQn, \ + } +#endif /* UART4_CONFIG */ +#endif /* SOC_SERIES_STM32G0 */ +#endif /* BSP_USING_UART4 */ + +#if defined(BSP_UART4_RX_USING_DMA) +#ifndef UART4_DMA_CONFIG +#define UART4_DMA_CONFIG \ + { \ + .Instance = UART4_RX_DMA_INSTANCE, \ + .dma_rcc = UART4_RX_DMA_RCC, \ + .dma_irq = UART4_RX_DMA_IRQ, \ + } +#endif /* UART4_DMA_CONFIG */ +#endif /* BSP_UART4_RX_USING_DMA */ + +#if defined(BSP_USING_UART5) +#ifndef UART5_CONFIG +#define UART5_CONFIG \ + { \ + .name = "uart5", \ + .Instance = UART5, \ + .irq_type = UART5_IRQn, \ + } +#endif /* UART5_CONFIG */ +#endif /* BSP_USING_UART5 */ + +#if defined(BSP_UART5_RX_USING_DMA) +#ifndef UART5_DMA_CONFIG +#define UART5_DMA_CONFIG \ + { \ + .Instance = DMA_NOT_AVAILABLE, \ + } +#endif /* UART5_DMA_CONFIG */ +#endif /* BSP_UART5_RX_USING_DMA */ + +#ifdef __cplusplus +} +#endif + +#endif /* __UART_CONFIG_H__ */ |