diff options
Diffstat (limited to 'bsp/stm32')
376 files changed, 914 insertions, 914 deletions
diff --git a/bsp/stm32/libraries/HAL_Drivers/config/f0/adc_config.h b/bsp/stm32/libraries/HAL_Drivers/config/f0/adc_config.h index 3615ebab52..1c432ca978 100644 --- a/bsp/stm32/libraries/HAL_Drivers/config/f0/adc_config.h +++ b/bsp/stm32/libraries/HAL_Drivers/config/f0/adc_config.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/libraries/HAL_Drivers/config/f0/dma_config.h b/bsp/stm32/libraries/HAL_Drivers/config/f0/dma_config.h index a8d177801c..077e03896f 100644 --- a/bsp/stm32/libraries/HAL_Drivers/config/f0/dma_config.h +++ b/bsp/stm32/libraries/HAL_Drivers/config/f0/dma_config.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -27,7 +27,7 @@ extern "C" { #define UART1_RX_DMA_INSTANCE DMA1_Channel3 #define UART1_RX_DMA_IRQ DMA1_Ch2_3_DMA2_Ch1_2_IRQn #elif defined(BSP_SPI1_RX_USING_DMA) && !defined(SPI1_RX_DMA_INSTANCE) -#define SPI1_DMA_RX_TX_IRQHandler DMA1_Ch2_3_DMA2_Ch1_2_IRQHandler +#define SPI1_DMA_RX_TX_IRQHandler DMA1_Ch2_3_DMA2_Ch1_2_IRQHandler #define SPI1_RX_DMA_RCC RCC_AHBENR_DMA1EN #define SPI1_RX_DMA_INSTANCE DMA1_Channel2 #define SPI1_RX_DMA_IRQ DMA1_Ch2_3_DMA2_Ch1_2_IRQn diff --git a/bsp/stm32/libraries/HAL_Drivers/config/f0/pwm_config.h b/bsp/stm32/libraries/HAL_Drivers/config/f0/pwm_config.h index 9ade01dfa5..3a91b88dc9 100644 --- a/bsp/stm32/libraries/HAL_Drivers/config/f0/pwm_config.h +++ b/bsp/stm32/libraries/HAL_Drivers/config/f0/pwm_config.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/libraries/HAL_Drivers/config/f0/spi_config.h b/bsp/stm32/libraries/HAL_Drivers/config/f0/spi_config.h index 3d66d703e8..79523e704d 100644 --- a/bsp/stm32/libraries/HAL_Drivers/config/f0/spi_config.h +++ b/bsp/stm32/libraries/HAL_Drivers/config/f0/spi_config.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -27,7 +27,7 @@ extern "C" { } #endif /* SPI1_BUS_CONFIG */ #endif /* BSP_USING_SPI1 */ - + #ifdef BSP_SPI1_TX_USING_DMA #ifndef SPI1_TX_DMA_CONFIG #define SPI1_TX_DMA_CONFIG \ @@ -59,7 +59,7 @@ extern "C" { } #endif /* SPI2_BUS_CONFIG */ #endif /* BSP_USING_SPI2 */ - + #ifdef BSP_SPI2_TX_USING_DMA #ifndef SPI2_TX_DMA_CONFIG #define SPI2_TX_DMA_CONFIG \ diff --git a/bsp/stm32/libraries/HAL_Drivers/config/f0/tim_config.h b/bsp/stm32/libraries/HAL_Drivers/config/f0/tim_config.h index 0bba70cd43..ca37509e02 100644 --- a/bsp/stm32/libraries/HAL_Drivers/config/f0/tim_config.h +++ b/bsp/stm32/libraries/HAL_Drivers/config/f0/tim_config.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/libraries/HAL_Drivers/config/f0/uart_config.h b/bsp/stm32/libraries/HAL_Drivers/config/f0/uart_config.h index ea5e767aed..649ec1f4ec 100644 --- a/bsp/stm32/libraries/HAL_Drivers/config/f0/uart_config.h +++ b/bsp/stm32/libraries/HAL_Drivers/config/f0/uart_config.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -49,7 +49,7 @@ extern "C" { } #endif /* UART2_CONFIG */ #endif /* BSP_USING_UART2 */ - + #if defined(BSP_UART2_RX_USING_DMA) #ifndef UART2_DMA_RX_CONFIG #define UART2_DMA_RX_CONFIG \ diff --git a/bsp/stm32/libraries/HAL_Drivers/config/f1/adc_config.h b/bsp/stm32/libraries/HAL_Drivers/config/f1/adc_config.h index ac0a7ca373..825aaf102e 100644 --- a/bsp/stm32/libraries/HAL_Drivers/config/f1/adc_config.h +++ b/bsp/stm32/libraries/HAL_Drivers/config/f1/adc_config.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -29,7 +29,7 @@ extern "C" { .Init.DiscontinuousConvMode = DISABLE, \ .Init.NbrOfDiscConversion = 1, \ .Init.ExternalTrigConv = ADC_SOFTWARE_START, \ - } + } #endif /* ADC1_CONFIG */ #endif /* BSP_USING_ADC1 */ @@ -45,7 +45,7 @@ extern "C" { .Init.DiscontinuousConvMode = DISABLE, \ .Init.NbrOfDiscConversion = 1, \ .Init.ExternalTrigConv = ADC_SOFTWARE_START, \ - } + } #endif /* ADC2_CONFIG */ #endif /* BSP_USING_ADC2 */ @@ -61,7 +61,7 @@ extern "C" { .Init.DiscontinuousConvMode = DISABLE, \ .Init.NbrOfDiscConversion = 1, \ .Init.ExternalTrigConv = ADC_SOFTWARE_START, \ - } + } #endif /* ADC3_CONFIG */ #endif /* BSP_USING_ADC3 */ diff --git a/bsp/stm32/libraries/HAL_Drivers/config/f1/dma_config.h b/bsp/stm32/libraries/HAL_Drivers/config/f1/dma_config.h index 20205c43d7..65e136a2c3 100644 --- a/bsp/stm32/libraries/HAL_Drivers/config/f1/dma_config.h +++ b/bsp/stm32/libraries/HAL_Drivers/config/f1/dma_config.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/libraries/HAL_Drivers/config/f1/pulse_encoder_config.h b/bsp/stm32/libraries/HAL_Drivers/config/f1/pulse_encoder_config.h index 94dd8fcd70..1de5c72b26 100644 --- a/bsp/stm32/libraries/HAL_Drivers/config/f1/pulse_encoder_config.h +++ b/bsp/stm32/libraries/HAL_Drivers/config/f1/pulse_encoder_config.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/libraries/HAL_Drivers/config/f1/pwm_config.h b/bsp/stm32/libraries/HAL_Drivers/config/f1/pwm_config.h index 50ea3791b6..c4d4bcf202 100644 --- a/bsp/stm32/libraries/HAL_Drivers/config/f1/pwm_config.h +++ b/bsp/stm32/libraries/HAL_Drivers/config/f1/pwm_config.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/libraries/HAL_Drivers/config/f1/sdio_config.h b/bsp/stm32/libraries/HAL_Drivers/config/f1/sdio_config.h index b68d5ce6ba..16d3526188 100644 --- a/bsp/stm32/libraries/HAL_Drivers/config/f1/sdio_config.h +++ b/bsp/stm32/libraries/HAL_Drivers/config/f1/sdio_config.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/libraries/HAL_Drivers/config/f1/spi_config.h b/bsp/stm32/libraries/HAL_Drivers/config/f1/spi_config.h index c4bbe3708d..bf28c2fc72 100644 --- a/bsp/stm32/libraries/HAL_Drivers/config/f1/spi_config.h +++ b/bsp/stm32/libraries/HAL_Drivers/config/f1/spi_config.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -27,7 +27,7 @@ extern "C" { } #endif /* SPI1_BUS_CONFIG */ #endif /* BSP_USING_SPI1 */ - + #ifdef BSP_SPI1_TX_USING_DMA #ifndef SPI1_TX_DMA_CONFIG #define SPI1_TX_DMA_CONFIG \ @@ -59,7 +59,7 @@ extern "C" { } #endif /* SPI2_BUS_CONFIG */ #endif /* BSP_USING_SPI2 */ - + #ifdef BSP_SPI2_TX_USING_DMA #ifndef SPI2_TX_DMA_CONFIG #define SPI2_TX_DMA_CONFIG \ @@ -91,7 +91,7 @@ extern "C" { } #endif /* SPI3_BUS_CONFIG */ #endif /* BSP_USING_SPI3 */ - + #ifdef BSP_SPI3_TX_USING_DMA #ifndef SPI3_TX_DMA_CONFIG #define SPI3_TX_DMA_CONFIG \ diff --git a/bsp/stm32/libraries/HAL_Drivers/config/f1/tim_config.h b/bsp/stm32/libraries/HAL_Drivers/config/f1/tim_config.h index 1d3b245dc8..07478f1465 100644 --- a/bsp/stm32/libraries/HAL_Drivers/config/f1/tim_config.h +++ b/bsp/stm32/libraries/HAL_Drivers/config/f1/tim_config.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/libraries/HAL_Drivers/config/f1/uart_config.h b/bsp/stm32/libraries/HAL_Drivers/config/f1/uart_config.h index a08196e996..8605d9089c 100644 --- a/bsp/stm32/libraries/HAL_Drivers/config/f1/uart_config.h +++ b/bsp/stm32/libraries/HAL_Drivers/config/f1/uart_config.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/libraries/HAL_Drivers/config/f1/usbd_config.h b/bsp/stm32/libraries/HAL_Drivers/config/f1/usbd_config.h index d58b86f6d3..686055a70a 100644 --- a/bsp/stm32/libraries/HAL_Drivers/config/f1/usbd_config.h +++ b/bsp/stm32/libraries/HAL_Drivers/config/f1/usbd_config.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/libraries/HAL_Drivers/config/f2/adc_config.h b/bsp/stm32/libraries/HAL_Drivers/config/f2/adc_config.h index bda1a06485..711dd21bbd 100644 --- a/bsp/stm32/libraries/HAL_Drivers/config/f2/adc_config.h +++ b/bsp/stm32/libraries/HAL_Drivers/config/f2/adc_config.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/libraries/HAL_Drivers/config/f2/dma_config.h b/bsp/stm32/libraries/HAL_Drivers/config/f2/dma_config.h index cd2161276f..df88830382 100644 --- a/bsp/stm32/libraries/HAL_Drivers/config/f2/dma_config.h +++ b/bsp/stm32/libraries/HAL_Drivers/config/f2/dma_config.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -134,7 +134,7 @@ extern "C" { #endif /* DMA2 stream3 */ -#if defined(BSP_SPI1_TX_USING_DMA) && !defined(SPI1_TX_DMA_INSTANCE) +#if defined(BSP_SPI1_TX_USING_DMA) && !defined(SPI1_TX_DMA_INSTANCE) #define SPI1_DMA_TX_IRQHandler DMA2_Stream3_IRQHandler #define SPI1_TX_DMA_RCC RCC_AHB1ENR_DMA2EN #define SPI1_TX_DMA_INSTANCE DMA2_Stream3 diff --git a/bsp/stm32/libraries/HAL_Drivers/config/f2/pwm_config.h b/bsp/stm32/libraries/HAL_Drivers/config/f2/pwm_config.h index 1a5575de0c..b8ef2d37f7 100644 --- a/bsp/stm32/libraries/HAL_Drivers/config/f2/pwm_config.h +++ b/bsp/stm32/libraries/HAL_Drivers/config/f2/pwm_config.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/libraries/HAL_Drivers/config/f2/sdio_config.h b/bsp/stm32/libraries/HAL_Drivers/config/f2/sdio_config.h index 26fb77e260..c17ef65faf 100644 --- a/bsp/stm32/libraries/HAL_Drivers/config/f2/sdio_config.h +++ b/bsp/stm32/libraries/HAL_Drivers/config/f2/sdio_config.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/libraries/HAL_Drivers/config/f2/spi_config.h b/bsp/stm32/libraries/HAL_Drivers/config/f2/spi_config.h index cf1e8bcea8..b3e9507b19 100644 --- a/bsp/stm32/libraries/HAL_Drivers/config/f2/spi_config.h +++ b/bsp/stm32/libraries/HAL_Drivers/config/f2/spi_config.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -27,7 +27,7 @@ extern "C" { } #endif /* SPI1_BUS_CONFIG */ #endif /* BSP_USING_SPI1 */ - + #ifdef BSP_SPI1_TX_USING_DMA #ifndef SPI1_TX_DMA_CONFIG #define SPI1_TX_DMA_CONFIG \ @@ -61,7 +61,7 @@ extern "C" { } #endif /* SPI2_BUS_CONFIG */ #endif /* BSP_USING_SPI2 */ - + #ifdef BSP_SPI2_TX_USING_DMA #ifndef SPI2_TX_DMA_CONFIG #define SPI2_TX_DMA_CONFIG \ @@ -95,7 +95,7 @@ extern "C" { } #endif /* SPI3_BUS_CONFIG */ #endif /* BSP_USING_SPI3 */ - + #ifdef BSP_SPI3_TX_USING_DMA #ifndef SPI3_TX_DMA_CONFIG #define SPI3_TX_DMA_CONFIG \ diff --git a/bsp/stm32/libraries/HAL_Drivers/config/f2/tim_config.h b/bsp/stm32/libraries/HAL_Drivers/config/f2/tim_config.h index a5b47af3a6..4484a20427 100644 --- a/bsp/stm32/libraries/HAL_Drivers/config/f2/tim_config.h +++ b/bsp/stm32/libraries/HAL_Drivers/config/f2/tim_config.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/libraries/HAL_Drivers/config/f2/uart_config.h b/bsp/stm32/libraries/HAL_Drivers/config/f2/uart_config.h index 6d8655fc2e..118143a82c 100644 --- a/bsp/stm32/libraries/HAL_Drivers/config/f2/uart_config.h +++ b/bsp/stm32/libraries/HAL_Drivers/config/f2/uart_config.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -8,7 +8,7 @@ * 2018-10-30 SummerGift first version * 2019-01-03 zylx modify dma support */ - + #ifndef __UART_CONFIG_H__ #define __UART_CONFIG_H__ @@ -27,7 +27,7 @@ extern "C" { .irq_type = USART1_IRQn, \ } #endif /* UART1_CONFIG */ - + #if defined(BSP_UART1_RX_USING_DMA) #ifndef UART1_DMA_RX_CONFIG #define UART1_DMA_RX_CONFIG \ @@ -74,7 +74,7 @@ extern "C" { } #endif /* UART2_DMA_RX_CONFIG */ #endif /* BSP_UART2_RX_USING_DMA */ - + #if defined(BSP_UART2_TX_USING_DMA) #ifndef UART2_DMA_TX_CONFIG #define UART2_DMA_TX_CONFIG \ @@ -109,7 +109,7 @@ extern "C" { } #endif /* UART3_DMA_RX_CONFIG */ #endif /* BSP_UART3_RX_USING_DMA */ - + #if defined(BSP_UART3_TX_USING_DMA) #ifndef UART3_DMA_TX_CONFIG #define UART3_DMA_TX_CONFIG \ @@ -179,7 +179,7 @@ extern "C" { } #endif /* UART5_DMA_RX_CONFIG */ #endif /* BSP_UART5_RX_USING_DMA */ - + #if defined(BSP_UART5_TX_USING_DMA) #ifndef UART5_DMA_TX_CONFIG #define UART5_DMA_TX_CONFIG \ @@ -214,7 +214,7 @@ extern "C" { } #endif /* UART6_DMA_RX_CONFIG */ #endif /* BSP_UART6_RX_USING_DMA */ - + #if defined(BSP_UART6_TX_USING_DMA) #ifndef UART6_DMA_TX_CONFIG #define UART6_DMA_TX_CONFIG \ diff --git a/bsp/stm32/libraries/HAL_Drivers/config/f4/adc_config.h b/bsp/stm32/libraries/HAL_Drivers/config/f4/adc_config.h index bda1a06485..711dd21bbd 100644 --- a/bsp/stm32/libraries/HAL_Drivers/config/f4/adc_config.h +++ b/bsp/stm32/libraries/HAL_Drivers/config/f4/adc_config.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/libraries/HAL_Drivers/config/f4/dma_config.h b/bsp/stm32/libraries/HAL_Drivers/config/f4/dma_config.h index 17768c9a04..80d45afc79 100644 --- a/bsp/stm32/libraries/HAL_Drivers/config/f4/dma_config.h +++ b/bsp/stm32/libraries/HAL_Drivers/config/f4/dma_config.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/libraries/HAL_Drivers/config/f4/pulse_encoder_config.h b/bsp/stm32/libraries/HAL_Drivers/config/f4/pulse_encoder_config.h index 53320efda1..f9534e0a4c 100644 --- a/bsp/stm32/libraries/HAL_Drivers/config/f4/pulse_encoder_config.h +++ b/bsp/stm32/libraries/HAL_Drivers/config/f4/pulse_encoder_config.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/libraries/HAL_Drivers/config/f4/pwm_config.h b/bsp/stm32/libraries/HAL_Drivers/config/f4/pwm_config.h index 3803303493..c23abe0aec 100644 --- a/bsp/stm32/libraries/HAL_Drivers/config/f4/pwm_config.h +++ b/bsp/stm32/libraries/HAL_Drivers/config/f4/pwm_config.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/libraries/HAL_Drivers/config/f4/qspi_config.h b/bsp/stm32/libraries/HAL_Drivers/config/f4/qspi_config.h index 8450dc257f..5089a10bdf 100644 --- a/bsp/stm32/libraries/HAL_Drivers/config/f4/qspi_config.h +++ b/bsp/stm32/libraries/HAL_Drivers/config/f4/qspi_config.h @@ -1,11 +1,11 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * * Change Logs: * Date Author Notes - * 2018-12-22 zylx first version + * 2018-12-22 zylx first version */ #ifndef __QSPI_CONFIG_H__ diff --git a/bsp/stm32/libraries/HAL_Drivers/config/f4/sdio_config.h b/bsp/stm32/libraries/HAL_Drivers/config/f4/sdio_config.h index a8328b1da4..d26002000c 100644 --- a/bsp/stm32/libraries/HAL_Drivers/config/f4/sdio_config.h +++ b/bsp/stm32/libraries/HAL_Drivers/config/f4/sdio_config.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/libraries/HAL_Drivers/config/f4/spi_config.h b/bsp/stm32/libraries/HAL_Drivers/config/f4/spi_config.h index 34b0590eb3..d03b31ce8a 100644 --- a/bsp/stm32/libraries/HAL_Drivers/config/f4/spi_config.h +++ b/bsp/stm32/libraries/HAL_Drivers/config/f4/spi_config.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -27,7 +27,7 @@ extern "C" { } #endif /* SPI1_BUS_CONFIG */ #endif /* BSP_USING_SPI1 */ - + #ifdef BSP_SPI1_TX_USING_DMA #ifndef SPI1_TX_DMA_CONFIG #define SPI1_TX_DMA_CONFIG \ @@ -61,7 +61,7 @@ extern "C" { } #endif /* SPI2_BUS_CONFIG */ #endif /* BSP_USING_SPI2 */ - + #ifdef BSP_SPI2_TX_USING_DMA #ifndef SPI2_TX_DMA_CONFIG #define SPI2_TX_DMA_CONFIG \ @@ -95,7 +95,7 @@ extern "C" { } #endif /* SPI3_BUS_CONFIG */ #endif /* BSP_USING_SPI3 */ - + #ifdef BSP_SPI3_TX_USING_DMA #ifndef SPI3_TX_DMA_CONFIG #define SPI3_TX_DMA_CONFIG \ @@ -129,7 +129,7 @@ extern "C" { } #endif /* SPI4_BUS_CONFIG */ #endif /* BSP_USING_SPI4 */ - + #ifdef BSP_SPI4_TX_USING_DMA #ifndef SPI4_TX_DMA_CONFIG #define SPI4_TX_DMA_CONFIG \ @@ -163,7 +163,7 @@ extern "C" { } #endif /* SPI5_BUS_CONFIG */ #endif /* BSP_USING_SPI5 */ - + #ifdef BSP_SPI5_TX_USING_DMA #ifndef SPI5_TX_DMA_CONFIG #define SPI5_TX_DMA_CONFIG \ diff --git a/bsp/stm32/libraries/HAL_Drivers/config/f4/tim_config.h b/bsp/stm32/libraries/HAL_Drivers/config/f4/tim_config.h index bc08f219b9..72e0239ded 100644 --- a/bsp/stm32/libraries/HAL_Drivers/config/f4/tim_config.h +++ b/bsp/stm32/libraries/HAL_Drivers/config/f4/tim_config.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/libraries/HAL_Drivers/config/f4/uart_config.h b/bsp/stm32/libraries/HAL_Drivers/config/f4/uart_config.h index e42b5a1a9a..acde141c67 100644 --- a/bsp/stm32/libraries/HAL_Drivers/config/f4/uart_config.h +++ b/bsp/stm32/libraries/HAL_Drivers/config/f4/uart_config.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -8,7 +8,7 @@ * 2018-10-30 SummerGift first version * 2019-01-03 zylx modify dma support */ - + #ifndef __UART_CONFIG_H__ #define __UART_CONFIG_H__ @@ -27,7 +27,7 @@ extern "C" { .irq_type = USART1_IRQn, \ } #endif /* UART1_CONFIG */ - + #if defined(BSP_UART1_RX_USING_DMA) #ifndef UART1_DMA_RX_CONFIG #define UART1_DMA_RX_CONFIG \ @@ -74,7 +74,7 @@ extern "C" { } #endif /* UART2_DMA_RX_CONFIG */ #endif /* BSP_UART2_RX_USING_DMA */ - + #if defined(BSP_UART2_TX_USING_DMA) #ifndef UART2_DMA_TX_CONFIG #define UART2_DMA_TX_CONFIG \ @@ -109,7 +109,7 @@ extern "C" { } #endif /* UART3_DMA_RX_CONFIG */ #endif /* BSP_UART3_RX_USING_DMA */ - + #if defined(BSP_UART3_TX_USING_DMA) #ifndef UART3_DMA_TX_CONFIG #define UART3_DMA_TX_CONFIG \ @@ -179,7 +179,7 @@ extern "C" { } #endif /* UART5_DMA_RX_CONFIG */ #endif /* BSP_UART5_RX_USING_DMA */ - + #if defined(BSP_UART5_TX_USING_DMA) #ifndef UART5_DMA_TX_CONFIG #define UART5_DMA_TX_CONFIG \ @@ -214,7 +214,7 @@ extern "C" { } #endif /* UART6_DMA_RX_CONFIG */ #endif /* BSP_UART6_RX_USING_DMA */ - + #if defined(BSP_UART6_TX_USING_DMA) #ifndef UART6_DMA_TX_CONFIG #define UART6_DMA_TX_CONFIG \ @@ -249,7 +249,7 @@ extern "C" { } #endif /* UART7_DMA_RX_CONFIG */ #endif /* BSP_UART7_RX_USING_DMA */ - + #if defined(BSP_UART7_TX_USING_DMA) #ifndef UART7_DMA_TX_CONFIG #define UART7_DMA_TX_CONFIG \ @@ -284,7 +284,7 @@ extern "C" { } #endif /* UART8_DMA_RX_CONFIG */ #endif /* BSP_UART8_RX_USING_DMA */ - + #if defined(BSP_UART8_TX_USING_DMA) #ifndef UART8_DMA_TX_CONFIG #define UART8_DMA_TX_CONFIG \ diff --git a/bsp/stm32/libraries/HAL_Drivers/config/f4/usbd_config.h b/bsp/stm32/libraries/HAL_Drivers/config/f4/usbd_config.h index a6fc9a4c4d..31a648ad12 100644 --- a/bsp/stm32/libraries/HAL_Drivers/config/f4/usbd_config.h +++ b/bsp/stm32/libraries/HAL_Drivers/config/f4/usbd_config.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/libraries/HAL_Drivers/config/f7/adc_config.h b/bsp/stm32/libraries/HAL_Drivers/config/f7/adc_config.h index bda1a06485..711dd21bbd 100644 --- a/bsp/stm32/libraries/HAL_Drivers/config/f7/adc_config.h +++ b/bsp/stm32/libraries/HAL_Drivers/config/f7/adc_config.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/libraries/HAL_Drivers/config/f7/dma_config.h b/bsp/stm32/libraries/HAL_Drivers/config/f7/dma_config.h index f716e23765..43a9955e54 100644 --- a/bsp/stm32/libraries/HAL_Drivers/config/f7/dma_config.h +++ b/bsp/stm32/libraries/HAL_Drivers/config/f7/dma_config.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/libraries/HAL_Drivers/config/f7/pwm_config.h b/bsp/stm32/libraries/HAL_Drivers/config/f7/pwm_config.h index 1a5575de0c..b8ef2d37f7 100644 --- a/bsp/stm32/libraries/HAL_Drivers/config/f7/pwm_config.h +++ b/bsp/stm32/libraries/HAL_Drivers/config/f7/pwm_config.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/libraries/HAL_Drivers/config/f7/qspi_config.h b/bsp/stm32/libraries/HAL_Drivers/config/f7/qspi_config.h index f4477f498b..bee2eb5d82 100644 --- a/bsp/stm32/libraries/HAL_Drivers/config/f7/qspi_config.h +++ b/bsp/stm32/libraries/HAL_Drivers/config/f7/qspi_config.h @@ -1,11 +1,11 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * * Change Logs: * Date Author Notes - * 2018-12-22 zylx first version + * 2018-12-22 zylx first version */ #ifndef __QSPI_CONFIG_H__ diff --git a/bsp/stm32/libraries/HAL_Drivers/config/f7/sdio_config.h b/bsp/stm32/libraries/HAL_Drivers/config/f7/sdio_config.h index ae1e4bbf6e..bea45515c3 100644 --- a/bsp/stm32/libraries/HAL_Drivers/config/f7/sdio_config.h +++ b/bsp/stm32/libraries/HAL_Drivers/config/f7/sdio_config.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/libraries/HAL_Drivers/config/f7/spi_config.h b/bsp/stm32/libraries/HAL_Drivers/config/f7/spi_config.h index ef32a32f4f..26f230d9b1 100644 --- a/bsp/stm32/libraries/HAL_Drivers/config/f7/spi_config.h +++ b/bsp/stm32/libraries/HAL_Drivers/config/f7/spi_config.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -26,7 +26,7 @@ extern "C" { } #endif /* SPI1_BUS_CONFIG */ #endif /* BSP_USING_SPI1 */ - + #ifdef BSP_SPI1_TX_USING_DMA #ifndef SPI1_TX_DMA_CONFIG #define SPI1_TX_DMA_CONFIG \ @@ -60,7 +60,7 @@ extern "C" { } #endif /* SPI2_BUS_CONFIG */ #endif /* BSP_USING_SPI2 */ - + #ifdef BSP_SPI2_TX_USING_DMA #ifndef SPI2_TX_DMA_CONFIG #define SPI2_TX_DMA_CONFIG \ @@ -94,7 +94,7 @@ extern "C" { } #endif /* SPI3_BUS_CONFIG */ #endif /* BSP_USING_SPI3 */ - + #ifdef BSP_SPI3_TX_USING_DMA #ifndef SPI3_TX_DMA_CONFIG #define SPI3_TX_DMA_CONFIG \ @@ -128,7 +128,7 @@ extern "C" { } #endif /* SPI4_BUS_CONFIG */ #endif /* BSP_USING_SPI4 */ - + #ifdef BSP_SPI4_TX_USING_DMA #ifndef SPI4_TX_DMA_CONFIG #define SPI4_TX_DMA_CONFIG \ @@ -162,7 +162,7 @@ extern "C" { } #endif /* SPI5_BUS_CONFIG */ #endif /* BSP_USING_SPI5 */ - + #ifdef BSP_SPI5_TX_USING_DMA #ifndef SPI5_TX_DMA_CONFIG #define SPI5_TX_DMA_CONFIG \ diff --git a/bsp/stm32/libraries/HAL_Drivers/config/f7/tim_config.h b/bsp/stm32/libraries/HAL_Drivers/config/f7/tim_config.h index cd116d9e19..41ef9f9ee0 100644 --- a/bsp/stm32/libraries/HAL_Drivers/config/f7/tim_config.h +++ b/bsp/stm32/libraries/HAL_Drivers/config/f7/tim_config.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/libraries/HAL_Drivers/config/f7/uart_config.h b/bsp/stm32/libraries/HAL_Drivers/config/f7/uart_config.h index 6c5b7c840d..7c6f38b697 100644 --- a/bsp/stm32/libraries/HAL_Drivers/config/f7/uart_config.h +++ b/bsp/stm32/libraries/HAL_Drivers/config/f7/uart_config.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -8,7 +8,7 @@ * 2018-10-30 SummerGift first version * 2019-01-05 zylx modify dma support */ - + #ifndef __UART_CONFIG_H__ #define __UART_CONFIG_H__ @@ -19,7 +19,7 @@ extern "C" { #endif #if defined(BSP_USING_UART1) -#ifndef UART1_CONFIG +#ifndef UART1_CONFIG #define UART1_CONFIG \ { \ .name = "uart1", \ diff --git a/bsp/stm32/libraries/HAL_Drivers/config/g0/adc_config.h b/bsp/stm32/libraries/HAL_Drivers/config/g0/adc_config.h index 739598e7d0..9adaf25fe1 100644 --- a/bsp/stm32/libraries/HAL_Drivers/config/g0/adc_config.h +++ b/bsp/stm32/libraries/HAL_Drivers/config/g0/adc_config.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/libraries/HAL_Drivers/config/g0/dma_config.h b/bsp/stm32/libraries/HAL_Drivers/config/g0/dma_config.h index 39a79dd536..1340f7c4b0 100644 --- a/bsp/stm32/libraries/HAL_Drivers/config/g0/dma_config.h +++ b/bsp/stm32/libraries/HAL_Drivers/config/g0/dma_config.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/libraries/HAL_Drivers/config/g0/pwm_config.h b/bsp/stm32/libraries/HAL_Drivers/config/g0/pwm_config.h index 834903f656..bc9c375b7a 100644 --- a/bsp/stm32/libraries/HAL_Drivers/config/g0/pwm_config.h +++ b/bsp/stm32/libraries/HAL_Drivers/config/g0/pwm_config.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/libraries/HAL_Drivers/config/g0/spi_config.h b/bsp/stm32/libraries/HAL_Drivers/config/g0/spi_config.h index a09ec948a9..a33777977a 100644 --- a/bsp/stm32/libraries/HAL_Drivers/config/g0/spi_config.h +++ b/bsp/stm32/libraries/HAL_Drivers/config/g0/spi_config.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -27,7 +27,7 @@ extern "C" { } #endif /* SPI1_BUS_CONFIG */ #endif /* BSP_USING_SPI1 */ - + #ifdef BSP_SPI1_TX_USING_DMA #ifndef SPI1_TX_DMA_CONFIG #define SPI1_TX_DMA_CONFIG \ @@ -61,7 +61,7 @@ extern "C" { } #endif /* SPI2_BUS_CONFIG */ #endif /* BSP_USING_SPI2 */ - + #ifdef BSP_SPI2_TX_USING_DMA #ifndef SPI2_TX_DMA_CONFIG #define SPI2_TX_DMA_CONFIG \ diff --git a/bsp/stm32/libraries/HAL_Drivers/config/g0/tim_config.h b/bsp/stm32/libraries/HAL_Drivers/config/g0/tim_config.h index 01d3af18f1..ac6e402ac4 100644 --- a/bsp/stm32/libraries/HAL_Drivers/config/g0/tim_config.h +++ b/bsp/stm32/libraries/HAL_Drivers/config/g0/tim_config.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/libraries/HAL_Drivers/config/g0/uart_config.h b/bsp/stm32/libraries/HAL_Drivers/config/g0/uart_config.h index f38baf0b63..3cbb77eefd 100644 --- a/bsp/stm32/libraries/HAL_Drivers/config/g0/uart_config.h +++ b/bsp/stm32/libraries/HAL_Drivers/config/g0/uart_config.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/libraries/HAL_Drivers/config/g4/adc_config.h b/bsp/stm32/libraries/HAL_Drivers/config/g4/adc_config.h index bda1a06485..711dd21bbd 100644 --- a/bsp/stm32/libraries/HAL_Drivers/config/g4/adc_config.h +++ b/bsp/stm32/libraries/HAL_Drivers/config/g4/adc_config.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/libraries/HAL_Drivers/config/g4/dma_config.h b/bsp/stm32/libraries/HAL_Drivers/config/g4/dma_config.h index 46411c5441..419dff4ae7 100644 --- a/bsp/stm32/libraries/HAL_Drivers/config/g4/dma_config.h +++ b/bsp/stm32/libraries/HAL_Drivers/config/g4/dma_config.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/libraries/HAL_Drivers/config/g4/pulse_encoder_config.h b/bsp/stm32/libraries/HAL_Drivers/config/g4/pulse_encoder_config.h index 53320efda1..f9534e0a4c 100644 --- a/bsp/stm32/libraries/HAL_Drivers/config/g4/pulse_encoder_config.h +++ b/bsp/stm32/libraries/HAL_Drivers/config/g4/pulse_encoder_config.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/libraries/HAL_Drivers/config/g4/pwm_config.h b/bsp/stm32/libraries/HAL_Drivers/config/g4/pwm_config.h index 14d4aa2aff..ca382e4742 100644 --- a/bsp/stm32/libraries/HAL_Drivers/config/g4/pwm_config.h +++ b/bsp/stm32/libraries/HAL_Drivers/config/g4/pwm_config.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/libraries/HAL_Drivers/config/g4/qspi_config.h b/bsp/stm32/libraries/HAL_Drivers/config/g4/qspi_config.h index 8450dc257f..5089a10bdf 100644 --- a/bsp/stm32/libraries/HAL_Drivers/config/g4/qspi_config.h +++ b/bsp/stm32/libraries/HAL_Drivers/config/g4/qspi_config.h @@ -1,11 +1,11 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * * Change Logs: * Date Author Notes - * 2018-12-22 zylx first version + * 2018-12-22 zylx first version */ #ifndef __QSPI_CONFIG_H__ diff --git a/bsp/stm32/libraries/HAL_Drivers/config/g4/sdio_config.h b/bsp/stm32/libraries/HAL_Drivers/config/g4/sdio_config.h index 7d6837d74f..a61749ceaa 100644 --- a/bsp/stm32/libraries/HAL_Drivers/config/g4/sdio_config.h +++ b/bsp/stm32/libraries/HAL_Drivers/config/g4/sdio_config.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/libraries/HAL_Drivers/config/g4/spi_config.h b/bsp/stm32/libraries/HAL_Drivers/config/g4/spi_config.h index 34b0590eb3..d03b31ce8a 100644 --- a/bsp/stm32/libraries/HAL_Drivers/config/g4/spi_config.h +++ b/bsp/stm32/libraries/HAL_Drivers/config/g4/spi_config.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -27,7 +27,7 @@ extern "C" { } #endif /* SPI1_BUS_CONFIG */ #endif /* BSP_USING_SPI1 */ - + #ifdef BSP_SPI1_TX_USING_DMA #ifndef SPI1_TX_DMA_CONFIG #define SPI1_TX_DMA_CONFIG \ @@ -61,7 +61,7 @@ extern "C" { } #endif /* SPI2_BUS_CONFIG */ #endif /* BSP_USING_SPI2 */ - + #ifdef BSP_SPI2_TX_USING_DMA #ifndef SPI2_TX_DMA_CONFIG #define SPI2_TX_DMA_CONFIG \ @@ -95,7 +95,7 @@ extern "C" { } #endif /* SPI3_BUS_CONFIG */ #endif /* BSP_USING_SPI3 */ - + #ifdef BSP_SPI3_TX_USING_DMA #ifndef SPI3_TX_DMA_CONFIG #define SPI3_TX_DMA_CONFIG \ @@ -129,7 +129,7 @@ extern "C" { } #endif /* SPI4_BUS_CONFIG */ #endif /* BSP_USING_SPI4 */ - + #ifdef BSP_SPI4_TX_USING_DMA #ifndef SPI4_TX_DMA_CONFIG #define SPI4_TX_DMA_CONFIG \ @@ -163,7 +163,7 @@ extern "C" { } #endif /* SPI5_BUS_CONFIG */ #endif /* BSP_USING_SPI5 */ - + #ifdef BSP_SPI5_TX_USING_DMA #ifndef SPI5_TX_DMA_CONFIG #define SPI5_TX_DMA_CONFIG \ diff --git a/bsp/stm32/libraries/HAL_Drivers/config/g4/tim_config.h b/bsp/stm32/libraries/HAL_Drivers/config/g4/tim_config.h index cd116d9e19..41ef9f9ee0 100644 --- a/bsp/stm32/libraries/HAL_Drivers/config/g4/tim_config.h +++ b/bsp/stm32/libraries/HAL_Drivers/config/g4/tim_config.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/libraries/HAL_Drivers/config/g4/uart_config.h b/bsp/stm32/libraries/HAL_Drivers/config/g4/uart_config.h index 5a77643a55..54a2cc380f 100644 --- a/bsp/stm32/libraries/HAL_Drivers/config/g4/uart_config.h +++ b/bsp/stm32/libraries/HAL_Drivers/config/g4/uart_config.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -9,7 +9,7 @@ * 2019-01-03 zylx modify dma support * 2019-10-03 xuzhuoyi modify for STM32G4 */ - + #ifndef __UART_CONFIG_H__ #define __UART_CONFIG_H__ @@ -50,7 +50,7 @@ extern "C" { .irq_type = USART1_IRQn, \ } #endif /* UART1_CONFIG */ - + #if defined(BSP_UART1_RX_USING_DMA) #ifndef UART1_DMA_RX_CONFIG #define UART1_DMA_RX_CONFIG \ @@ -97,7 +97,7 @@ extern "C" { } #endif /* UART2_DMA_RX_CONFIG */ #endif /* BSP_UART2_RX_USING_DMA */ - + #if defined(BSP_UART2_TX_USING_DMA) #ifndef UART2_DMA_TX_CONFIG #define UART2_DMA_TX_CONFIG \ @@ -132,7 +132,7 @@ extern "C" { } #endif /* UART3_DMA_RX_CONFIG */ #endif /* BSP_UART3_RX_USING_DMA */ - + #if defined(BSP_UART3_TX_USING_DMA) #ifndef UART3_DMA_TX_CONFIG #define UART3_DMA_TX_CONFIG \ @@ -202,7 +202,7 @@ extern "C" { } #endif /* UART5_DMA_RX_CONFIG */ #endif /* BSP_UART5_RX_USING_DMA */ - + #if defined(BSP_UART5_TX_USING_DMA) #ifndef UART5_DMA_TX_CONFIG #define UART5_DMA_TX_CONFIG \ diff --git a/bsp/stm32/libraries/HAL_Drivers/config/g4/usbd_config.h b/bsp/stm32/libraries/HAL_Drivers/config/g4/usbd_config.h index a6fc9a4c4d..31a648ad12 100644 --- a/bsp/stm32/libraries/HAL_Drivers/config/g4/usbd_config.h +++ b/bsp/stm32/libraries/HAL_Drivers/config/g4/usbd_config.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/libraries/HAL_Drivers/config/h7/adc_config.h b/bsp/stm32/libraries/HAL_Drivers/config/h7/adc_config.h index 0a51a07719..28e31f133a 100644 --- a/bsp/stm32/libraries/HAL_Drivers/config/h7/adc_config.h +++ b/bsp/stm32/libraries/HAL_Drivers/config/h7/adc_config.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/libraries/HAL_Drivers/config/h7/dma_config.h b/bsp/stm32/libraries/HAL_Drivers/config/h7/dma_config.h index fd8a3d2371..2164bf74f3 100644 --- a/bsp/stm32/libraries/HAL_Drivers/config/h7/dma_config.h +++ b/bsp/stm32/libraries/HAL_Drivers/config/h7/dma_config.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/libraries/HAL_Drivers/config/h7/pwm_config.h b/bsp/stm32/libraries/HAL_Drivers/config/h7/pwm_config.h index 1a5575de0c..b8ef2d37f7 100644 --- a/bsp/stm32/libraries/HAL_Drivers/config/h7/pwm_config.h +++ b/bsp/stm32/libraries/HAL_Drivers/config/h7/pwm_config.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/libraries/HAL_Drivers/config/h7/qspi_config.h b/bsp/stm32/libraries/HAL_Drivers/config/h7/qspi_config.h index f4477f498b..bee2eb5d82 100644 --- a/bsp/stm32/libraries/HAL_Drivers/config/h7/qspi_config.h +++ b/bsp/stm32/libraries/HAL_Drivers/config/h7/qspi_config.h @@ -1,11 +1,11 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * * Change Logs: * Date Author Notes - * 2018-12-22 zylx first version + * 2018-12-22 zylx first version */ #ifndef __QSPI_CONFIG_H__ diff --git a/bsp/stm32/libraries/HAL_Drivers/config/h7/sdio_config.h b/bsp/stm32/libraries/HAL_Drivers/config/h7/sdio_config.h index 220a615c47..eee9d103ba 100644 --- a/bsp/stm32/libraries/HAL_Drivers/config/h7/sdio_config.h +++ b/bsp/stm32/libraries/HAL_Drivers/config/h7/sdio_config.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/libraries/HAL_Drivers/config/h7/spi_config.h b/bsp/stm32/libraries/HAL_Drivers/config/h7/spi_config.h index ef32a32f4f..26f230d9b1 100644 --- a/bsp/stm32/libraries/HAL_Drivers/config/h7/spi_config.h +++ b/bsp/stm32/libraries/HAL_Drivers/config/h7/spi_config.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -26,7 +26,7 @@ extern "C" { } #endif /* SPI1_BUS_CONFIG */ #endif /* BSP_USING_SPI1 */ - + #ifdef BSP_SPI1_TX_USING_DMA #ifndef SPI1_TX_DMA_CONFIG #define SPI1_TX_DMA_CONFIG \ @@ -60,7 +60,7 @@ extern "C" { } #endif /* SPI2_BUS_CONFIG */ #endif /* BSP_USING_SPI2 */ - + #ifdef BSP_SPI2_TX_USING_DMA #ifndef SPI2_TX_DMA_CONFIG #define SPI2_TX_DMA_CONFIG \ @@ -94,7 +94,7 @@ extern "C" { } #endif /* SPI3_BUS_CONFIG */ #endif /* BSP_USING_SPI3 */ - + #ifdef BSP_SPI3_TX_USING_DMA #ifndef SPI3_TX_DMA_CONFIG #define SPI3_TX_DMA_CONFIG \ @@ -128,7 +128,7 @@ extern "C" { } #endif /* SPI4_BUS_CONFIG */ #endif /* BSP_USING_SPI4 */ - + #ifdef BSP_SPI4_TX_USING_DMA #ifndef SPI4_TX_DMA_CONFIG #define SPI4_TX_DMA_CONFIG \ @@ -162,7 +162,7 @@ extern "C" { } #endif /* SPI5_BUS_CONFIG */ #endif /* BSP_USING_SPI5 */ - + #ifdef BSP_SPI5_TX_USING_DMA #ifndef SPI5_TX_DMA_CONFIG #define SPI5_TX_DMA_CONFIG \ diff --git a/bsp/stm32/libraries/HAL_Drivers/config/h7/tim_config.h b/bsp/stm32/libraries/HAL_Drivers/config/h7/tim_config.h index cd116d9e19..41ef9f9ee0 100644 --- a/bsp/stm32/libraries/HAL_Drivers/config/h7/tim_config.h +++ b/bsp/stm32/libraries/HAL_Drivers/config/h7/tim_config.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/libraries/HAL_Drivers/config/h7/uart_config.h b/bsp/stm32/libraries/HAL_Drivers/config/h7/uart_config.h index f60d2be196..871cddd2db 100644 --- a/bsp/stm32/libraries/HAL_Drivers/config/h7/uart_config.h +++ b/bsp/stm32/libraries/HAL_Drivers/config/h7/uart_config.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -8,7 +8,7 @@ * 2018-10-30 SummerGift first version * 2019-01-05 zylx modify dma support */ - + #ifndef __UART_CONFIG_H__ #define __UART_CONFIG_H__ @@ -19,7 +19,7 @@ extern "C" { #endif #if defined(BSP_USING_UART1) -#ifndef UART1_CONFIG +#ifndef UART1_CONFIG #define UART1_CONFIG \ { \ .name = "uart1", \ @@ -74,7 +74,7 @@ extern "C" { } #endif /* UART2_DMA_TX_CONFIG */ #endif /* BSP_UART2_TX_USING_DMA */ - + #if defined(BSP_USING_UART3) #ifndef UART3_CONFIG #define UART3_CONFIG \ diff --git a/bsp/stm32/libraries/HAL_Drivers/config/h7/usbd_config.h b/bsp/stm32/libraries/HAL_Drivers/config/h7/usbd_config.h index a6fc9a4c4d..31a648ad12 100644 --- a/bsp/stm32/libraries/HAL_Drivers/config/h7/usbd_config.h +++ b/bsp/stm32/libraries/HAL_Drivers/config/h7/usbd_config.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/libraries/HAL_Drivers/config/l0/dma_config.h b/bsp/stm32/libraries/HAL_Drivers/config/l0/dma_config.h index 803e4706ef..9477886ba5 100644 --- a/bsp/stm32/libraries/HAL_Drivers/config/l0/dma_config.h +++ b/bsp/stm32/libraries/HAL_Drivers/config/l0/dma_config.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/libraries/HAL_Drivers/config/l0/uart_config.h b/bsp/stm32/libraries/HAL_Drivers/config/l0/uart_config.h index ea5e767aed..649ec1f4ec 100644 --- a/bsp/stm32/libraries/HAL_Drivers/config/l0/uart_config.h +++ b/bsp/stm32/libraries/HAL_Drivers/config/l0/uart_config.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -49,7 +49,7 @@ extern "C" { } #endif /* UART2_CONFIG */ #endif /* BSP_USING_UART2 */ - + #if defined(BSP_UART2_RX_USING_DMA) #ifndef UART2_DMA_RX_CONFIG #define UART2_DMA_RX_CONFIG \ diff --git a/bsp/stm32/libraries/HAL_Drivers/config/l4/adc_config.h b/bsp/stm32/libraries/HAL_Drivers/config/l4/adc_config.h index 47fe0139b1..cb3ac94524 100644 --- a/bsp/stm32/libraries/HAL_Drivers/config/l4/adc_config.h +++ b/bsp/stm32/libraries/HAL_Drivers/config/l4/adc_config.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/libraries/HAL_Drivers/config/l4/dma_config.h b/bsp/stm32/libraries/HAL_Drivers/config/l4/dma_config.h index c86148bf7d..0762f9048d 100644 --- a/bsp/stm32/libraries/HAL_Drivers/config/l4/dma_config.h +++ b/bsp/stm32/libraries/HAL_Drivers/config/l4/dma_config.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/libraries/HAL_Drivers/config/l4/pwm_config.h b/bsp/stm32/libraries/HAL_Drivers/config/l4/pwm_config.h index 50ea3791b6..c4d4bcf202 100644 --- a/bsp/stm32/libraries/HAL_Drivers/config/l4/pwm_config.h +++ b/bsp/stm32/libraries/HAL_Drivers/config/l4/pwm_config.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/libraries/HAL_Drivers/config/l4/qspi_config.h b/bsp/stm32/libraries/HAL_Drivers/config/l4/qspi_config.h index 4714c119f0..fa8228c6d4 100644 --- a/bsp/stm32/libraries/HAL_Drivers/config/l4/qspi_config.h +++ b/bsp/stm32/libraries/HAL_Drivers/config/l4/qspi_config.h @@ -1,11 +1,11 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * * Change Logs: * Date Author Notes - * 2018-12-22 zylx first version + * 2018-12-22 zylx first version */ #ifndef __QSPI_CONFIG_H__ @@ -28,7 +28,7 @@ extern "C" { } #endif /* QSPI_BUS_CONFIG */ #endif /* BSP_USING_QSPI */ - + #ifdef BSP_QSPI_USING_DMA #ifndef QSPI_DMA_CONFIG #define QSPI_DMA_CONFIG \ diff --git a/bsp/stm32/libraries/HAL_Drivers/config/l4/sdio_config.h b/bsp/stm32/libraries/HAL_Drivers/config/l4/sdio_config.h index 71811dba84..fa066e5cfc 100644 --- a/bsp/stm32/libraries/HAL_Drivers/config/l4/sdio_config.h +++ b/bsp/stm32/libraries/HAL_Drivers/config/l4/sdio_config.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/libraries/HAL_Drivers/config/l4/spi_config.h b/bsp/stm32/libraries/HAL_Drivers/config/l4/spi_config.h index d7518805b3..d510ca379d 100644 --- a/bsp/stm32/libraries/HAL_Drivers/config/l4/spi_config.h +++ b/bsp/stm32/libraries/HAL_Drivers/config/l4/spi_config.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/libraries/HAL_Drivers/config/l4/tim_config.h b/bsp/stm32/libraries/HAL_Drivers/config/l4/tim_config.h index 4df13ca087..b90879c155 100644 --- a/bsp/stm32/libraries/HAL_Drivers/config/l4/tim_config.h +++ b/bsp/stm32/libraries/HAL_Drivers/config/l4/tim_config.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/libraries/HAL_Drivers/config/l4/uart_config.h b/bsp/stm32/libraries/HAL_Drivers/config/l4/uart_config.h index aa71112655..297ab30d56 100644 --- a/bsp/stm32/libraries/HAL_Drivers/config/l4/uart_config.h +++ b/bsp/stm32/libraries/HAL_Drivers/config/l4/uart_config.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -60,7 +60,7 @@ extern "C" { .dma_irq = UART1_RX_DMA_IRQ, \ } #endif /* UART1_DMA_RX_CONFIG */ -#endif /* BSP_UART1_RX_USING_DMA */ +#endif /* BSP_UART1_RX_USING_DMA */ #if defined(BSP_UART1_TX_USING_DMA) #ifndef UART1_DMA_TX_CONFIG @@ -146,6 +146,6 @@ extern "C" { #ifdef __cplusplus } -#endif +#endif #endif diff --git a/bsp/stm32/libraries/HAL_Drivers/config/l4/usbd_config.h b/bsp/stm32/libraries/HAL_Drivers/config/l4/usbd_config.h index a6fc9a4c4d..31a648ad12 100644 --- a/bsp/stm32/libraries/HAL_Drivers/config/l4/usbd_config.h +++ b/bsp/stm32/libraries/HAL_Drivers/config/l4/usbd_config.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_adc.c b/bsp/stm32/libraries/HAL_Drivers/drv_adc.c index 97ddc4d818..edf704f653 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drv_adc.c +++ b/bsp/stm32/libraries/HAL_Drivers/drv_adc.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_can.c b/bsp/stm32/libraries/HAL_Drivers/drv_can.c index c7d0428d48..83d58ec800 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drv_can.c +++ b/bsp/stm32/libraries/HAL_Drivers/drv_can.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -305,8 +305,8 @@ static rt_err_t _can_control(struct rt_can_device *can, int cmd, void *arg) { drv_can->FilterConfig.FilterBank = filter_cfg->items[i].hdr; drv_can->FilterConfig.FilterIdHigh = (filter_cfg->items[i].id >> 13) & 0xFFFF; - drv_can->FilterConfig.FilterIdLow = ((filter_cfg->items[i].id << 3) | - (filter_cfg->items[i].ide << 2) | + drv_can->FilterConfig.FilterIdLow = ((filter_cfg->items[i].id << 3) | + (filter_cfg->items[i].ide << 2) | (filter_cfg->items[i].rtr << 1)) & 0xFFFF; drv_can->FilterConfig.FilterMaskIdHigh = (filter_cfg->items[i].mask >> 16) & 0xFFFF; drv_can->FilterConfig.FilterMaskIdLow = filter_cfg->items[i].mask & 0xFFFF; diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_can.h b/bsp/stm32/libraries/HAL_Drivers/drv_can.h index b0ae3072e6..900793a153 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drv_can.h +++ b/bsp/stm32/libraries/HAL_Drivers/drv_can.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_common.c b/bsp/stm32/libraries/HAL_Drivers/drv_common.c index 083c1e4c3d..d01fafdda6 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drv_common.c +++ b/bsp/stm32/libraries/HAL_Drivers/drv_common.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_common.h b/bsp/stm32/libraries/HAL_Drivers/drv_common.h index bffedddcd0..c45041129d 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drv_common.h +++ b/bsp/stm32/libraries/HAL_Drivers/drv_common.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_config.h b/bsp/stm32/libraries/HAL_Drivers/drv_config.h index cc1c3f5bde..5be22fc56a 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drv_config.h +++ b/bsp/stm32/libraries/HAL_Drivers/drv_config.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -7,7 +7,7 @@ * Date Author Notes * 2018-10-30 SummerGift first version */ - + #ifndef __DRV_CONFIG_H__ #define __DRV_CONFIG_H__ @@ -42,7 +42,7 @@ extern "C" { #include "f2/adc_config.h" #include "f2/tim_config.h" #include "f2/sdio_config.h" -#include "f2/pwm_config.h" +#include "f2/pwm_config.h" #elif defined(SOC_SERIES_STM32F4) #include "f4/dma_config.h" #include "f4/uart_config.h" diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_dma.h b/bsp/stm32/libraries/HAL_Drivers/drv_dma.h index 256068d5e1..d22a3b23d7 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drv_dma.h +++ b/bsp/stm32/libraries/HAL_Drivers/drv_dma.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -19,10 +19,10 @@ extern "C" { #endif #if defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32L0) \ - || defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32G0) || defined(SOC_SERIES_STM32G4) + || defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32G0) || defined(SOC_SERIES_STM32G4) #define DMA_INSTANCE_TYPE DMA_Channel_TypeDef #elif defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7)\ - || defined(SOC_SERIES_STM32H7) + || defined(SOC_SERIES_STM32H7) #define DMA_INSTANCE_TYPE DMA_Stream_TypeDef #endif /* defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32L4) */ diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_eth.c b/bsp/stm32/libraries/HAL_Drivers/drv_eth.c index 8b191453cb..0506f6495c 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drv_eth.c +++ b/bsp/stm32/libraries/HAL_Drivers/drv_eth.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_eth.h b/bsp/stm32/libraries/HAL_Drivers/drv_eth.h index 07f25b107e..44eb75bbb8 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drv_eth.h +++ b/bsp/stm32/libraries/HAL_Drivers/drv_eth.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_flash/drv_flash.h b/bsp/stm32/libraries/HAL_Drivers/drv_flash/drv_flash.h index 3a9d5be061..8243e80bbf 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drv_flash/drv_flash.h +++ b/bsp/stm32/libraries/HAL_Drivers/drv_flash/drv_flash.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_flash/drv_flash_f0.c b/bsp/stm32/libraries/HAL_Drivers/drv_flash/drv_flash_f0.c index b8d42c8492..778fbe1a84 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drv_flash/drv_flash_f0.c +++ b/bsp/stm32/libraries/HAL_Drivers/drv_flash/drv_flash_f0.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_flash/drv_flash_f1.c b/bsp/stm32/libraries/HAL_Drivers/drv_flash/drv_flash_f1.c index 81625f0fa1..f17f2867ae 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drv_flash/drv_flash_f1.c +++ b/bsp/stm32/libraries/HAL_Drivers/drv_flash/drv_flash_f1.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -153,7 +153,7 @@ int stm32_flash_erase_bank(uint32_t bank, rt_uint32_t addr, size_t size) EraseInitStruct.PageAddress = GetPage(addr); EraseInitStruct.NbPages = (size + FLASH_PAGE_SIZE - 1) / FLASH_PAGE_SIZE; EraseInitStruct.Banks = bank; - + if (HAL_FLASHEx_Erase(&EraseInitStruct, &PAGEError) != HAL_OK) { result = -RT_ERROR; @@ -184,8 +184,8 @@ __exit: */ int stm32_flash_erase(rt_uint32_t addr, size_t size) { -#if defined(FLASH_BANK2_END) - rt_err_t result = RT_EOK; +#if defined(FLASH_BANK2_END) + rt_err_t result = RT_EOK; rt_uint32_t addr_bank1 = 0; rt_uint32_t size_bank1 = 0; rt_uint32_t addr_bank2 = 0; @@ -201,7 +201,7 @@ int stm32_flash_erase(rt_uint32_t addr, size_t size) { size_bank1 = 0; addr_bank2 = addr; - size_bank2 = size; + size_bank2 = size; } else { @@ -220,7 +220,7 @@ int stm32_flash_erase(rt_uint32_t addr, size_t size) goto __exit; } } - + if(size_bank2) { LOG_D("bank2: addr (0x%p), size %d", (void *)addr_bank2, size_bank2); @@ -231,12 +231,12 @@ int stm32_flash_erase(rt_uint32_t addr, size_t size) } } -__exit: +__exit: if(result != RT_EOK) { return result; } - + return size_bank1 + size_bank2; #else return stm32_flash_erase_bank(FLASH_BANK_1, addr, size); diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_flash/drv_flash_f2.c b/bsp/stm32/libraries/HAL_Drivers/drv_flash/drv_flash_f2.c index b3ddf1ae6c..d716b46ffe 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drv_flash/drv_flash_f2.c +++ b/bsp/stm32/libraries/HAL_Drivers/drv_flash/drv_flash_f2.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_flash/drv_flash_f4.c b/bsp/stm32/libraries/HAL_Drivers/drv_flash/drv_flash_f4.c index a9ed886c32..c65ecb20f3 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drv_flash/drv_flash_f4.c +++ b/bsp/stm32/libraries/HAL_Drivers/drv_flash/drv_flash_f4.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_flash/drv_flash_f7.c b/bsp/stm32/libraries/HAL_Drivers/drv_flash/drv_flash_f7.c index 276c9ba0b9..522dc8e6a7 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drv_flash/drv_flash_f7.c +++ b/bsp/stm32/libraries/HAL_Drivers/drv_flash/drv_flash_f7.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -43,7 +43,7 @@ static rt_uint32_t GetSector(rt_uint32_t Address) { uint32_t sector = 0; - + #if defined (FLASH_OPTCR_nDBANK) FLASH_OBProgramInitTypeDef OBInit; uint32_t nbank = 0; @@ -53,7 +53,7 @@ static rt_uint32_t GetSector(rt_uint32_t Address) nbank = ((OBInit.USERConfig & 0x20000000U) >> 29); //1:single bank mode if (1 == nbank) - { + { if ((Address < ADDR_FLASH_SECTOR_1) && (Address >= ADDR_FLASH_SECTOR_0)) { sector = FLASH_SECTOR_0; @@ -98,7 +98,7 @@ static rt_uint32_t GetSector(rt_uint32_t Address) { sector = FLASH_SECTOR_10; } - else + else { sector = FLASH_SECTOR_11; } @@ -153,7 +153,7 @@ static rt_uint32_t GetSector(rt_uint32_t Address) { sector = FLASH_SECTOR_10; } - else + else { sector = FLASH_SECTOR_11; } diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_flash/drv_flash_l4.c b/bsp/stm32/libraries/HAL_Drivers/drv_flash/drv_flash_l4.c index 00f84711f5..4da4207961 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drv_flash/drv_flash_l4.c +++ b/bsp/stm32/libraries/HAL_Drivers/drv_flash/drv_flash_l4.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_gpio.c b/bsp/stm32/libraries/HAL_Drivers/drv_gpio.c index fb906a242f..dffce87f5f 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drv_gpio.c +++ b/bsp/stm32/libraries/HAL_Drivers/drv_gpio.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -71,7 +71,7 @@ static const struct pin_irq_map pin_irq_map[] = {GPIO_PIN_12, EXTI4_15_IRQn}, {GPIO_PIN_13, EXTI4_15_IRQn}, {GPIO_PIN_14, EXTI4_15_IRQn}, - {GPIO_PIN_15, EXTI4_15_IRQn}, + {GPIO_PIN_15, EXTI4_15_IRQn}, #else {GPIO_PIN_0, EXTI0_IRQn}, {GPIO_PIN_1, EXTI1_IRQn}, diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_gpio.h b/bsp/stm32/libraries/HAL_Drivers/drv_gpio.h index 52d4d9a2a9..13b51389bb 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drv_gpio.h +++ b/bsp/stm32/libraries/HAL_Drivers/drv_gpio.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_hwtimer.c b/bsp/stm32/libraries/HAL_Drivers/drv_hwtimer.c index ce1140eb77..92944510e2 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drv_hwtimer.c +++ b/bsp/stm32/libraries/HAL_Drivers/drv_hwtimer.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -173,10 +173,10 @@ static void pclkx_doubler_get(rt_uint32_t *pclk1_doubler, rt_uint32_t *pclk2_dou } if (RCC_ClkInitStruct.APB2_Div != RCC_APB2_DIV1) { - *pclk2_doubler = 2; + *pclk2_doubler = 2; } #else - if (RCC_ClkInitStruct.APB1CLKDivider != RCC_HCLK_DIV1) + if (RCC_ClkInitStruct.APB1CLKDivider != RCC_HCLK_DIV1) { *pclk1_doubler = 2; } @@ -282,7 +282,7 @@ static rt_err_t timer_start(rt_hwtimer_t *timer, rt_uint32_t t, rt_hwtimer_mode_ { tim->Instance->CR1 &= (~TIM_OPMODE_SINGLE); } - + /* start timer */ if (HAL_TIM_Base_Start_IT(tim) != HAL_OK) { diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_lcd.c b/bsp/stm32/libraries/HAL_Drivers/drv_lcd.c index 1eee5b69a0..5d170016b8 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drv_lcd.c +++ b/bsp/stm32/libraries/HAL_Drivers/drv_lcd.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -258,7 +258,7 @@ void turn_on_lcd_backlight(void) #else void turn_on_lcd_backlight(void) { - + } #endif diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_lcd_mipi.c b/bsp/stm32/libraries/HAL_Drivers/drv_lcd_mipi.c index 3928353153..275a18e925 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drv_lcd_mipi.c +++ b/bsp/stm32/libraries/HAL_Drivers/drv_lcd_mipi.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -7,7 +7,7 @@ * Date Author Notes * 2019-05-23 WillianChan first version */ - + #include <board.h> #ifdef BSP_USING_LCD_MIPI @@ -23,7 +23,7 @@ struct stm32_lcd struct rt_device parent; struct rt_device_graphic_info info; }; -static struct stm32_lcd lcd; +static struct stm32_lcd lcd; extern void stm32_mipi_lcd_init(void); extern void stm32_mipi_lcd_config(rt_uint32_t pixel_format); @@ -32,14 +32,14 @@ extern void stm32_mipi_display_off(void); rt_err_t ltdc_init(void) { - uint32_t lcd_clock = 27429; + uint32_t lcd_clock = 27429; uint32_t lanebyte_clock = 62500; - + uint32_t HSA = LCD_HSYNC, HFP = LCD_HFP, HBP = LCD_HBP, HACT = LCD_WIDTH; uint32_t VSA = LCD_VSYNC, VFP = LCD_VFP, VBP = LCD_VBP, VACT = LCD_HEIGHT; stm32_mipi_lcd_init(); - + __HAL_RCC_LTDC_CLK_ENABLE(); __HAL_RCC_LTDC_FORCE_RESET(); __HAL_RCC_LTDC_RELEASE_RESET(); @@ -47,92 +47,92 @@ rt_err_t ltdc_init(void) __HAL_RCC_DSI_CLK_ENABLE(); __HAL_RCC_DSI_FORCE_RESET(); __HAL_RCC_DSI_RELEASE_RESET(); - + RCC_PeriphCLKInitTypeDef PeriphClkInitStruct; - + PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_LTDC; PeriphClkInitStruct.PLLSAI.PLLSAIN = 384; PeriphClkInitStruct.PLLSAI.PLLSAIR = 7; PeriphClkInitStruct.PLLSAIDivR = RCC_PLLSAIDIVR_2; HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct); - + HAL_NVIC_SetPriority(LTDC_IRQn, 3, 0); HAL_NVIC_SetPriority(DSI_IRQn, 3, 0); HAL_NVIC_EnableIRQ(LTDC_IRQn); HAL_NVIC_EnableIRQ(DSI_IRQn); - + DSI_PLLInitTypeDef dsi_pll; - - hdsi.Instance = DSI; + + hdsi.Instance = DSI; hdsi.Init.NumberOfLanes = DSI_TWO_DATA_LANES; hdsi.Init.TXEscapeCkdiv = lanebyte_clock / 15620; - + dsi_pll.PLLNDIV = 125; dsi_pll.PLLIDF = DSI_PLL_IN_DIV2; - dsi_pll.PLLODF = DSI_PLL_OUT_DIV1; - + dsi_pll.PLLODF = DSI_PLL_OUT_DIV1; + HAL_DSI_DeInit(&hdsi); - HAL_DSI_Init(&hdsi, &dsi_pll); - + HAL_DSI_Init(&hdsi, &dsi_pll); + hdsi_video.VirtualChannelID = 0; hdsi_video.ColorCoding = DSI_RGB888; hdsi_video.VSPolarity = DSI_VSYNC_ACTIVE_HIGH; hdsi_video.HSPolarity = DSI_HSYNC_ACTIVE_HIGH; hdsi_video.DEPolarity = DSI_DATA_ENABLE_ACTIVE_HIGH; - hdsi_video.Mode = DSI_VID_MODE_BURST; + hdsi_video.Mode = DSI_VID_MODE_BURST; hdsi_video.NullPacketSize = 0xFFF; hdsi_video.NumberOfChunks = 0; - hdsi_video.PacketSize = HACT; + hdsi_video.PacketSize = HACT; hdsi_video.HorizontalSyncActive = (HSA * lanebyte_clock) / lcd_clock; hdsi_video.HorizontalBackPorch = (HBP * lanebyte_clock) / lcd_clock; - hdsi_video.HorizontalLine = ((HACT + HSA + HBP + HFP) * lanebyte_clock) / lcd_clock; + hdsi_video.HorizontalLine = ((HACT + HSA + HBP + HFP) * lanebyte_clock) / lcd_clock; hdsi_video.VerticalSyncActive = VSA; hdsi_video.VerticalBackPorch = VBP; hdsi_video.VerticalFrontPorch = VFP; - hdsi_video.VerticalActive = VACT; - hdsi_video.LPCommandEnable = DSI_LP_COMMAND_ENABLE; + hdsi_video.VerticalActive = VACT; + hdsi_video.LPCommandEnable = DSI_LP_COMMAND_ENABLE; hdsi_video.LPLargestPacketSize = 16; hdsi_video.LPVACTLargestPacketSize = 0; - hdsi_video.LPHorizontalFrontPorchEnable = DSI_LP_HFP_ENABLE; - hdsi_video.LPHorizontalBackPorchEnable = DSI_LP_HBP_ENABLE; - hdsi_video.LPVerticalActiveEnable = DSI_LP_VACT_ENABLE; - hdsi_video.LPVerticalFrontPorchEnable = DSI_LP_VFP_ENABLE; - hdsi_video.LPVerticalBackPorchEnable = DSI_LP_VBP_ENABLE; - hdsi_video.LPVerticalSyncActiveEnable = DSI_LP_VSYNC_ENABLE; - HAL_DSI_ConfigVideoMode(&hdsi, &hdsi_video); - + hdsi_video.LPHorizontalFrontPorchEnable = DSI_LP_HFP_ENABLE; + hdsi_video.LPHorizontalBackPorchEnable = DSI_LP_HBP_ENABLE; + hdsi_video.LPVerticalActiveEnable = DSI_LP_VACT_ENABLE; + hdsi_video.LPVerticalFrontPorchEnable = DSI_LP_VFP_ENABLE; + hdsi_video.LPVerticalBackPorchEnable = DSI_LP_VBP_ENABLE; + hdsi_video.LPVerticalSyncActiveEnable = DSI_LP_VSYNC_ENABLE; + HAL_DSI_ConfigVideoMode(&hdsi, &hdsi_video); + DSI_PHY_TimerTypeDef dsi_phy; - + dsi_phy.ClockLaneHS2LPTime = 35; dsi_phy.ClockLaneLP2HSTime = 35; dsi_phy.DataLaneHS2LPTime = 35; dsi_phy.DataLaneLP2HSTime = 35; dsi_phy.DataLaneMaxReadTime = 0; dsi_phy.StopWaitTime = 10; - HAL_DSI_ConfigPhyTimer(&hdsi, &dsi_phy); - + HAL_DSI_ConfigPhyTimer(&hdsi, &dsi_phy); + hltdc.Instance = LTDC; - + hltdc.Init.PCPolarity = LTDC_PCPOLARITY_IPC; hltdc.Init.HorizontalSync = (HSA - 1); hltdc.Init.AccumulatedHBP = (HSA + HBP - 1); hltdc.Init.AccumulatedActiveW = (LCD_WIDTH + HSA + HBP - 1); hltdc.Init.TotalWidth = (LCD_WIDTH + HSA + HBP + HFP - 1); - + hltdc.LayerCfg->ImageWidth = LCD_WIDTH; - hltdc.LayerCfg->ImageHeight = LCD_HEIGHT; + hltdc.LayerCfg->ImageHeight = LCD_HEIGHT; hltdc.Init.Backcolor.Blue = 0x00; hltdc.Init.Backcolor.Green = 0x00; hltdc.Init.Backcolor.Red = 0x00; - HAL_LTDCEx_StructInitFromVideoConfig(&hltdc, &(hdsi_video)); + HAL_LTDCEx_StructInitFromVideoConfig(&hltdc, &(hdsi_video)); HAL_LTDC_Init(&(hltdc)); - - HAL_DSI_Start(&(hdsi)); + + HAL_DSI_Start(&(hdsi)); stm32_mipi_lcd_config(RTGRAPHIC_PIXEL_FORMAT_ARGB888); - - return RT_EOK; + + return RT_EOK; } void ltdc_layer_init(uint16_t index, uint32_t framebuffer) @@ -140,7 +140,7 @@ void ltdc_layer_init(uint16_t index, uint32_t framebuffer) LTDC_LayerCfgTypeDef layer_cfg; layer_cfg.WindowX0 = 0; - layer_cfg.WindowX1 = LCD_WIDTH; + layer_cfg.WindowX1 = LCD_WIDTH; layer_cfg.WindowY0 = 0; layer_cfg.WindowY1 = LCD_HEIGHT; layer_cfg.PixelFormat = LTDC_PIXEL_FORMAT_ARGB8888; @@ -161,7 +161,7 @@ void ltdc_layer_init(uint16_t index, uint32_t framebuffer) void LTDC_IRQHandler(void) { rt_interrupt_enter(); - HAL_LTDC_IRQHandler(&hltdc); + HAL_LTDC_IRQHandler(&hltdc); rt_interrupt_leave(); } @@ -171,11 +171,11 @@ static rt_err_t stm32_lcd_init(rt_device_t device) lcd.info.height = LCD_HEIGHT; lcd.info.pixel_format = RTGRAPHIC_PIXEL_FORMAT_ARGB888; lcd.info.bits_per_pixel = 32; - lcd.info.framebuffer = (void *)rt_malloc_align(LCD_WIDTH * LCD_HEIGHT * (lcd.info.bits_per_pixel / 8), 32); + lcd.info.framebuffer = (void *)rt_malloc_align(LCD_WIDTH * LCD_HEIGHT * (lcd.info.bits_per_pixel / 8), 32); memset(lcd.info.framebuffer, 0, LCD_WIDTH * LCD_HEIGHT * (lcd.info.bits_per_pixel / 8)); ltdc_init(); - ltdc_layer_init(0, (uint32_t)lcd.info.framebuffer); - + ltdc_layer_init(0, (uint32_t)lcd.info.framebuffer); + return RT_EOK; } @@ -186,12 +186,12 @@ static rt_err_t stm32_lcd_control(rt_device_t device, int cmd, void *args) case RTGRAPHIC_CTRL_RECT_UPDATE: break; - case RTGRAPHIC_CTRL_POWERON: - stm32_mipi_display_on(); + case RTGRAPHIC_CTRL_POWERON: + stm32_mipi_display_on(); break; - case RTGRAPHIC_CTRL_POWEROFF: - stm32_mipi_display_off(); + case RTGRAPHIC_CTRL_POWEROFF: + stm32_mipi_display_off(); break; case RTGRAPHIC_CTRL_GET_INFO: @@ -210,9 +210,9 @@ static rt_err_t stm32_lcd_control(rt_device_t device, int cmd, void *args) int rt_hw_lcd_init(void) { - rt_err_t ret; - - rt_memset(&lcd, 0x00, sizeof(lcd)); + rt_err_t ret; + + rt_memset(&lcd, 0x00, sizeof(lcd)); lcd.parent.type = RT_Device_Class_Graphic; lcd.parent.init = stm32_lcd_init; diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_log.h b/bsp/stm32/libraries/HAL_Drivers/drv_log.h index 7e0bfee5b4..3fe511789b 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drv_log.h +++ b/bsp/stm32/libraries/HAL_Drivers/drv_log.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_lptim.c b/bsp/stm32/libraries/HAL_Drivers/drv_lptim.c index 25af1fb578..7986a247d0 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drv_lptim.c +++ b/bsp/stm32/libraries/HAL_Drivers/drv_lptim.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_lptim.h b/bsp/stm32/libraries/HAL_Drivers/drv_lptim.h index 0fd51b5eac..b9fa2952ac 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drv_lptim.h +++ b/bsp/stm32/libraries/HAL_Drivers/drv_lptim.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_pm.c b/bsp/stm32/libraries/HAL_Drivers/drv_pm.c index 8f3890474e..2c3b9276f0 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drv_pm.c +++ b/bsp/stm32/libraries/HAL_Drivers/drv_pm.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_pulse_encoder.c b/bsp/stm32/libraries/HAL_Drivers/drv_pulse_encoder.c index 55e7bf45e1..d6f85f25eb 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drv_pulse_encoder.c +++ b/bsp/stm32/libraries/HAL_Drivers/drv_pulse_encoder.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_pwm.c b/bsp/stm32/libraries/HAL_Drivers/drv_pwm.c index 95e3711fa8..6173d208f4 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drv_pwm.c +++ b/bsp/stm32/libraries/HAL_Drivers/drv_pwm.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -205,7 +205,7 @@ static rt_err_t drv_pwm_get(TIM_HandleTypeDef *htim, struct rt_pwm_configuration tim_clock = HAL_RCC_GetPCLK1Freq() * 2; #endif } - + if (__HAL_TIM_GET_CLOCKDIVISION(htim) == TIM_CLOCKDIVISION_DIV2) { tim_clock = tim_clock / 2; diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_qspi.c b/bsp/stm32/libraries/HAL_Drivers/drv_qspi.c index 52c184290e..24e7f57a34 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drv_qspi.c +++ b/bsp/stm32/libraries/HAL_Drivers/drv_qspi.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -104,7 +104,7 @@ static int stm32_qspi_init(struct rt_qspi_device *device, struct rt_qspi_configu { __HAL_RCC_DMA2_CLK_ENABLE(); } - + HAL_DMA_DeInit(qspi_bus->QSPI_Handler.hdma); DMA_HandleTypeDef hdma_quadspi_config = QSPI_DMA_CONFIG; qspi_bus->hdma_quadspi = hdma_quadspi_config; diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_qspi.h b/bsp/stm32/libraries/HAL_Drivers/drv_qspi.h index 5f274d6cc6..fb48dd45b7 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drv_qspi.h +++ b/bsp/stm32/libraries/HAL_Drivers/drv_qspi.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -7,7 +7,7 @@ * Date Author Notes * 2018-11-27 zylx first version */ - + #ifndef __DRV_QSPI_H__ #define __DRV_QSPI_H__ diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_rtc.c b/bsp/stm32/libraries/HAL_Drivers/drv_rtc.c index e3689de023..a6a9d2f015 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drv_rtc.c +++ b/bsp/stm32/libraries/HAL_Drivers/drv_rtc.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_sdio.c b/bsp/stm32/libraries/HAL_Drivers/drv_sdio.c index 78928105cb..d7241e912b 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drv_sdio.c +++ b/bsp/stm32/libraries/HAL_Drivers/drv_sdio.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_sdio.h b/bsp/stm32/libraries/HAL_Drivers/drv_sdio.h index 565a4bed00..920808f9d6 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drv_sdio.h +++ b/bsp/stm32/libraries/HAL_Drivers/drv_sdio.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_sdram.c b/bsp/stm32/libraries/HAL_Drivers/drv_sdram.c index 97731ff3b1..4ae336c3fe 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drv_sdram.c +++ b/bsp/stm32/libraries/HAL_Drivers/drv_sdram.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_soft_i2c.c b/bsp/stm32/libraries/HAL_Drivers/drv_soft_i2c.c index af89ae703a..871686650b 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drv_soft_i2c.c +++ b/bsp/stm32/libraries/HAL_Drivers/drv_soft_i2c.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -207,10 +207,10 @@ int rt_hw_i2c_init(void) result = rt_i2c_bit_add_bus(&i2c_obj[i].i2c2_bus, soft_i2c_config[i].bus_name); RT_ASSERT(result == RT_EOK); stm32_i2c_bus_unlock(&soft_i2c_config[i]); - + LOG_D("software simulation %s init done, pin scl: %d, pin sda %d", - soft_i2c_config[i].bus_name, - soft_i2c_config[i].scl, + soft_i2c_config[i].bus_name, + soft_i2c_config[i].scl, soft_i2c_config[i].sda); } diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_soft_i2c.h b/bsp/stm32/libraries/HAL_Drivers/drv_soft_i2c.h index 31cba68f92..a9683e3e21 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drv_soft_i2c.h +++ b/bsp/stm32/libraries/HAL_Drivers/drv_soft_i2c.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -37,7 +37,7 @@ struct stm32_i2c .bus_name = "i2c1", \ } #endif - + #ifdef BSP_USING_I2C2 #define I2C2_BUS_CONFIG \ { \ @@ -46,7 +46,7 @@ struct stm32_i2c .bus_name = "i2c2", \ } #endif - + #ifdef BSP_USING_I2C3 #define I2C3_BUS_CONFIG \ { \ @@ -55,7 +55,7 @@ struct stm32_i2c .bus_name = "i2c3", \ } #endif - + #ifdef BSP_USING_I2C4 #define I2C4_BUS_CONFIG \ { \ diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_spi.c b/bsp/stm32/libraries/HAL_Drivers/drv_spi.c index 506eaad8ae..6de9dafd28 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drv_spi.c +++ b/bsp/stm32/libraries/HAL_Drivers/drv_spi.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -310,7 +310,7 @@ static rt_uint32_t spixfer(struct rt_spi_device *device, struct rt_spi_message * already_send_length = message->length - send_length - message_length; send_buf = (rt_uint8_t *)message->send_buf + already_send_length; recv_buf = (rt_uint8_t *)message->recv_buf + already_send_length; - + /* start once data exchange in DMA mode */ if (message->send_buf && message->recv_buf) { @@ -885,23 +885,23 @@ static void stm32_get_dma_info(void) } #if defined(SOC_SERIES_STM32F0) -void SPI1_DMA_RX_TX_IRQHandler(void) +void SPI1_DMA_RX_TX_IRQHandler(void) { #if defined(BSP_USING_SPI1) && defined(BSP_SPI1_TX_USING_DMA) SPI1_DMA_TX_IRQHandler(); #endif - + #if defined(BSP_USING_SPI1) && defined(BSP_SPI1_RX_USING_DMA) SPI1_DMA_RX_IRQHandler(); #endif } -void SPI2_DMA_RX_TX_IRQHandler(void) +void SPI2_DMA_RX_TX_IRQHandler(void) { #if defined(BSP_USING_SPI2) && defined(BSP_SPI2_TX_USING_DMA) SPI2_DMA_TX_IRQHandler(); #endif - + #if defined(BSP_USING_SPI2) && defined(BSP_SPI2_RX_USING_DMA) SPI2_DMA_RX_IRQHandler(); #endif diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_spi.h b/bsp/stm32/libraries/HAL_Drivers/drv_spi.h index b4567b8e83..f30d97f777 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drv_spi.h +++ b/bsp/stm32/libraries/HAL_Drivers/drv_spi.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -62,7 +62,7 @@ struct stm32_spi DMA_HandleTypeDef handle_rx; DMA_HandleTypeDef handle_tx; } dma; - + rt_uint8_t spi_dma_flag; struct rt_spi_bus spi_bus; }; diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_usart.c b/bsp/stm32/libraries/HAL_Drivers/drv_usart.c index 2c34eee15f..6a94e64f11 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drv_usart.c +++ b/bsp/stm32/libraries/HAL_Drivers/drv_usart.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -205,7 +205,7 @@ static rt_err_t stm32_control(struct rt_serial_device *serial, int cmd, void *ar /* enable interrupt */ case RT_DEVICE_CTRL_SET_INT: /* enable rx irq */ - HAL_NVIC_SetPriority(uart->config->irq_type, 1, 0); + HAL_NVIC_SetPriority(uart->config->irq_type, 1, 0); HAL_NVIC_EnableIRQ(uart->config->irq_type); /* enable interrupt */ __HAL_UART_ENABLE_IT(&(uart->handle), UART_IT_RXNE); @@ -273,12 +273,12 @@ static rt_size_t stm32_dma_transmit(struct rt_serial_device *serial, rt_uint8_t RT_ASSERT(serial != RT_NULL); RT_ASSERT(buf != RT_NULL); uart = rt_container_of(serial, struct stm32_uart, serial); - + if (size == 0) { return 0; } - + if (RT_SERIAL_DMA_TX == direction) { if (HAL_UART_Transmit_DMA(&uart->handle, buf, size) == HAL_OK) @@ -867,7 +867,7 @@ static void stm32_dma_config(struct rt_serial_device *serial, rt_ubase_t flag) #if (defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32G4) || defined(SOC_SERIES_STM32WB)) && defined(DMAMUX1) /* enable DMAMUX clock for L4+ and G4 */ - __HAL_RCC_DMAMUX1_CLK_ENABLE(); + __HAL_RCC_DMAMUX1_CLK_ENABLE(); #elif defined(SOC_SERIES_STM32MP1) __HAL_RCC_DMAMUX_CLK_ENABLE(); __HAL_RCC_DMA2_CLK_ENABLE(); @@ -1018,7 +1018,7 @@ static void _dma_tx_complete(struct rt_serial_device *serial) /** * @brief HAL_UART_TxCpltCallback * @param huart: UART handle - * @note This callback can be called by two functions, first in UART_EndTransmit_IT when + * @note This callback can be called by two functions, first in UART_EndTransmit_IT when * UART Tx complete and second in UART_DMATransmitCplt function in DMA Circular mode. * @retval None */ diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_usart.h b/bsp/stm32/libraries/HAL_Drivers/drv_usart.h index f8b0703a33..2f6b37217d 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drv_usart.h +++ b/bsp/stm32/libraries/HAL_Drivers/drv_usart.h @@ -1,12 +1,12 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * * Change Logs: * Date Author Notes * 2018.10.30 SummerGift first version - * 2019.03.05 whj4674672 add stm32h7 + * 2019.03.05 whj4674672 add stm32h7 */ #ifndef __DRV_USART_H__ @@ -50,7 +50,7 @@ struct stm32_uart { UART_HandleTypeDef handle; struct stm32_uart_config *config; - + #ifdef RT_SERIAL_USING_DMA struct { diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_usbd.c b/bsp/stm32/libraries/HAL_Drivers/drv_usbd.c index 19e8d7f3d4..4f8f08fef3 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drv_usbd.c +++ b/bsp/stm32/libraries/HAL_Drivers/drv_usbd.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/libraries/HAL_Drivers/drv_wdt.c b/bsp/stm32/libraries/HAL_Drivers/drv_wdt.c index fe5d20c757..01319fb22b 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drv_wdt.c +++ b/bsp/stm32/libraries/HAL_Drivers/drv_wdt.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/libraries/templates/stm32f0xx/applications/main.c b/bsp/stm32/libraries/templates/stm32f0xx/applications/main.c index 68a938bbeb..79ae25a186 100644 --- a/bsp/stm32/libraries/templates/stm32f0xx/applications/main.c +++ b/bsp/stm32/libraries/templates/stm32f0xx/applications/main.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/libraries/templates/stm32f0xx/board/board.c b/bsp/stm32/libraries/templates/stm32f0xx/board/board.c index 9115460e72..8a6b2d18f4 100644 --- a/bsp/stm32/libraries/templates/stm32f0xx/board/board.c +++ b/bsp/stm32/libraries/templates/stm32f0xx/board/board.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -7,7 +7,7 @@ * Date Author Notes * 2018-12-21 zylx first version */ - + #include "board.h" void SystemClock_Config(void) @@ -16,7 +16,7 @@ void SystemClock_Config(void) RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; RCC_PeriphCLKInitTypeDef PeriphClkInit = {0}; - /**Initializes the CPU, AHB and APB busses clocks + /**Initializes the CPU, AHB and APB busses clocks */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; RCC_OscInitStruct.HSEState = RCC_HSE_ON; @@ -28,7 +28,7 @@ void SystemClock_Config(void) { Error_Handler(); } - /**Initializes the CPU, AHB and APB busses clocks + /**Initializes the CPU, AHB and APB busses clocks */ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK |RCC_CLOCKTYPE_PCLK1; diff --git a/bsp/stm32/libraries/templates/stm32f0xx/board/board.h b/bsp/stm32/libraries/templates/stm32f0xx/board/board.h index fbc2af5ebe..7559754ae0 100644 --- a/bsp/stm32/libraries/templates/stm32f0xx/board/board.h +++ b/bsp/stm32/libraries/templates/stm32f0xx/board/board.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/libraries/templates/stm32f10x/applications/main.c b/bsp/stm32/libraries/templates/stm32f10x/applications/main.c index 487ddf44f6..6d19a46edb 100644 --- a/bsp/stm32/libraries/templates/stm32f10x/applications/main.c +++ b/bsp/stm32/libraries/templates/stm32f10x/applications/main.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/libraries/templates/stm32f10x/board/board.c b/bsp/stm32/libraries/templates/stm32f10x/board/board.c index 9f1ba0ddab..8493439409 100644 --- a/bsp/stm32/libraries/templates/stm32f10x/board/board.c +++ b/bsp/stm32/libraries/templates/stm32f10x/board/board.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -7,7 +7,7 @@ * Date Author Notes * 2018-11-06 SummerGift first version */ - + #include "board.h" void SystemClock_Config(void) @@ -15,7 +15,7 @@ void SystemClock_Config(void) RCC_OscInitTypeDef RCC_OscInitStruct = {0}; RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; - /**Initializes the CPU, AHB and APB busses clocks + /**Initializes the CPU, AHB and APB busses clocks */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; RCC_OscInitStruct.HSEState = RCC_HSE_ON; @@ -28,7 +28,7 @@ void SystemClock_Config(void) { Error_Handler(); } - /**Initializes the CPU, AHB and APB busses clocks + /**Initializes the CPU, AHB and APB busses clocks */ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; diff --git a/bsp/stm32/libraries/templates/stm32f10x/board/board.h b/bsp/stm32/libraries/templates/stm32f10x/board/board.h index fc435ee029..1be364929a 100644 --- a/bsp/stm32/libraries/templates/stm32f10x/board/board.h +++ b/bsp/stm32/libraries/templates/stm32f10x/board/board.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/libraries/templates/stm32f2xx/applications/main.c b/bsp/stm32/libraries/templates/stm32f2xx/applications/main.c index 487ddf44f6..6d19a46edb 100644 --- a/bsp/stm32/libraries/templates/stm32f2xx/applications/main.c +++ b/bsp/stm32/libraries/templates/stm32f2xx/applications/main.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/libraries/templates/stm32f2xx/board/board.c b/bsp/stm32/libraries/templates/stm32f2xx/board/board.c index 91fd907220..00cc73299c 100644 --- a/bsp/stm32/libraries/templates/stm32f2xx/board/board.c +++ b/bsp/stm32/libraries/templates/stm32f2xx/board/board.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -7,7 +7,7 @@ * Date Author Notes * 2018-11-06 SummerGift first version */ - + #include "board.h" void SystemClock_Config(void) @@ -15,7 +15,7 @@ void SystemClock_Config(void) RCC_OscInitTypeDef RCC_OscInitStruct = {0}; RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; - /** Initializes the CPU, AHB and APB busses clocks + /** Initializes the CPU, AHB and APB busses clocks */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; RCC_OscInitStruct.HSEState = RCC_HSE_ON; @@ -29,7 +29,7 @@ void SystemClock_Config(void) { Error_Handler(); } - /** Initializes the CPU, AHB and APB busses clocks + /** Initializes the CPU, AHB and APB busses clocks */ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; diff --git a/bsp/stm32/libraries/templates/stm32f2xx/board/board.h b/bsp/stm32/libraries/templates/stm32f2xx/board/board.h index b93a301f4e..34b46a390c 100644 --- a/bsp/stm32/libraries/templates/stm32f2xx/board/board.h +++ b/bsp/stm32/libraries/templates/stm32f2xx/board/board.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/libraries/templates/stm32f4xx/applications/main.c b/bsp/stm32/libraries/templates/stm32f4xx/applications/main.c index 487ddf44f6..6d19a46edb 100644 --- a/bsp/stm32/libraries/templates/stm32f4xx/applications/main.c +++ b/bsp/stm32/libraries/templates/stm32f4xx/applications/main.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/libraries/templates/stm32f4xx/board/board.c b/bsp/stm32/libraries/templates/stm32f4xx/board/board.c index ef1f24cbb5..190ca080cf 100644 --- a/bsp/stm32/libraries/templates/stm32f4xx/board/board.c +++ b/bsp/stm32/libraries/templates/stm32f4xx/board/board.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -15,11 +15,11 @@ void SystemClock_Config(void) RCC_OscInitTypeDef RCC_OscInitStruct = {0}; RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; - /**Configure the main internal regulator output voltage + /**Configure the main internal regulator output voltage */ __HAL_RCC_PWR_CLK_ENABLE(); __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); - /**Initializes the CPU, AHB and APB busses clocks + /**Initializes the CPU, AHB and APB busses clocks */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; RCC_OscInitStruct.HSEState = RCC_HSE_ON; @@ -33,7 +33,7 @@ void SystemClock_Config(void) { Error_Handler(); } - /**Initializes the CPU, AHB and APB busses clocks + /**Initializes the CPU, AHB and APB busses clocks */ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; diff --git a/bsp/stm32/libraries/templates/stm32f4xx/board/board.h b/bsp/stm32/libraries/templates/stm32f4xx/board/board.h index 514155b823..f68ddcac3f 100644 --- a/bsp/stm32/libraries/templates/stm32f4xx/board/board.h +++ b/bsp/stm32/libraries/templates/stm32f4xx/board/board.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/libraries/templates/stm32f7xx/applications/main.c b/bsp/stm32/libraries/templates/stm32f7xx/applications/main.c index 5a4bbf9f42..881793e674 100644 --- a/bsp/stm32/libraries/templates/stm32f7xx/applications/main.c +++ b/bsp/stm32/libraries/templates/stm32f7xx/applications/main.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/libraries/templates/stm32f7xx/board/board.c b/bsp/stm32/libraries/templates/stm32f7xx/board/board.c index 4194e6db1e..72d9f50faf 100644 --- a/bsp/stm32/libraries/templates/stm32f7xx/board/board.c +++ b/bsp/stm32/libraries/templates/stm32f7xx/board/board.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -16,11 +16,11 @@ void SystemClock_Config(void) RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0}; - /**Configure the main internal regulator output voltage + /**Configure the main internal regulator output voltage */ __HAL_RCC_PWR_CLK_ENABLE(); __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); - /**Initializes the CPU, AHB and APB busses clocks + /**Initializes the CPU, AHB and APB busses clocks */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; RCC_OscInitStruct.HSEState = RCC_HSE_ON; @@ -34,13 +34,13 @@ void SystemClock_Config(void) { Error_Handler(); } - /**Activate the Over-Drive mode + /**Activate the Over-Drive mode */ if (HAL_PWREx_EnableOverDrive() != HAL_OK) { Error_Handler(); } - /**Initializes the CPU, AHB and APB busses clocks + /**Initializes the CPU, AHB and APB busses clocks */ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; diff --git a/bsp/stm32/libraries/templates/stm32f7xx/board/board.h b/bsp/stm32/libraries/templates/stm32f7xx/board/board.h index 2951235675..7d4c7c4bad 100644 --- a/bsp/stm32/libraries/templates/stm32f7xx/board/board.h +++ b/bsp/stm32/libraries/templates/stm32f7xx/board/board.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/libraries/templates/stm32h7xx/applications/main.c b/bsp/stm32/libraries/templates/stm32h7xx/applications/main.c index 19a43a12e6..376d3c78ff 100644 --- a/bsp/stm32/libraries/templates/stm32h7xx/applications/main.c +++ b/bsp/stm32/libraries/templates/stm32h7xx/applications/main.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -18,9 +18,9 @@ int main(void) { int count = 1; - /* set LED0 pin mode to output */ - rt_pin_mode(LED0_PIN, PIN_MODE_OUTPUT); - + /* set LED0 pin mode to output */ + rt_pin_mode(LED0_PIN, PIN_MODE_OUTPUT); + while (count++) { rt_pin_write(LED0_PIN, PIN_HIGH); diff --git a/bsp/stm32/libraries/templates/stm32h7xx/board/board.c b/bsp/stm32/libraries/templates/stm32h7xx/board/board.c index 2e4fab6c8c..6b975ea956 100644 --- a/bsp/stm32/libraries/templates/stm32h7xx/board/board.c +++ b/bsp/stm32/libraries/templates/stm32h7xx/board/board.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -16,18 +16,18 @@ void SystemClock_Config(void) RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0}; - /**Supply configuration update enable + /**Supply configuration update enable */ MODIFY_REG(PWR->CR3, PWR_CR3_SCUEN, 0); - /**Configure the main internal regulator output voltage + /**Configure the main internal regulator output voltage */ __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); - while ((PWR->D3CR & (PWR_D3CR_VOSRDY)) != PWR_D3CR_VOSRDY) + while ((PWR->D3CR & (PWR_D3CR_VOSRDY)) != PWR_D3CR_VOSRDY) { - + } - /**Initializes the CPU, AHB and APB busses clocks + /**Initializes the CPU, AHB and APB busses clocks */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; RCC_OscInitStruct.HSEState = RCC_HSE_ON; @@ -45,7 +45,7 @@ void SystemClock_Config(void) { Error_Handler(); } - /**Initializes the CPU, AHB and APB busses clocks + /**Initializes the CPU, AHB and APB busses clocks */ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2 diff --git a/bsp/stm32/libraries/templates/stm32h7xx/board/board.h b/bsp/stm32/libraries/templates/stm32h7xx/board/board.h index 72d84ff29d..32eb25f147 100644 --- a/bsp/stm32/libraries/templates/stm32h7xx/board/board.h +++ b/bsp/stm32/libraries/templates/stm32h7xx/board/board.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/libraries/templates/stm32l4xx/applications/main.c b/bsp/stm32/libraries/templates/stm32l4xx/applications/main.c index 487ddf44f6..6d19a46edb 100644 --- a/bsp/stm32/libraries/templates/stm32l4xx/applications/main.c +++ b/bsp/stm32/libraries/templates/stm32l4xx/applications/main.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/libraries/templates/stm32l4xx/board/board.c b/bsp/stm32/libraries/templates/stm32l4xx/board/board.c index 7797c23379..bc32bedd1d 100644 --- a/bsp/stm32/libraries/templates/stm32l4xx/board/board.c +++ b/bsp/stm32/libraries/templates/stm32l4xx/board/board.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -16,7 +16,7 @@ void SystemClock_Config(void) RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; RCC_PeriphCLKInitTypeDef PeriphClkInit = {0}; - /**Initializes the CPU, AHB and APB busses clocks + /**Initializes the CPU, AHB and APB busses clocks */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; RCC_OscInitStruct.HSEState = RCC_HSE_ON; @@ -31,7 +31,7 @@ void SystemClock_Config(void) { Error_Handler(); } - /**Initializes the CPU, AHB and APB busses clocks + /**Initializes the CPU, AHB and APB busses clocks */ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; @@ -50,7 +50,7 @@ void SystemClock_Config(void) { Error_Handler(); } - /**Configure the main internal regulator output voltage + /**Configure the main internal regulator output voltage */ if (HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1) != HAL_OK) { diff --git a/bsp/stm32/libraries/templates/stm32l4xx/board/board.h b/bsp/stm32/libraries/templates/stm32l4xx/board/board.h index b5120ac476..a8e6ad850f 100644 --- a/bsp/stm32/libraries/templates/stm32l4xx/board/board.h +++ b/bsp/stm32/libraries/templates/stm32l4xx/board/board.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32f072-st-nucleo/applications/main.c b/bsp/stm32/stm32f072-st-nucleo/applications/main.c index 81b03091e1..486ed61283 100644 --- a/bsp/stm32/stm32f072-st-nucleo/applications/main.c +++ b/bsp/stm32/stm32f072-st-nucleo/applications/main.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32f072-st-nucleo/board/board.c b/bsp/stm32/stm32f072-st-nucleo/board/board.c index 8adbcd7bdd..5f06e3253d 100644 --- a/bsp/stm32/stm32f072-st-nucleo/board/board.c +++ b/bsp/stm32/stm32f072-st-nucleo/board/board.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -7,7 +7,7 @@ * Date Author Notes * 2018-12-21 zylx first version */ - + #include "board.h" void SystemClock_Config(void) @@ -16,7 +16,7 @@ void SystemClock_Config(void) RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; RCC_PeriphCLKInitTypeDef PeriphClkInit = {0}; - /** Initializes the CPU, AHB and APB busses clocks + /** Initializes the CPU, AHB and APB busses clocks */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48; RCC_OscInitStruct.HSI48State = RCC_HSI48_ON; @@ -25,7 +25,7 @@ void SystemClock_Config(void) { Error_Handler(); } - /** Initializes the CPU, AHB and APB busses clocks + /** Initializes the CPU, AHB and APB busses clocks */ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK |RCC_CLOCKTYPE_PCLK1; diff --git a/bsp/stm32/stm32f072-st-nucleo/board/board.h b/bsp/stm32/stm32f072-st-nucleo/board/board.h index bfd0371048..51a9f80edd 100644 --- a/bsp/stm32/stm32f072-st-nucleo/board/board.h +++ b/bsp/stm32/stm32f072-st-nucleo/board/board.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32f091-st-nucleo/applications/main.c b/bsp/stm32/stm32f091-st-nucleo/applications/main.c index 421f897bc4..9783d01e55 100644 --- a/bsp/stm32/stm32f091-st-nucleo/applications/main.c +++ b/bsp/stm32/stm32f091-st-nucleo/applications/main.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32f091-st-nucleo/board/board.c b/bsp/stm32/stm32f091-st-nucleo/board/board.c index db5c101a9d..ec74fe9af0 100644 --- a/bsp/stm32/stm32f091-st-nucleo/board/board.c +++ b/bsp/stm32/stm32f091-st-nucleo/board/board.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -7,7 +7,7 @@ * Date Author Notes * 2018-12-21 zylx first version */ - + #include "board.h" void SystemClock_Config(void) @@ -16,11 +16,11 @@ void SystemClock_Config(void) RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; RCC_PeriphCLKInitTypeDef PeriphClkInit = {0}; - /**Configure LSE Drive Capability + /**Configure LSE Drive Capability */ HAL_PWR_EnableBkUpAccess(); __HAL_RCC_LSEDRIVE_CONFIG(RCC_LSEDRIVE_HIGH); - /**Initializes the CPU, AHB and APB busses clocks + /**Initializes the CPU, AHB and APB busses clocks */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI|RCC_OSCILLATORTYPE_HSI14 |RCC_OSCILLATORTYPE_LSI|RCC_OSCILLATORTYPE_LSE; @@ -38,7 +38,7 @@ void SystemClock_Config(void) { Error_Handler(); } - /**Initializes the CPU, AHB and APB busses clocks + /**Initializes the CPU, AHB and APB busses clocks */ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK |RCC_CLOCKTYPE_PCLK1; diff --git a/bsp/stm32/stm32f091-st-nucleo/board/board.h b/bsp/stm32/stm32f091-st-nucleo/board/board.h index 7a78136471..a9ba91377d 100644 --- a/bsp/stm32/stm32f091-st-nucleo/board/board.h +++ b/bsp/stm32/stm32f091-st-nucleo/board/board.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32f091-st-nucleo/board/ports/fal_cfg.h b/bsp/stm32/stm32f091-st-nucleo/board/ports/fal_cfg.h index 78bf24d251..b9964e0154 100644 --- a/bsp/stm32/stm32f091-st-nucleo/board/ports/fal_cfg.h +++ b/bsp/stm32/stm32f091-st-nucleo/board/ports/fal_cfg.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32f103-atk-nano/applications/main.c b/bsp/stm32/stm32f103-atk-nano/applications/main.c index 6d75fd13ce..be493624c1 100644 --- a/bsp/stm32/stm32f103-atk-nano/applications/main.c +++ b/bsp/stm32/stm32f103-atk-nano/applications/main.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32f103-atk-nano/board/board.c b/bsp/stm32/stm32f103-atk-nano/board/board.c index bb35832bfa..de585efe32 100644 --- a/bsp/stm32/stm32f103-atk-nano/board/board.c +++ b/bsp/stm32/stm32f103-atk-nano/board/board.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -7,7 +7,7 @@ * Date Author Notes * 2018-11-06 balanceTWK first version */ - + #include "board.h" void SystemClock_Config(void) @@ -16,7 +16,7 @@ void SystemClock_Config(void) RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; RCC_PeriphCLKInitTypeDef PeriphClkInit = {0}; - /**Initializes the CPU, AHB and APB busses clocks + /**Initializes the CPU, AHB and APB busses clocks */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSI|RCC_OSCILLATORTYPE_HSE |RCC_OSCILLATORTYPE_LSE; @@ -32,7 +32,7 @@ void SystemClock_Config(void) { Error_Handler(); } - /**Initializes the CPU, AHB and APB busses clocks + /**Initializes the CPU, AHB and APB busses clocks */ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; diff --git a/bsp/stm32/stm32f103-atk-nano/board/board.h b/bsp/stm32/stm32f103-atk-nano/board/board.h index a33ef3cd5e..498459073e 100644 --- a/bsp/stm32/stm32f103-atk-nano/board/board.h +++ b/bsp/stm32/stm32f103-atk-nano/board/board.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32f103-atk-nano/board/ports/fal_cfg.h b/bsp/stm32/stm32f103-atk-nano/board/ports/fal_cfg.h index 0ca9acb3ea..3eb4fd7c0d 100644 --- a/bsp/stm32/stm32f103-atk-nano/board/ports/fal_cfg.h +++ b/bsp/stm32/stm32f103-atk-nano/board/ports/fal_cfg.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32f103-atk-nano/board/ports/spi_flash_init.c b/bsp/stm32/stm32f103-atk-nano/board/ports/spi_flash_init.c index 43f726525b..7892489436 100644 --- a/bsp/stm32/stm32f103-atk-nano/board/ports/spi_flash_init.c +++ b/bsp/stm32/stm32f103-atk-nano/board/ports/spi_flash_init.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32f103-atk-warshipv3/applications/main.c b/bsp/stm32/stm32f103-atk-warshipv3/applications/main.c index ab323bcb8c..df0457fad5 100644 --- a/bsp/stm32/stm32f103-atk-warshipv3/applications/main.c +++ b/bsp/stm32/stm32f103-atk-warshipv3/applications/main.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32f103-atk-warshipv3/board/board.c b/bsp/stm32/stm32f103-atk-warshipv3/board/board.c index 17bfd29f27..2dc4c9cabf 100644 --- a/bsp/stm32/stm32f103-atk-warshipv3/board/board.c +++ b/bsp/stm32/stm32f103-atk-warshipv3/board/board.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -7,7 +7,7 @@ * Date Author Notes * 2018-11-06 SummerGift first version */ - + #include "board.h" void SystemClock_Config(void) @@ -15,7 +15,7 @@ void SystemClock_Config(void) RCC_OscInitTypeDef RCC_OscInitStruct = {0}; RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; - /** Initializes the CPU, AHB and APB busses clocks + /** Initializes the CPU, AHB and APB busses clocks */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; RCC_OscInitStruct.HSEState = RCC_HSE_ON; @@ -28,7 +28,7 @@ void SystemClock_Config(void) { Error_Handler(); } - /** Initializes the CPU, AHB and APB busses clocks + /** Initializes the CPU, AHB and APB busses clocks */ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; diff --git a/bsp/stm32/stm32f103-atk-warshipv3/board/board.h b/bsp/stm32/stm32f103-atk-warshipv3/board/board.h index 68ac34f5f7..80c80984bf 100644 --- a/bsp/stm32/stm32f103-atk-warshipv3/board/board.h +++ b/bsp/stm32/stm32f103-atk-warshipv3/board/board.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32f103-dofly-M3S/applications/main.c b/bsp/stm32/stm32f103-dofly-M3S/applications/main.c index 7b7f00c8ee..0ec4930664 100644 --- a/bsp/stm32/stm32f103-dofly-M3S/applications/main.c +++ b/bsp/stm32/stm32f103-dofly-M3S/applications/main.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32f103-dofly-M3S/applications/nrf24l01_init.c b/bsp/stm32/stm32f103-dofly-M3S/applications/nrf24l01_init.c index 038725b78d..695510d1ac 100644 --- a/bsp/stm32/stm32f103-dofly-M3S/applications/nrf24l01_init.c +++ b/bsp/stm32/stm32f103-dofly-M3S/applications/nrf24l01_init.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32f103-dofly-M3S/board/board.c b/bsp/stm32/stm32f103-dofly-M3S/board/board.c index 7b6a3ea947..d32a5096b6 100644 --- a/bsp/stm32/stm32f103-dofly-M3S/board/board.c +++ b/bsp/stm32/stm32f103-dofly-M3S/board/board.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -8,7 +8,7 @@ * 2018-11-06 SummerGift first version * 2019-04-09 WillianChan add stm32f103-dofly-M3S BSP */ - + #include "board.h" void SystemClock_Config(void) @@ -16,7 +16,7 @@ void SystemClock_Config(void) RCC_OscInitTypeDef RCC_OscInitStruct = {0}; RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; - /** Initializes the CPU, AHB and APB busses clocks + /** Initializes the CPU, AHB and APB busses clocks */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; RCC_OscInitStruct.HSEState = RCC_HSE_ON; @@ -29,7 +29,7 @@ void SystemClock_Config(void) { Error_Handler(); } - /** Initializes the CPU, AHB and APB busses clocks + /** Initializes the CPU, AHB and APB busses clocks */ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; diff --git a/bsp/stm32/stm32f103-dofly-M3S/board/board.h b/bsp/stm32/stm32f103-dofly-M3S/board/board.h index 62f9030426..8662bff0f5 100644 --- a/bsp/stm32/stm32f103-dofly-M3S/board/board.h +++ b/bsp/stm32/stm32f103-dofly-M3S/board/board.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32f103-dofly-M3S/board/ports/drv_sdcard.c b/bsp/stm32/stm32f103-dofly-M3S/board/ports/drv_sdcard.c index 5ffa50ba1d..13d235b694 100644 --- a/bsp/stm32/stm32f103-dofly-M3S/board/ports/drv_sdcard.c +++ b/bsp/stm32/stm32f103-dofly-M3S/board/ports/drv_sdcard.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32f103-dofly-M3S/board/ports/fal_cfg.h b/bsp/stm32/stm32f103-dofly-M3S/board/ports/fal_cfg.h index 5f83366ea0..0f0183422a 100644 --- a/bsp/stm32/stm32f103-dofly-M3S/board/ports/fal_cfg.h +++ b/bsp/stm32/stm32f103-dofly-M3S/board/ports/fal_cfg.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32f103-dofly-M3S/board/ports/spi_flash_init.c b/bsp/stm32/stm32f103-dofly-M3S/board/ports/spi_flash_init.c index 060c6d59b4..e22efac3c9 100644 --- a/bsp/stm32/stm32f103-dofly-M3S/board/ports/spi_flash_init.c +++ b/bsp/stm32/stm32f103-dofly-M3S/board/ports/spi_flash_init.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32f103-dofly-lyc8/applications/main.c b/bsp/stm32/stm32f103-dofly-lyc8/applications/main.c index 18dbaac95c..dc4e9cbb7e 100644 --- a/bsp/stm32/stm32f103-dofly-lyc8/applications/main.c +++ b/bsp/stm32/stm32f103-dofly-lyc8/applications/main.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32f103-dofly-lyc8/board/board.c b/bsp/stm32/stm32f103-dofly-lyc8/board/board.c index 9f1ba0ddab..8493439409 100644 --- a/bsp/stm32/stm32f103-dofly-lyc8/board/board.c +++ b/bsp/stm32/stm32f103-dofly-lyc8/board/board.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -7,7 +7,7 @@ * Date Author Notes * 2018-11-06 SummerGift first version */ - + #include "board.h" void SystemClock_Config(void) @@ -15,7 +15,7 @@ void SystemClock_Config(void) RCC_OscInitTypeDef RCC_OscInitStruct = {0}; RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; - /**Initializes the CPU, AHB and APB busses clocks + /**Initializes the CPU, AHB and APB busses clocks */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; RCC_OscInitStruct.HSEState = RCC_HSE_ON; @@ -28,7 +28,7 @@ void SystemClock_Config(void) { Error_Handler(); } - /**Initializes the CPU, AHB and APB busses clocks + /**Initializes the CPU, AHB and APB busses clocks */ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; diff --git a/bsp/stm32/stm32f103-dofly-lyc8/board/board.h b/bsp/stm32/stm32f103-dofly-lyc8/board/board.h index ae6f2c67e8..8d8cc4643a 100644 --- a/bsp/stm32/stm32f103-dofly-lyc8/board/board.h +++ b/bsp/stm32/stm32f103-dofly-lyc8/board/board.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32f103-fire-arbitrary/applications/main.c b/bsp/stm32/stm32f103-fire-arbitrary/applications/main.c index 5f0f0db8ed..7ddaa5ee96 100644 --- a/bsp/stm32/stm32f103-fire-arbitrary/applications/main.c +++ b/bsp/stm32/stm32f103-fire-arbitrary/applications/main.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -7,7 +7,7 @@ * Date Author Notes * 2018-11-5 SummerGift first version */ - + #include <rtthread.h> #include <rtdevice.h> #include <board.h> diff --git a/bsp/stm32/stm32f103-fire-arbitrary/board/board.c b/bsp/stm32/stm32f103-fire-arbitrary/board/board.c index 080a22ff49..abbc74be30 100644 --- a/bsp/stm32/stm32f103-fire-arbitrary/board/board.c +++ b/bsp/stm32/stm32f103-fire-arbitrary/board/board.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -7,7 +7,7 @@ * Date Author Notes * 2018-11-06 balanceTWK first version */ - + #include <rtthread.h> #include "board.h" @@ -17,7 +17,7 @@ void SystemClock_Config(void) RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; RCC_PeriphCLKInitTypeDef PeriphClkInit = {0}; - /** Initializes the CPU, AHB and APB busses clocks + /** Initializes the CPU, AHB and APB busses clocks */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSI|RCC_OSCILLATORTYPE_HSE |RCC_OSCILLATORTYPE_LSE; @@ -33,7 +33,7 @@ void SystemClock_Config(void) { Error_Handler(); } - /** Initializes the CPU, AHB and APB busses clocks + /** Initializes the CPU, AHB and APB busses clocks */ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; diff --git a/bsp/stm32/stm32f103-fire-arbitrary/board/board.h b/bsp/stm32/stm32f103-fire-arbitrary/board/board.h index 968ac8e2e5..7aa3c0f703 100644 --- a/bsp/stm32/stm32f103-fire-arbitrary/board/board.h +++ b/bsp/stm32/stm32f103-fire-arbitrary/board/board.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32f103-fire-arbitrary/board/ports/fal_cfg.h b/bsp/stm32/stm32f103-fire-arbitrary/board/ports/fal_cfg.h index 5f83366ea0..0f0183422a 100644 --- a/bsp/stm32/stm32f103-fire-arbitrary/board/ports/fal_cfg.h +++ b/bsp/stm32/stm32f103-fire-arbitrary/board/ports/fal_cfg.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32f103-fire-arbitrary/board/ports/sdcard_port.c b/bsp/stm32/stm32f103-fire-arbitrary/board/ports/sdcard_port.c index bf5f3e10a7..55baa2c263 100644 --- a/bsp/stm32/stm32f103-fire-arbitrary/board/ports/sdcard_port.c +++ b/bsp/stm32/stm32f103-fire-arbitrary/board/ports/sdcard_port.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32f103-fire-arbitrary/board/ports/spi_flash_init.c b/bsp/stm32/stm32f103-fire-arbitrary/board/ports/spi_flash_init.c index 96b2034f24..519080ae05 100644 --- a/bsp/stm32/stm32f103-fire-arbitrary/board/ports/spi_flash_init.c +++ b/bsp/stm32/stm32f103-fire-arbitrary/board/ports/spi_flash_init.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32f103-fire-arbitrary/board/ports/w5500_device.c b/bsp/stm32/stm32f103-fire-arbitrary/board/ports/w5500_device.c index 68348d2bac..378d8f8274 100644 --- a/bsp/stm32/stm32f103-fire-arbitrary/board/ports/w5500_device.c +++ b/bsp/stm32/stm32f103-fire-arbitrary/board/ports/w5500_device.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32f103-gizwits-gokitv21/applications/main.c b/bsp/stm32/stm32f103-gizwits-gokitv21/applications/main.c index 70f60f3f8b..bf9e60aae9 100644 --- a/bsp/stm32/stm32f103-gizwits-gokitv21/applications/main.c +++ b/bsp/stm32/stm32f103-gizwits-gokitv21/applications/main.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32f103-gizwits-gokitv21/board/board.c b/bsp/stm32/stm32f103-gizwits-gokitv21/board/board.c index 66a0c7f737..55faf0d89f 100644 --- a/bsp/stm32/stm32f103-gizwits-gokitv21/board/board.c +++ b/bsp/stm32/stm32f103-gizwits-gokitv21/board/board.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -7,7 +7,7 @@ * Date Author Notes * 2018-11-06 SummerGift first version */ - + #include "board.h" /** @@ -19,7 +19,7 @@ void SystemClock_Config(void) RCC_OscInitTypeDef RCC_OscInitStruct = {0}; RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; - /** Initializes the CPU, AHB and APB busses clocks + /** Initializes the CPU, AHB and APB busses clocks */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; RCC_OscInitStruct.HSEState = RCC_HSE_ON; @@ -32,7 +32,7 @@ void SystemClock_Config(void) { Error_Handler(); } - /** Initializes the CPU, AHB and APB busses clocks + /** Initializes the CPU, AHB and APB busses clocks */ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; diff --git a/bsp/stm32/stm32f103-gizwits-gokitv21/board/board.h b/bsp/stm32/stm32f103-gizwits-gokitv21/board/board.h index 7f0ae67d48..cdb13091cd 100644 --- a/bsp/stm32/stm32f103-gizwits-gokitv21/board/board.h +++ b/bsp/stm32/stm32f103-gizwits-gokitv21/board/board.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32f103-hw100k-ibox/applications/main.c b/bsp/stm32/stm32f103-hw100k-ibox/applications/main.c index d0ab2cc6ed..096b4df406 100644 --- a/bsp/stm32/stm32f103-hw100k-ibox/applications/main.c +++ b/bsp/stm32/stm32f103-hw100k-ibox/applications/main.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32f103-hw100k-ibox/board/board.c b/bsp/stm32/stm32f103-hw100k-ibox/board/board.c index 0598b6af0d..779d731980 100644 --- a/bsp/stm32/stm32f103-hw100k-ibox/board/board.c +++ b/bsp/stm32/stm32f103-hw100k-ibox/board/board.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -7,7 +7,7 @@ * Date Author Notes * 2018-11-06 SummerGift first version */ - + #include "board.h" void SystemClock_Config(void) @@ -16,7 +16,7 @@ void SystemClock_Config(void) RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; RCC_PeriphCLKInitTypeDef PeriphClkInit = {0}; - /**Initializes the CPU, AHB and APB busses clocks + /**Initializes the CPU, AHB and APB busses clocks */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSI|RCC_OSCILLATORTYPE_HSE |RCC_OSCILLATORTYPE_LSE; @@ -32,7 +32,7 @@ void SystemClock_Config(void) { Error_Handler(); } - /**Initializes the CPU, AHB and APB busses clocks + /**Initializes the CPU, AHB and APB busses clocks */ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; diff --git a/bsp/stm32/stm32f103-hw100k-ibox/board/board.h b/bsp/stm32/stm32f103-hw100k-ibox/board/board.h index fe3ea19e77..239f0afdd6 100644 --- a/bsp/stm32/stm32f103-hw100k-ibox/board/board.h +++ b/bsp/stm32/stm32f103-hw100k-ibox/board/board.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32f103-hw100k-ibox/board/ports/esp02_device.c b/bsp/stm32/stm32f103-hw100k-ibox/board/ports/esp02_device.c index 0de060a35a..f18b6318bb 100644 --- a/bsp/stm32/stm32f103-hw100k-ibox/board/ports/esp02_device.c +++ b/bsp/stm32/stm32f103-hw100k-ibox/board/ports/esp02_device.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -21,6 +21,6 @@ int esp_02_device_init() rt_pin_write(ESP8266_CH_PD_Pin,PIN_HIGH) ; rt_pin_write(ESP8266_RST,PIN_HIGH) ; - return RT_EOK ; + return RT_EOK ; } INIT_DEVICE_EXPORT(esp_02_device_init); diff --git a/bsp/stm32/stm32f103-hw100k-ibox/board/ports/fal_cfg.h b/bsp/stm32/stm32f103-hw100k-ibox/board/ports/fal_cfg.h index 5f83366ea0..0f0183422a 100644 --- a/bsp/stm32/stm32f103-hw100k-ibox/board/ports/fal_cfg.h +++ b/bsp/stm32/stm32f103-hw100k-ibox/board/ports/fal_cfg.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32f103-hw100k-ibox/board/ports/on_chip_flash_init.c b/bsp/stm32/stm32f103-hw100k-ibox/board/ports/on_chip_flash_init.c index be8978c63d..ae0660b29a 100644 --- a/bsp/stm32/stm32f103-hw100k-ibox/board/ports/on_chip_flash_init.c +++ b/bsp/stm32/stm32f103-hw100k-ibox/board/ports/on_chip_flash_init.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32f103-hw100k-ibox/board/ports/w5500_device.c b/bsp/stm32/stm32f103-hw100k-ibox/board/ports/w5500_device.c index a0174bbb0c..59d139a8ac 100644 --- a/bsp/stm32/stm32f103-hw100k-ibox/board/ports/w5500_device.c +++ b/bsp/stm32/stm32f103-hw100k-ibox/board/ports/w5500_device.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32f103-mini-system/applications/main.c b/bsp/stm32/stm32f103-mini-system/applications/main.c index c5fa5a5958..8c68b17b8f 100644 --- a/bsp/stm32/stm32f103-mini-system/applications/main.c +++ b/bsp/stm32/stm32f103-mini-system/applications/main.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32f103-mini-system/board/board.c b/bsp/stm32/stm32f103-mini-system/board/board.c index b7ca2b8461..0b7edacbd0 100644 --- a/bsp/stm32/stm32f103-mini-system/board/board.c +++ b/bsp/stm32/stm32f103-mini-system/board/board.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -7,7 +7,7 @@ * Date Author Notes * 2019-03-08 obito0 first version */ - + #include "board.h" void SystemClock_Config(void) @@ -15,7 +15,7 @@ void SystemClock_Config(void) RCC_OscInitTypeDef RCC_OscInitStruct = {0}; RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; - /** Initializes the CPU, AHB and APB busses clocks + /** Initializes the CPU, AHB and APB busses clocks */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; RCC_OscInitStruct.HSEState = RCC_HSE_ON; @@ -28,7 +28,7 @@ void SystemClock_Config(void) { Error_Handler(); } - /** Initializes the CPU, AHB and APB busses clocks + /** Initializes the CPU, AHB and APB busses clocks */ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; diff --git a/bsp/stm32/stm32f103-mini-system/board/board.h b/bsp/stm32/stm32f103-mini-system/board/board.h index 7f0ae67d48..cdb13091cd 100644 --- a/bsp/stm32/stm32f103-mini-system/board/board.h +++ b/bsp/stm32/stm32f103-mini-system/board/board.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32f103-yf-ufun/applications/main.c b/bsp/stm32/stm32f103-yf-ufun/applications/main.c index 737c362b23..ffe4955e19 100644 --- a/bsp/stm32/stm32f103-yf-ufun/applications/main.c +++ b/bsp/stm32/stm32f103-yf-ufun/applications/main.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32f103-yf-ufun/board/board.c b/bsp/stm32/stm32f103-yf-ufun/board/board.c index 4df20fbd48..5271b59c71 100644 --- a/bsp/stm32/stm32f103-yf-ufun/board/board.c +++ b/bsp/stm32/stm32f103-yf-ufun/board/board.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -7,7 +7,7 @@ * Date Author Notes * 2018-11-06 SummerGift first version */ - + #include "board.h" void SystemClock_Config(void) @@ -15,7 +15,7 @@ void SystemClock_Config(void) RCC_OscInitTypeDef RCC_OscInitStruct = {0}; RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; - /** Initializes the CPU, AHB and APB busses clocks + /** Initializes the CPU, AHB and APB busses clocks */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; RCC_OscInitStruct.HSEState = RCC_HSE_ON; @@ -28,7 +28,7 @@ void SystemClock_Config(void) { Error_Handler(); } - /** Initializes the CPU, AHB and APB busses clocks + /** Initializes the CPU, AHB and APB busses clocks */ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; diff --git a/bsp/stm32/stm32f103-yf-ufun/board/board.h b/bsp/stm32/stm32f103-yf-ufun/board/board.h index 8c0aa1d769..738f37080a 100644 --- a/bsp/stm32/stm32f103-yf-ufun/board/board.h +++ b/bsp/stm32/stm32f103-yf-ufun/board/board.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32f107-uc-eval/applications/main.c b/bsp/stm32/stm32f107-uc-eval/applications/main.c index 11587e49d0..9dca242b10 100644 --- a/bsp/stm32/stm32f107-uc-eval/applications/main.c +++ b/bsp/stm32/stm32f107-uc-eval/applications/main.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32f107-uc-eval/board/board.c b/bsp/stm32/stm32f107-uc-eval/board/board.c index a63b070167..f053579c2f 100644 --- a/bsp/stm32/stm32f107-uc-eval/board/board.c +++ b/bsp/stm32/stm32f107-uc-eval/board/board.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32f107-uc-eval/board/board.h b/bsp/stm32/stm32f107-uc-eval/board/board.h index 98df6d51ff..44a96208c6 100644 --- a/bsp/stm32/stm32f107-uc-eval/board/board.h +++ b/bsp/stm32/stm32f107-uc-eval/board/board.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32f401-st-nucleo/applications/main.c b/bsp/stm32/stm32f401-st-nucleo/applications/main.c index 86c4508d12..48009f1c78 100644 --- a/bsp/stm32/stm32f401-st-nucleo/applications/main.c +++ b/bsp/stm32/stm32f401-st-nucleo/applications/main.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32f401-st-nucleo/board/board.c b/bsp/stm32/stm32f401-st-nucleo/board/board.c index 942d080c5b..9c33cdbba5 100644 --- a/bsp/stm32/stm32f401-st-nucleo/board/board.c +++ b/bsp/stm32/stm32f401-st-nucleo/board/board.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -15,11 +15,11 @@ void SystemClock_Config(void) RCC_OscInitTypeDef RCC_OscInitStruct = {0}; RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; - /** Configure the main internal regulator output voltage + /** Configure the main internal regulator output voltage */ __HAL_RCC_PWR_CLK_ENABLE(); __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE2); - /** Initializes the CPU, AHB and APB busses clocks + /** Initializes the CPU, AHB and APB busses clocks */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; RCC_OscInitStruct.HSIState = RCC_HSI_ON; @@ -34,7 +34,7 @@ void SystemClock_Config(void) { Error_Handler(); } - /** Initializes the CPU, AHB and APB busses clocks + /** Initializes the CPU, AHB and APB busses clocks */ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; diff --git a/bsp/stm32/stm32f401-st-nucleo/board/board.h b/bsp/stm32/stm32f401-st-nucleo/board/board.h index 4c6f84d170..82647a83a4 100644 --- a/bsp/stm32/stm32f401-st-nucleo/board/board.h +++ b/bsp/stm32/stm32f401-st-nucleo/board/board.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32f405-smdz-breadfruit/applications/main.c b/bsp/stm32/stm32f405-smdz-breadfruit/applications/main.c index 453681a90a..47358c8a61 100644 --- a/bsp/stm32/stm32f405-smdz-breadfruit/applications/main.c +++ b/bsp/stm32/stm32f405-smdz-breadfruit/applications/main.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32f405-smdz-breadfruit/board/board.c b/bsp/stm32/stm32f405-smdz-breadfruit/board/board.c index ef1f24cbb5..190ca080cf 100644 --- a/bsp/stm32/stm32f405-smdz-breadfruit/board/board.c +++ b/bsp/stm32/stm32f405-smdz-breadfruit/board/board.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -15,11 +15,11 @@ void SystemClock_Config(void) RCC_OscInitTypeDef RCC_OscInitStruct = {0}; RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; - /**Configure the main internal regulator output voltage + /**Configure the main internal regulator output voltage */ __HAL_RCC_PWR_CLK_ENABLE(); __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); - /**Initializes the CPU, AHB and APB busses clocks + /**Initializes the CPU, AHB and APB busses clocks */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; RCC_OscInitStruct.HSEState = RCC_HSE_ON; @@ -33,7 +33,7 @@ void SystemClock_Config(void) { Error_Handler(); } - /**Initializes the CPU, AHB and APB busses clocks + /**Initializes the CPU, AHB and APB busses clocks */ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; diff --git a/bsp/stm32/stm32f405-smdz-breadfruit/board/board.h b/bsp/stm32/stm32f405-smdz-breadfruit/board/board.h index 5b30f605d9..844f5e35e6 100644 --- a/bsp/stm32/stm32f405-smdz-breadfruit/board/board.h +++ b/bsp/stm32/stm32f405-smdz-breadfruit/board/board.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32f407-atk-explorer/applications/main.c b/bsp/stm32/stm32f407-atk-explorer/applications/main.c index e3ae33205f..2fc9307caf 100644 --- a/bsp/stm32/stm32f407-atk-explorer/applications/main.c +++ b/bsp/stm32/stm32f407-atk-explorer/applications/main.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32f407-atk-explorer/board/board.c b/bsp/stm32/stm32f407-atk-explorer/board/board.c index c2c90a5e86..02a3a3d53f 100644 --- a/bsp/stm32/stm32f407-atk-explorer/board/board.c +++ b/bsp/stm32/stm32f407-atk-explorer/board/board.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -16,11 +16,11 @@ void SystemClock_Config(void) RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0}; - /**Configure the main internal regulator output voltage + /**Configure the main internal regulator output voltage */ __HAL_RCC_PWR_CLK_ENABLE(); __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); - /**Initializes the CPU, AHB and APB busses clocks + /**Initializes the CPU, AHB and APB busses clocks */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSI|RCC_OSCILLATORTYPE_HSE |RCC_OSCILLATORTYPE_LSE; @@ -37,7 +37,7 @@ void SystemClock_Config(void) { Error_Handler(); } - /**Initializes the CPU, AHB and APB busses clocks + /**Initializes the CPU, AHB and APB busses clocks */ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; diff --git a/bsp/stm32/stm32f407-atk-explorer/board/board.h b/bsp/stm32/stm32f407-atk-explorer/board/board.h index 70a4c0ed19..6d80e38f78 100644 --- a/bsp/stm32/stm32f407-atk-explorer/board/board.h +++ b/bsp/stm32/stm32f407-atk-explorer/board/board.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32f407-atk-explorer/board/ports/fal_cfg.h b/bsp/stm32/stm32f407-atk-explorer/board/ports/fal_cfg.h index a587e207ce..995136cd54 100644 --- a/bsp/stm32/stm32f407-atk-explorer/board/ports/fal_cfg.h +++ b/bsp/stm32/stm32f407-atk-explorer/board/ports/fal_cfg.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32f407-atk-explorer/board/ports/phy_reset.c b/bsp/stm32/stm32f407-atk-explorer/board/ports/phy_reset.c index 838216ffaa..ec5c61f1b0 100644 --- a/bsp/stm32/stm32f407-atk-explorer/board/ports/phy_reset.c +++ b/bsp/stm32/stm32f407-atk-explorer/board/ports/phy_reset.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32f407-atk-explorer/board/ports/sdcard_port.c b/bsp/stm32/stm32f407-atk-explorer/board/ports/sdcard_port.c index 0a9c36fd42..bc7e8b676e 100644 --- a/bsp/stm32/stm32f407-atk-explorer/board/ports/sdcard_port.c +++ b/bsp/stm32/stm32f407-atk-explorer/board/ports/sdcard_port.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32f407-atk-explorer/board/ports/spi_flash_init.c b/bsp/stm32/stm32f407-atk-explorer/board/ports/spi_flash_init.c index 4705cc0112..b92344fa43 100644 --- a/bsp/stm32/stm32f407-atk-explorer/board/ports/spi_flash_init.c +++ b/bsp/stm32/stm32f407-atk-explorer/board/ports/spi_flash_init.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32f407-st-discovery/applications/main.c b/bsp/stm32/stm32f407-st-discovery/applications/main.c index c7ffc240cb..2651a75073 100644 --- a/bsp/stm32/stm32f407-st-discovery/applications/main.c +++ b/bsp/stm32/stm32f407-st-discovery/applications/main.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32f407-st-discovery/board/board.c b/bsp/stm32/stm32f407-st-discovery/board/board.c index 8a3dbd9937..5fff5426fe 100644 --- a/bsp/stm32/stm32f407-st-discovery/board/board.c +++ b/bsp/stm32/stm32f407-st-discovery/board/board.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -15,11 +15,11 @@ void SystemClock_Config(void) RCC_OscInitTypeDef RCC_OscInitStruct = {0}; RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; - /**Configure the main internal regulator output voltage + /**Configure the main internal regulator output voltage */ __HAL_RCC_PWR_CLK_ENABLE(); __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); - /**Initializes the CPU, AHB and APB busses clocks + /**Initializes the CPU, AHB and APB busses clocks */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; RCC_OscInitStruct.HSEState = RCC_HSE_ON; @@ -33,7 +33,7 @@ void SystemClock_Config(void) { Error_Handler(); } - /**Initializes the CPU, AHB and APB busses clocks + /**Initializes the CPU, AHB and APB busses clocks */ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; diff --git a/bsp/stm32/stm32f407-st-discovery/board/board.h b/bsp/stm32/stm32f407-st-discovery/board/board.h index 7ba6c79dee..539e3abf45 100644 --- a/bsp/stm32/stm32f407-st-discovery/board/board.h +++ b/bsp/stm32/stm32f407-st-discovery/board/board.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32f411-st-nucleo/applications/main.c b/bsp/stm32/stm32f411-st-nucleo/applications/main.c index b29630d930..0e109663ae 100644 --- a/bsp/stm32/stm32f411-st-nucleo/applications/main.c +++ b/bsp/stm32/stm32f411-st-nucleo/applications/main.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32f411-st-nucleo/board/board.c b/bsp/stm32/stm32f411-st-nucleo/board/board.c index e9e6ffb5e7..1d83386719 100644 --- a/bsp/stm32/stm32f411-st-nucleo/board/board.c +++ b/bsp/stm32/stm32f411-st-nucleo/board/board.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -16,11 +16,11 @@ void SystemClock_Config(void) RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0}; - /**Configure the main internal regulator output voltage + /**Configure the main internal regulator output voltage */ __HAL_RCC_PWR_CLK_ENABLE(); __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); - /**Initializes the CPU, AHB and APB busses clocks + /**Initializes the CPU, AHB and APB busses clocks */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSI|RCC_OSCILLATORTYPE_HSE; RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS; @@ -35,7 +35,7 @@ void SystemClock_Config(void) { Error_Handler(); } - /**Initializes the CPU, AHB and APB busses clocks + /**Initializes the CPU, AHB and APB busses clocks */ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; diff --git a/bsp/stm32/stm32f411-st-nucleo/board/board.h b/bsp/stm32/stm32f411-st-nucleo/board/board.h index e05c785128..062038ffdb 100644 --- a/bsp/stm32/stm32f411-st-nucleo/board/board.h +++ b/bsp/stm32/stm32f411-st-nucleo/board/board.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32f412-st-nucleo/applications/main.c b/bsp/stm32/stm32f412-st-nucleo/applications/main.c index 317bc60514..2cf35c5bc6 100644 --- a/bsp/stm32/stm32f412-st-nucleo/applications/main.c +++ b/bsp/stm32/stm32f412-st-nucleo/applications/main.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32f412-st-nucleo/board/board.c b/bsp/stm32/stm32f412-st-nucleo/board/board.c index 504407b161..b8f8168dfa 100644 --- a/bsp/stm32/stm32f412-st-nucleo/board/board.c +++ b/bsp/stm32/stm32f412-st-nucleo/board/board.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -16,11 +16,11 @@ void SystemClock_Config(void) RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0}; - /**Configure the main internal regulator output voltage + /**Configure the main internal regulator output voltage */ __HAL_RCC_PWR_CLK_ENABLE(); __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); - /**Initializes the CPU, AHB and APB busses clocks + /**Initializes the CPU, AHB and APB busses clocks */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS; @@ -35,7 +35,7 @@ void SystemClock_Config(void) { Error_Handler(); } - /**Initializes the CPU, AHB and APB busses clocks + /**Initializes the CPU, AHB and APB busses clocks */ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; diff --git a/bsp/stm32/stm32f412-st-nucleo/board/board.h b/bsp/stm32/stm32f412-st-nucleo/board/board.h index 3e2d7384c8..5c463d04e8 100644 --- a/bsp/stm32/stm32f412-st-nucleo/board/board.h +++ b/bsp/stm32/stm32f412-st-nucleo/board/board.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32f427-robomaster-a/applications/main.c b/bsp/stm32/stm32f427-robomaster-a/applications/main.c index 7c21823832..6cef3cbb34 100644 --- a/bsp/stm32/stm32f427-robomaster-a/applications/main.c +++ b/bsp/stm32/stm32f427-robomaster-a/applications/main.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32f427-robomaster-a/board/board.c b/bsp/stm32/stm32f427-robomaster-a/board/board.c index a0901feba9..780e089fcd 100644 --- a/bsp/stm32/stm32f427-robomaster-a/board/board.c +++ b/bsp/stm32/stm32f427-robomaster-a/board/board.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -19,11 +19,11 @@ void SystemClock_Config(void) RCC_OscInitTypeDef RCC_OscInitStruct = {0}; RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; - /** Configure the main internal regulator output voltage + /** Configure the main internal regulator output voltage */ __HAL_RCC_PWR_CLK_ENABLE(); __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); - /** Initializes the CPU, AHB and APB busses clocks + /** Initializes the CPU, AHB and APB busses clocks */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; RCC_OscInitStruct.HSEState = RCC_HSE_ON; @@ -37,13 +37,13 @@ void SystemClock_Config(void) { Error_Handler(); } - /** Activate the Over-Drive mode + /** Activate the Over-Drive mode */ if (HAL_PWREx_EnableOverDrive() != HAL_OK) { Error_Handler(); } - /** Initializes the CPU, AHB and APB busses clocks + /** Initializes the CPU, AHB and APB busses clocks */ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; diff --git a/bsp/stm32/stm32f427-robomaster-a/board/board.h b/bsp/stm32/stm32f427-robomaster-a/board/board.h index 57c8e4a954..72cb49ec3a 100644 --- a/bsp/stm32/stm32f427-robomaster-a/board/board.h +++ b/bsp/stm32/stm32f427-robomaster-a/board/board.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32f427-robomaster-a/board/ports/sdcard_port.c b/bsp/stm32/stm32f427-robomaster-a/board/ports/sdcard_port.c index b46537d311..6a79c83523 100644 --- a/bsp/stm32/stm32f427-robomaster-a/board/ports/sdcard_port.c +++ b/bsp/stm32/stm32f427-robomaster-a/board/ports/sdcard_port.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32f429-armfly-v6/applications/main.c b/bsp/stm32/stm32f429-armfly-v6/applications/main.c index 70c2a3b0f7..21b7c14ec0 100644 --- a/bsp/stm32/stm32f429-armfly-v6/applications/main.c +++ b/bsp/stm32/stm32f429-armfly-v6/applications/main.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -18,10 +18,10 @@ int main(void) int count = 1; HC574_SetPin(LED1,0); - HC574_SetPin(LED2,0); + HC574_SetPin(LED2,0); HC574_SetPin(LED3,0); HC574_SetPin(LED4,0); - + while (count++) { HC574_SetPin(LED1,1); @@ -29,6 +29,6 @@ int main(void) HC574_SetPin(LED1,0); rt_thread_mdelay(500); } - + return RT_EOK; } diff --git a/bsp/stm32/stm32f429-armfly-v6/board/board.c b/bsp/stm32/stm32f429-armfly-v6/board/board.c index f314b7c45a..2d37e631e3 100644 --- a/bsp/stm32/stm32f429-armfly-v6/board/board.c +++ b/bsp/stm32/stm32f429-armfly-v6/board/board.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -17,12 +17,12 @@ void SystemClock_Config(void) RCC_OscInitTypeDef RCC_OscInitStruct = {0}; RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0}; - - /**Configure the main internal regulator output voltage + + /**Configure the main internal regulator output voltage */ __HAL_RCC_PWR_CLK_ENABLE(); __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); - /**Initializes the CPU, AHB and APB busses clocks + /**Initializes the CPU, AHB and APB busses clocks */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSI|RCC_OSCILLATORTYPE_HSE |RCC_OSCILLATORTYPE_LSE; @@ -39,13 +39,13 @@ void SystemClock_Config(void) { Error_Handler(); } - /**Activate the Over-Drive mode + /**Activate the Over-Drive mode */ if (HAL_PWREx_EnableOverDrive() != HAL_OK) { Error_Handler(); } - /**Initializes the CPU, AHB and APB busses clocks + /**Initializes the CPU, AHB and APB busses clocks */ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; @@ -53,7 +53,7 @@ void SystemClock_Config(void) RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4; RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2; - + if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5) != HAL_OK) { Error_Handler(); diff --git a/bsp/stm32/stm32f429-armfly-v6/board/board.h b/bsp/stm32/stm32f429-armfly-v6/board/board.h index f0ea803bb0..c0d30df246 100644 --- a/bsp/stm32/stm32f429-armfly-v6/board/board.h +++ b/bsp/stm32/stm32f429-armfly-v6/board/board.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32f429-armfly-v6/board/ports/drv_ext_io.h b/bsp/stm32/stm32f429-armfly-v6/board/ports/drv_ext_io.h index 09740d3571..3f336dd7ab 100644 --- a/bsp/stm32/stm32f429-armfly-v6/board/ports/drv_ext_io.h +++ b/bsp/stm32/stm32f429-armfly-v6/board/ports/drv_ext_io.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -13,64 +13,64 @@ #include "rtthread.h" /* - armfly STM32-V6 Development board Extend IO - D0 - GPRS_RERM_ON - D1 - GPRS_RESET - D2 - NRF24L01_CE - D3 - NRF905_TX_EN - D4 - NRF905_TRX_CE/VS1053_XDCS - D5 - NRF905_PWR_UP - D6 - ESP8266_G0 - D7 - ESP8266_G2 - - D8 - LED1 - D9 - LED2 - D10 - LED3 - D11 - LED4 - D12 - TP_NRST - D13 - AD7606_OS0 - D14 - AD7606_OS1 - D15 - AD7606_OS2 - - GPIO can output 5V - D16 - Y50_0 - D17 - Y50_1 - D18 - Y50_2 - D19 - Y50_3 - D20 - Y50_4 - D21 - Y50_5 - D22 - Y50_6 - D23 - Y50_7 + armfly STM32-V6 Development board Extend IO + D0 - GPRS_RERM_ON + D1 - GPRS_RESET + D2 - NRF24L01_CE + D3 - NRF905_TX_EN + D4 - NRF905_TRX_CE/VS1053_XDCS + D5 - NRF905_PWR_UP + D6 - ESP8266_G0 + D7 - ESP8266_G2 - GPIO can output 3.3V - D24 - AD7606_RESET - D25 - AD7606_RAGE - D26 - Y33_2 - D27 - Y33_3 - D28 - Y33_4 - D29 - Y33_5 - D30 - Y33_6 - D31 - Y33_7 + D8 - LED1 + D9 - LED2 + D10 - LED3 + D11 - LED4 + D12 - TP_NRST + D13 - AD7606_OS0 + D14 - AD7606_OS1 + D15 - AD7606_OS2 + + GPIO can output 5V + D16 - Y50_0 + D17 - Y50_1 + D18 - Y50_2 + D19 - Y50_3 + D20 - Y50_4 + D21 - Y50_5 + D22 - Y50_6 + D23 - Y50_7 + + GPIO can output 3.3V + D24 - AD7606_RESET + D25 - AD7606_RAGE + D26 - Y33_2 + D27 - Y33_3 + D28 - Y33_4 + D29 - Y33_5 + D30 - Y33_6 + D31 - Y33_7 */ #ifndef GPIO_Pin_0 - #define GPIO_Pin_0 ((uint16_t)0x0001) /* Pin 0 selected */ - #define GPIO_Pin_1 ((uint16_t)0x0002) /* Pin 1 selected */ - #define GPIO_Pin_2 ((uint16_t)0x0004) /* Pin 2 selected */ - #define GPIO_Pin_3 ((uint16_t)0x0008) /* Pin 3 selected */ - #define GPIO_Pin_4 ((uint16_t)0x0010) /* Pin 4 selected */ - #define GPIO_Pin_5 ((uint16_t)0x0020) /* Pin 5 selected */ - #define GPIO_Pin_6 ((uint16_t)0x0040) /* Pin 6 selected */ - #define GPIO_Pin_7 ((uint16_t)0x0080) /* Pin 7 selected */ - #define GPIO_Pin_8 ((uint16_t)0x0100) /* Pin 8 selected */ - #define GPIO_Pin_9 ((uint16_t)0x0200) /* Pin 9 selected */ - #define GPIO_Pin_10 ((uint16_t)0x0400) /* Pin 10 selected */ - #define GPIO_Pin_11 ((uint16_t)0x0800) /* Pin 11 selected */ - #define GPIO_Pin_12 ((uint16_t)0x1000) /* Pin 12 selected */ - #define GPIO_Pin_13 ((uint16_t)0x2000) /* Pin 13 selected */ - #define GPIO_Pin_14 ((uint16_t)0x4000) /* Pin 14 selected */ - #define GPIO_Pin_15 ((uint16_t)0x8000) /* Pin 15 selected */ -#endif + #define GPIO_Pin_0 ((uint16_t)0x0001) /* Pin 0 selected */ + #define GPIO_Pin_1 ((uint16_t)0x0002) /* Pin 1 selected */ + #define GPIO_Pin_2 ((uint16_t)0x0004) /* Pin 2 selected */ + #define GPIO_Pin_3 ((uint16_t)0x0008) /* Pin 3 selected */ + #define GPIO_Pin_4 ((uint16_t)0x0010) /* Pin 4 selected */ + #define GPIO_Pin_5 ((uint16_t)0x0020) /* Pin 5 selected */ + #define GPIO_Pin_6 ((uint16_t)0x0040) /* Pin 6 selected */ + #define GPIO_Pin_7 ((uint16_t)0x0080) /* Pin 7 selected */ + #define GPIO_Pin_8 ((uint16_t)0x0100) /* Pin 8 selected */ + #define GPIO_Pin_9 ((uint16_t)0x0200) /* Pin 9 selected */ + #define GPIO_Pin_10 ((uint16_t)0x0400) /* Pin 10 selected */ + #define GPIO_Pin_11 ((uint16_t)0x0800) /* Pin 11 selected */ + #define GPIO_Pin_12 ((uint16_t)0x1000) /* Pin 12 selected */ + #define GPIO_Pin_13 ((uint16_t)0x2000) /* Pin 13 selected */ + #define GPIO_Pin_14 ((uint16_t)0x4000) /* Pin 14 selected */ + #define GPIO_Pin_15 ((uint16_t)0x8000) /* Pin 15 selected */ +#endif #define GPIO_Pin_16 ((uint32_t)0x00010000) /* Pin 0 selected */ #define GPIO_Pin_17 ((uint32_t)0x00020000) /* Pin 1 selected */ @@ -90,42 +90,42 @@ #define GPIO_Pin_31 ((uint32_t)0x80000000) /* Pin 15 selected */ /* Rename the macro for the sake of memory */ -#define GPRS_TERM_ON GPIO_Pin_0 -#define GPRS_RESET GPIO_Pin_1 -#define NRF24L01_CE GPIO_Pin_2 -#define NRF905_TX_EN GPIO_Pin_3 -#define NRF905_TRX_CE GPIO_Pin_4 +#define GPRS_TERM_ON GPIO_Pin_0 +#define GPRS_RESET GPIO_Pin_1 +#define NRF24L01_CE GPIO_Pin_2 +#define NRF905_TX_EN GPIO_Pin_3 +#define NRF905_TRX_CE GPIO_Pin_4 #define VS1053_XDCS GPIO_Pin_4 -#define NRF905_PWR_UP GPIO_Pin_5 -#define ESP8266_G0 GPIO_Pin_6 -#define ESP8266_G2 GPIO_Pin_7 - -#define LED1 GPIO_Pin_8 -#define LED2 GPIO_Pin_9 -#define LED3 GPIO_Pin_10 -#define LED4 GPIO_Pin_11 -#define TP_NRST GPIO_Pin_12 -#define AD7606_OS0 GPIO_Pin_13 -#define AD7606_OS1 GPIO_Pin_14 -#define AD7606_OS2 GPIO_Pin_15 - -#define Y50_0 GPIO_Pin_16 -#define Y50_1 GPIO_Pin_17 -#define Y50_2 GPIO_Pin_18 -#define Y50_3 GPIO_Pin_19 -#define Y50_4 GPIO_Pin_20 -#define Y50_5 GPIO_Pin_21 -#define Y50_6 GPIO_Pin_22 -#define Y50_7 GPIO_Pin_23 +#define NRF905_PWR_UP GPIO_Pin_5 +#define ESP8266_G0 GPIO_Pin_6 +#define ESP8266_G2 GPIO_Pin_7 + +#define LED1 GPIO_Pin_8 +#define LED2 GPIO_Pin_9 +#define LED3 GPIO_Pin_10 +#define LED4 GPIO_Pin_11 +#define TP_NRST GPIO_Pin_12 +#define AD7606_OS0 GPIO_Pin_13 +#define AD7606_OS1 GPIO_Pin_14 +#define AD7606_OS2 GPIO_Pin_15 + +#define Y50_0 GPIO_Pin_16 +#define Y50_1 GPIO_Pin_17 +#define Y50_2 GPIO_Pin_18 +#define Y50_3 GPIO_Pin_19 +#define Y50_4 GPIO_Pin_20 +#define Y50_5 GPIO_Pin_21 +#define Y50_6 GPIO_Pin_22 +#define Y50_7 GPIO_Pin_23 -#define AD7606_RESET GPIO_Pin_24 -#define AD7606_RANGE GPIO_Pin_25 -#define Y33_2 GPIO_Pin_26 -#define Y33_3 GPIO_Pin_27 -#define Y33_4 GPIO_Pin_28 -#define Y33_5 GPIO_Pin_29 -#define Y33_6 GPIO_Pin_30 -#define Y33_7 GPIO_Pin_31 +#define AD7606_RESET GPIO_Pin_24 +#define AD7606_RANGE GPIO_Pin_25 +#define Y33_2 GPIO_Pin_26 +#define Y33_3 GPIO_Pin_27 +#define Y33_4 GPIO_Pin_28 +#define Y33_5 GPIO_Pin_29 +#define Y33_6 GPIO_Pin_30 +#define Y33_7 GPIO_Pin_31 void HC574_SetPin(rt_uint32_t _pin, uint8_t _value); rt_uint8_t HC574_GetPin(rt_uint32_t _pin); diff --git a/bsp/stm32/stm32f429-armfly-v6/board/ports/fal_cfg.h b/bsp/stm32/stm32f429-armfly-v6/board/ports/fal_cfg.h index a587e207ce..995136cd54 100644 --- a/bsp/stm32/stm32f429-armfly-v6/board/ports/fal_cfg.h +++ b/bsp/stm32/stm32f429-armfly-v6/board/ports/fal_cfg.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32f429-armfly-v6/board/ports/lcd_port.h b/bsp/stm32/stm32f429-armfly-v6/board/ports/lcd_port.h index 31e2b9a392..0fda729291 100644 --- a/bsp/stm32/stm32f429-armfly-v6/board/ports/lcd_port.h +++ b/bsp/stm32/stm32f429-armfly-v6/board/ports/lcd_port.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32f429-armfly-v6/board/ports/phy_reset.c b/bsp/stm32/stm32f429-armfly-v6/board/ports/phy_reset.c index 36296b486a..6d97b5a979 100644 --- a/bsp/stm32/stm32f429-armfly-v6/board/ports/phy_reset.c +++ b/bsp/stm32/stm32f429-armfly-v6/board/ports/phy_reset.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32f429-armfly-v6/board/ports/sdcard_port.c b/bsp/stm32/stm32f429-armfly-v6/board/ports/sdcard_port.c index b46537d311..6a79c83523 100644 --- a/bsp/stm32/stm32f429-armfly-v6/board/ports/sdcard_port.c +++ b/bsp/stm32/stm32f429-armfly-v6/board/ports/sdcard_port.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32f429-armfly-v6/board/ports/sdram_port.h b/bsp/stm32/stm32f429-armfly-v6/board/ports/sdram_port.h index 1e57acb19f..9b5a363b6f 100644 --- a/bsp/stm32/stm32f429-armfly-v6/board/ports/sdram_port.h +++ b/bsp/stm32/stm32f429-armfly-v6/board/ports/sdram_port.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32f429-armfly-v6/board/ports/spi_flash_init.c b/bsp/stm32/stm32f429-armfly-v6/board/ports/spi_flash_init.c index 526835b59a..21ac8bf319 100644 --- a/bsp/stm32/stm32f429-armfly-v6/board/ports/spi_flash_init.c +++ b/bsp/stm32/stm32f429-armfly-v6/board/ports/spi_flash_init.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32f429-atk-apollo/applications/main.c b/bsp/stm32/stm32f429-atk-apollo/applications/main.c index 487ddf44f6..6d19a46edb 100644 --- a/bsp/stm32/stm32f429-atk-apollo/applications/main.c +++ b/bsp/stm32/stm32f429-atk-apollo/applications/main.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32f429-atk-apollo/board/board.c b/bsp/stm32/stm32f429-atk-apollo/board/board.c index c13619f753..36d2ff17d3 100644 --- a/bsp/stm32/stm32f429-atk-apollo/board/board.c +++ b/bsp/stm32/stm32f429-atk-apollo/board/board.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -18,11 +18,11 @@ void SystemClock_Config(void) RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0}; - /**Configure the main internal regulator output voltage + /**Configure the main internal regulator output voltage */ __HAL_RCC_PWR_CLK_ENABLE(); __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); - /**Initializes the CPU, AHB and APB busses clocks + /**Initializes the CPU, AHB and APB busses clocks */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSI|RCC_OSCILLATORTYPE_HSE |RCC_OSCILLATORTYPE_LSE; @@ -39,13 +39,13 @@ void SystemClock_Config(void) { Error_Handler(); } - /**Activate the Over-Drive mode + /**Activate the Over-Drive mode */ if (HAL_PWREx_EnableOverDrive() != HAL_OK) { Error_Handler(); } - /**Initializes the CPU, AHB and APB busses clocks + /**Initializes the CPU, AHB and APB busses clocks */ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; diff --git a/bsp/stm32/stm32f429-atk-apollo/board/board.h b/bsp/stm32/stm32f429-atk-apollo/board/board.h index 9173f50c46..077b0af713 100644 --- a/bsp/stm32/stm32f429-atk-apollo/board/board.h +++ b/bsp/stm32/stm32f429-atk-apollo/board/board.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32f429-atk-apollo/board/ports/audio/drv_mic.c b/bsp/stm32/stm32f429-atk-apollo/board/ports/audio/drv_mic.c index ce1021fb60..889c5b0dee 100644 --- a/bsp/stm32/stm32f429-atk-apollo/board/ports/audio/drv_mic.c +++ b/bsp/stm32/stm32f429-atk-apollo/board/ports/audio/drv_mic.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -86,7 +86,7 @@ void SAIB_config_set(struct rt_audio_configure config) SAIB_samplerate_set(config.samplerate); SAIB_samplebits_set(config.samplebits); } - + static void SAIB_config_init() { _sai_b.hsai.Instance = SAI1_Block_B; diff --git a/bsp/stm32/stm32f429-atk-apollo/board/ports/audio/drv_mic.h b/bsp/stm32/stm32f429-atk-apollo/board/ports/audio/drv_mic.h index 8aeede498c..0cc55f7aa9 100644 --- a/bsp/stm32/stm32f429-atk-apollo/board/ports/audio/drv_mic.h +++ b/bsp/stm32/stm32f429-atk-apollo/board/ports/audio/drv_mic.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -8,10 +8,10 @@ * 2019-07-28 Ernest the first version */ -#ifndef __DRV_MIC_H_ -#define __DRV_MIC_H_ +#ifndef __DRV_MIC_H_ +#define __DRV_MIC_H_ -#include <rtthread.h> +#include <rtthread.h> #include <rtdevice.h> #endif diff --git a/bsp/stm32/stm32f429-atk-apollo/board/ports/audio/drv_sound.c b/bsp/stm32/stm32f429-atk-apollo/board/ports/audio/drv_sound.c index 4a51ef6347..f564cc1b84 100644 --- a/bsp/stm32/stm32f429-atk-apollo/board/ports/audio/drv_sound.c +++ b/bsp/stm32/stm32f429-atk-apollo/board/ports/audio/drv_sound.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -16,7 +16,7 @@ #define DBG_LVL DBG_INFO #include <rtdbg.h> -#define CODEC_I2C_NAME ("i2c1") +#define CODEC_I2C_NAME ("i2c1") #define TX_DMA_FIFO_SIZE (2048) @@ -49,7 +49,7 @@ void SAIA_samplerate_set(rt_uint32_t freq) { RCC_PeriphCLKInitTypeDef PeriphClkInitStruct; int i; - + /* check frequence */ for (i = 0; i < (sizeof(SAI_PSC_TBL) / sizeof(SAI_PSC_TBL[0])); i++) { @@ -60,12 +60,12 @@ void SAIA_samplerate_set(rt_uint32_t freq) LOG_E("Can not support this frequence: %d.", freq); return; } - + PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_SAI_PLLI2S; PeriphClkInitStruct.PLLI2S.PLLI2SN = SAI_PSC_TBL[i][1]; PeriphClkInitStruct.PLLI2S.PLLI2SQ = SAI_PSC_TBL[i][2]; PeriphClkInitStruct.PLLI2SDivQ = SAI_PSC_TBL[i][3] + 1; - + HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct); __HAL_RCC_SAI_BLOCKACLKSOURCE_CONFIG(RCC_SAIACLKSOURCE_PLLI2S); diff --git a/bsp/stm32/stm32f429-atk-apollo/board/ports/audio/drv_sound.h b/bsp/stm32/stm32f429-atk-apollo/board/ports/audio/drv_sound.h index 216481444f..28a1ea210d 100644 --- a/bsp/stm32/stm32f429-atk-apollo/board/ports/audio/drv_sound.h +++ b/bsp/stm32/stm32f429-atk-apollo/board/ports/audio/drv_sound.h @@ -1,19 +1,19 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * * Change Logs: * Date Author Notes - * 2019-07-28 Ernest the first version + * 2019-07-28 Ernest the first version */ -#ifndef __DRV_SOUND_H_ -#define __DRV_SOUND_H_ +#ifndef __DRV_SOUND_H_ +#define __DRV_SOUND_H_ -#include <rtthread.h> +#include <rtthread.h> #include <rtdevice.h> -#include <board.h> +#include <board.h> #define AUDIO_FREQUENCY_048K ((rt_uint32_t) 48000) #define AUDIO_FREQUENCY_044K ((rt_uint32_t) 44100) diff --git a/bsp/stm32/stm32f429-atk-apollo/board/ports/audio/drv_wm8978.c b/bsp/stm32/stm32f429-atk-apollo/board/ports/audio/drv_wm8978.c index 5c7b8084c4..0f650538f9 100644 --- a/bsp/stm32/stm32f429-atk-apollo/board/ports/audio/drv_wm8978.c +++ b/bsp/stm32/stm32f429-atk-apollo/board/ports/audio/drv_wm8978.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -763,8 +763,8 @@ rt_err_t wm8978_init(struct rt_i2c_bus_device *dev) wm8978_interface_cfg(dev, I2S_FOMAT_SELECT, 16); wm8978_mic_enabled(dev, 0); - - return RT_EOK; + + return RT_EOK; } void wm8978_DAC_enabled(struct rt_i2c_bus_device *dev, rt_bool_t bool) diff --git a/bsp/stm32/stm32f429-atk-apollo/board/ports/audio/drv_wm8978.h b/bsp/stm32/stm32f429-atk-apollo/board/ports/audio/drv_wm8978.h index d385255f9c..fe476ec0bb 100644 --- a/bsp/stm32/stm32f429-atk-apollo/board/ports/audio/drv_wm8978.h +++ b/bsp/stm32/stm32f429-atk-apollo/board/ports/audio/drv_wm8978.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32f429-atk-apollo/board/ports/fal_cfg.h b/bsp/stm32/stm32f429-atk-apollo/board/ports/fal_cfg.h index a587e207ce..995136cd54 100644 --- a/bsp/stm32/stm32f429-atk-apollo/board/ports/fal_cfg.h +++ b/bsp/stm32/stm32f429-atk-apollo/board/ports/fal_cfg.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32f429-atk-apollo/board/ports/phy_reset.c b/bsp/stm32/stm32f429-atk-apollo/board/ports/phy_reset.c index 666d053b25..826f8c7ded 100644 --- a/bsp/stm32/stm32f429-atk-apollo/board/ports/phy_reset.c +++ b/bsp/stm32/stm32f429-atk-apollo/board/ports/phy_reset.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -16,8 +16,8 @@ #include <drv_log.h> #define ETH_RESET_IO 7 //PHY RESET PIN -#define I2C_BUS_NAME "i2c1" -#define PCF8574_ADDR 0x20 +#define I2C_BUS_NAME "i2c1" +#define PCF8574_ADDR 0x20 /* pcf8574 hardware init */ pcf8574_device_t pcf8574_hw_init(char * dev_name, int addr) diff --git a/bsp/stm32/stm32f429-atk-apollo/board/ports/sdcard_port.c b/bsp/stm32/stm32f429-atk-apollo/board/ports/sdcard_port.c index 0a9c36fd42..bc7e8b676e 100644 --- a/bsp/stm32/stm32f429-atk-apollo/board/ports/sdcard_port.c +++ b/bsp/stm32/stm32f429-atk-apollo/board/ports/sdcard_port.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32f429-atk-apollo/board/ports/sdram_port.h b/bsp/stm32/stm32f429-atk-apollo/board/ports/sdram_port.h index ff948cb61e..85697210fa 100644 --- a/bsp/stm32/stm32f429-atk-apollo/board/ports/sdram_port.h +++ b/bsp/stm32/stm32f429-atk-apollo/board/ports/sdram_port.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32f429-atk-apollo/board/ports/spi_flash_init.c b/bsp/stm32/stm32f429-atk-apollo/board/ports/spi_flash_init.c index 26a9b2d2a8..7e35a36c86 100644 --- a/bsp/stm32/stm32f429-atk-apollo/board/ports/spi_flash_init.c +++ b/bsp/stm32/stm32f429-atk-apollo/board/ports/spi_flash_init.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32f429-fire-challenger/applications/main.c b/bsp/stm32/stm32f429-fire-challenger/applications/main.c index 1078b64286..64e40b75c8 100644 --- a/bsp/stm32/stm32f429-fire-challenger/applications/main.c +++ b/bsp/stm32/stm32f429-fire-challenger/applications/main.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32f429-fire-challenger/board/board.c b/bsp/stm32/stm32f429-fire-challenger/board/board.c index ec47ab0d3a..5ca583d599 100644 --- a/bsp/stm32/stm32f429-fire-challenger/board/board.c +++ b/bsp/stm32/stm32f429-fire-challenger/board/board.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32f429-fire-challenger/board/board.h b/bsp/stm32/stm32f429-fire-challenger/board/board.h index ab9e1733e9..c51f6a93cc 100644 --- a/bsp/stm32/stm32f429-fire-challenger/board/board.h +++ b/bsp/stm32/stm32f429-fire-challenger/board/board.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32f429-fire-challenger/board/ports/fal_cfg.h b/bsp/stm32/stm32f429-fire-challenger/board/ports/fal_cfg.h index a587e207ce..995136cd54 100644 --- a/bsp/stm32/stm32f429-fire-challenger/board/ports/fal_cfg.h +++ b/bsp/stm32/stm32f429-fire-challenger/board/ports/fal_cfg.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32f429-fire-challenger/board/ports/lcd_port.h b/bsp/stm32/stm32f429-fire-challenger/board/ports/lcd_port.h index 2660f3931b..8d297ec915 100644 --- a/bsp/stm32/stm32f429-fire-challenger/board/ports/lcd_port.h +++ b/bsp/stm32/stm32f429-fire-challenger/board/ports/lcd_port.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32f429-fire-challenger/board/ports/phy_reset.c b/bsp/stm32/stm32f429-fire-challenger/board/ports/phy_reset.c index 298dd14e29..8eaf6dcd5a 100644 --- a/bsp/stm32/stm32f429-fire-challenger/board/ports/phy_reset.c +++ b/bsp/stm32/stm32f429-fire-challenger/board/ports/phy_reset.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32f429-fire-challenger/board/ports/sdcard_port.c b/bsp/stm32/stm32f429-fire-challenger/board/ports/sdcard_port.c index d7b740ae47..01111ab4d3 100644 --- a/bsp/stm32/stm32f429-fire-challenger/board/ports/sdcard_port.c +++ b/bsp/stm32/stm32f429-fire-challenger/board/ports/sdcard_port.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32f429-fire-challenger/board/ports/sdram_port.h b/bsp/stm32/stm32f429-fire-challenger/board/ports/sdram_port.h index 72d7c8d06d..1e5978871b 100644 --- a/bsp/stm32/stm32f429-fire-challenger/board/ports/sdram_port.h +++ b/bsp/stm32/stm32f429-fire-challenger/board/ports/sdram_port.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32f429-fire-challenger/board/ports/spi_flash_init.c b/bsp/stm32/stm32f429-fire-challenger/board/ports/spi_flash_init.c index 5a1a4a2585..94a550cf37 100644 --- a/bsp/stm32/stm32f429-fire-challenger/board/ports/spi_flash_init.c +++ b/bsp/stm32/stm32f429-fire-challenger/board/ports/spi_flash_init.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32f429-st-disco/applications/lcd_init.c b/bsp/stm32/stm32f429-st-disco/applications/lcd_init.c index 277a754ae6..2660e6ef7c 100644 --- a/bsp/stm32/stm32f429-st-disco/applications/lcd_init.c +++ b/bsp/stm32/stm32f429-st-disco/applications/lcd_init.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32f429-st-disco/applications/main.c b/bsp/stm32/stm32f429-st-disco/applications/main.c index 8e6e8caef1..992f2b5d74 100644 --- a/bsp/stm32/stm32f429-st-disco/applications/main.c +++ b/bsp/stm32/stm32f429-st-disco/applications/main.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32f429-st-disco/board/board.c b/bsp/stm32/stm32f429-st-disco/board/board.c index ca12c3724e..5e9e6f4c77 100644 --- a/bsp/stm32/stm32f429-st-disco/board/board.c +++ b/bsp/stm32/stm32f429-st-disco/board/board.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -17,11 +17,11 @@ void SystemClock_Config(void) RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0}; - /** Configure the main internal regulator output voltage + /** Configure the main internal regulator output voltage */ __HAL_RCC_PWR_CLK_ENABLE(); __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); - /** Initializes the CPU, AHB and APB busses clocks + /** Initializes the CPU, AHB and APB busses clocks */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; RCC_OscInitStruct.HSEState = RCC_HSE_ON; @@ -35,7 +35,7 @@ void SystemClock_Config(void) { Error_Handler(); } - /** Initializes the CPU, AHB and APB busses clocks + /** Initializes the CPU, AHB and APB busses clocks */ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; diff --git a/bsp/stm32/stm32f429-st-disco/board/board.h b/bsp/stm32/stm32f429-st-disco/board/board.h index 47e439a260..2d2b2088a3 100644 --- a/bsp/stm32/stm32f429-st-disco/board/board.h +++ b/bsp/stm32/stm32f429-st-disco/board/board.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32f429-st-disco/board/ports/fal_cfg.h b/bsp/stm32/stm32f429-st-disco/board/ports/fal_cfg.h index 46ecb322c4..ac75718bc7 100644 --- a/bsp/stm32/stm32f429-st-disco/board/ports/fal_cfg.h +++ b/bsp/stm32/stm32f429-st-disco/board/ports/fal_cfg.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -57,7 +57,7 @@ extern struct fal_flash_dev nor_flash0; &nor_flash0, \ } -#define ONCHIP_FLASH_PART_TABLE +#define ONCHIP_FLASH_PART_TABLE #define QSPI_FLASH_PART_TABLE \ {FAL_PART_MAGIC_WROD, "qspiflash", FAL_USING_NOR_FLASH_DEV_NAME, 0 , (16 * 1024 * 1024), 0}, @@ -76,7 +76,7 @@ extern struct fal_flash_dev nor_flash0; {FAL_PART_MAGIC_WROD, "param", "onchip_flash_64k", 0 , FLASH_SIZE_GRANULARITY_64K , 0}, \ {FAL_PART_MAGIC_WROD, "app", "onchip_flash_128k", 0 , FLASH_SIZE_GRANULARITY_128K, 0}, -#define QSPI_FLASH_PART_TABLE +#define QSPI_FLASH_PART_TABLE #else diff --git a/bsp/stm32/stm32f429-st-disco/board/ports/touch/drv_touch.c b/bsp/stm32/stm32f429-st-disco/board/ports/touch/drv_touch.c index 8559b69f98..d70e444ef4 100644 --- a/bsp/stm32/stm32f429-st-disco/board/ports/touch/drv_touch.c +++ b/bsp/stm32/stm32f429-st-disco/board/ports/touch/drv_touch.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -154,7 +154,7 @@ int32_t touch_get_state(struct touch_state *state) res = touch_read(STMPE811_TSC_CTRL, &val); if (res < 0) return -1; state->pressed = (val & (1 << 7)) ? 1 : 0; - + if (state->pressed) { val = STMPE811_TSC_DATA; @@ -218,7 +218,7 @@ static int rt_hw_touch_init(void) /* register touch device to RT-Thread */ rt_device_register(&touch, "touch", RT_DEVICE_FLAG_RDWR); - + return RT_EOK; } INIT_BOARD_EXPORT(rt_hw_touch_init); diff --git a/bsp/stm32/stm32f429-st-disco/board/ports/touch/drv_touch.h b/bsp/stm32/stm32f429-st-disco/board/ports/touch/drv_touch.h index 68c8f92b7f..a7b6328f17 100644 --- a/bsp/stm32/stm32f429-st-disco/board/ports/touch/drv_touch.h +++ b/bsp/stm32/stm32f429-st-disco/board/ports/touch/drv_touch.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32f446-st-nucleo/applications/main.c b/bsp/stm32/stm32f446-st-nucleo/applications/main.c index 0f283769a9..897c6eec1c 100644 --- a/bsp/stm32/stm32f446-st-nucleo/applications/main.c +++ b/bsp/stm32/stm32f446-st-nucleo/applications/main.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32f446-st-nucleo/board/board.c b/bsp/stm32/stm32f446-st-nucleo/board/board.c index aba3df89e1..a2500ee68a 100644 --- a/bsp/stm32/stm32f446-st-nucleo/board/board.c +++ b/bsp/stm32/stm32f446-st-nucleo/board/board.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -16,11 +16,11 @@ void SystemClock_Config(void) RCC_OscInitTypeDef RCC_OscInitStruct = {0}; RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; - /**Configure the main internal regulator output voltage + /**Configure the main internal regulator output voltage */ __HAL_RCC_PWR_CLK_ENABLE(); __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); - /**Initializes the CPU, AHB and APB busses clocks + /**Initializes the CPU, AHB and APB busses clocks */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; RCC_OscInitStruct.HSEState = RCC_HSE_ON; @@ -35,13 +35,13 @@ void SystemClock_Config(void) { Error_Handler(); } - /**Activate the Over-Drive mode + /**Activate the Over-Drive mode */ if (HAL_PWREx_EnableOverDrive() != HAL_OK) { Error_Handler(); } - /**Initializes the CPU, AHB and APB busses clocks + /**Initializes the CPU, AHB and APB busses clocks */ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; diff --git a/bsp/stm32/stm32f446-st-nucleo/board/board.h b/bsp/stm32/stm32f446-st-nucleo/board/board.h index 1800e44079..8cb4438f8b 100644 --- a/bsp/stm32/stm32f446-st-nucleo/board/board.h +++ b/bsp/stm32/stm32f446-st-nucleo/board/board.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32f469-st-disco/applications/lcd_init.c b/bsp/stm32/stm32f469-st-disco/applications/lcd_init.c index 277a754ae6..2660e6ef7c 100644 --- a/bsp/stm32/stm32f469-st-disco/applications/lcd_init.c +++ b/bsp/stm32/stm32f469-st-disco/applications/lcd_init.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32f469-st-disco/applications/main.c b/bsp/stm32/stm32f469-st-disco/applications/main.c index 8feca19928..759572d376 100644 --- a/bsp/stm32/stm32f469-st-disco/applications/main.c +++ b/bsp/stm32/stm32f469-st-disco/applications/main.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32f469-st-disco/board/board.c b/bsp/stm32/stm32f469-st-disco/board/board.c index 8c4c361dcc..fefb07fafd 100644 --- a/bsp/stm32/stm32f469-st-disco/board/board.c +++ b/bsp/stm32/stm32f469-st-disco/board/board.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -17,11 +17,11 @@ void SystemClock_Config(void) RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0}; - /** Configure the main internal regulator output voltage + /** Configure the main internal regulator output voltage */ __HAL_RCC_PWR_CLK_ENABLE(); __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); - /** Initializes the CPU, AHB and APB busses clocks + /** Initializes the CPU, AHB and APB busses clocks */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; RCC_OscInitStruct.HSEState = RCC_HSE_ON; @@ -36,13 +36,13 @@ void SystemClock_Config(void) { Error_Handler(); } - /** Activate the Over-Drive mode + /** Activate the Over-Drive mode */ if (HAL_PWREx_EnableOverDrive() != HAL_OK) { Error_Handler(); } - /** Initializes the CPU, AHB and APB busses clocks + /** Initializes the CPU, AHB and APB busses clocks */ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; diff --git a/bsp/stm32/stm32f469-st-disco/board/board.h b/bsp/stm32/stm32f469-st-disco/board/board.h index 0880c1f384..607aa3877d 100644 --- a/bsp/stm32/stm32f469-st-disco/board/board.h +++ b/bsp/stm32/stm32f469-st-disco/board/board.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32f469-st-disco/board/ports/drv_otm8009a.c b/bsp/stm32/stm32f469-st-disco/board/ports/drv_otm8009a.c index 84202f84c8..8fde3a56ae 100644 --- a/bsp/stm32/stm32f469-st-disco/board/ports/drv_otm8009a.c +++ b/bsp/stm32/stm32f469-st-disco/board/ports/drv_otm8009a.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -7,7 +7,7 @@ * Date Author Notes * 2019-05-23 WillianChan first version */ - + #include <board.h> #ifdef BSP_USING_LCD_OTM8009A extern DSI_HandleTypeDef hdsi; @@ -93,9 +93,9 @@ const rt_uint8_t RDS49[] = {0xF5, 0x06}; const rt_uint8_t RDS50[] = {0x00, 0xB1}; const rt_uint8_t RDS51[] = {0xC6, 0x06}; -void otm8009a_reset(void) +void otm8009a_reset(void) { - rt_pin_mode (GET_PIN(H, 7), PIN_MODE_OUTPUT); + rt_pin_mode (GET_PIN(H, 7), PIN_MODE_OUTPUT); rt_pin_write(GET_PIN(H, 7), PIN_LOW); rt_thread_delay(rt_tick_from_millisecond(20)); rt_pin_write(GET_PIN(H, 7), PIN_HIGH); @@ -116,7 +116,7 @@ static void otm8009a_write_cmd(uint8_t *p, uint32_t num) static void otm8009a_delay(uint32_t d) { - rt_thread_delay(rt_tick_from_millisecond(d)); + rt_thread_delay(rt_tick_from_millisecond(d)); } static void otm8009a_config(rt_uint32_t pixel_format) @@ -127,11 +127,11 @@ static void otm8009a_config(rt_uint32_t pixel_format) otm8009a_write_cmd((rt_uint8_t *)RDL02, 2); otm8009a_write_cmd((rt_uint8_t *)RDS02, 0); otm8009a_write_cmd((rt_uint8_t *)RDS03, 0); - otm8009a_delay(10); + otm8009a_delay(10); otm8009a_write_cmd((rt_uint8_t *)RDS04, 0); otm8009a_write_cmd((rt_uint8_t *)RDS05, 0); - otm8009a_delay(10); + otm8009a_delay(10); otm8009a_write_cmd((rt_uint8_t *)RDS06, 0); otm8009a_write_cmd((rt_uint8_t *)RDS07, 0); @@ -215,8 +215,8 @@ static void otm8009a_config(rt_uint32_t pixel_format) otm8009a_write_cmd((rt_uint8_t *)RDS01, 0); otm8009a_write_cmd((rt_uint8_t *)RDL04, 16); otm8009a_write_cmd((rt_uint8_t *)RDS36, 0); - otm8009a_delay(120); - + otm8009a_delay(120); + switch (pixel_format) { case RTGRAPHIC_PIXEL_FORMAT_RGB565: @@ -248,7 +248,7 @@ void stm32_mipi_lcd_init(void) void stm32_mipi_lcd_config(rt_uint32_t pixel_format) { - otm8009a_config(pixel_format); + otm8009a_config(pixel_format); } void stm32_mipi_display_on(void) diff --git a/bsp/stm32/stm32f469-st-disco/board/ports/drv_qspi_flash.c b/bsp/stm32/stm32f469-st-disco/board/ports/drv_qspi_flash.c index f5fe27d6e1..ff1b11e34c 100644 --- a/bsp/stm32/stm32f469-st-disco/board/ports/drv_qspi_flash.c +++ b/bsp/stm32/stm32f469-st-disco/board/ports/drv_qspi_flash.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -8,7 +8,7 @@ * 2018-11-27 zylx first version * 2019-04-11 ZYH port from stm32f7serial */ - + #include <board.h> #include <drv_qspi.h> #include <rtdevice.h> @@ -64,7 +64,7 @@ void n25qxxa_enter_qspi_mode(struct rt_qspi_device *device) static int rt_hw_qspi_flash_with_sfud_init(void) { stm32_qspi_bus_attach_device("qspi1", "qspi10", RT_NULL, 4, n25qxxa_enter_qspi_mode, RT_NULL); - + /* init n25qxx */ if (RT_NULL == rt_sfud_flash_probe(FAL_USING_NOR_FLASH_DEV_NAME, "qspi10")) { diff --git a/bsp/stm32/stm32f469-st-disco/board/ports/drv_sdcard.c b/bsp/stm32/stm32f469-st-disco/board/ports/drv_sdcard.c index cfe6f59e1e..9fd2d11fd4 100644 --- a/bsp/stm32/stm32f469-st-disco/board/ports/drv_sdcard.c +++ b/bsp/stm32/stm32f469-st-disco/board/ports/drv_sdcard.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -29,7 +29,7 @@ static void _sdcard_mount(void) { rt_device_t device; - + device = rt_device_find("sd0"); if (device == NULL) { @@ -56,7 +56,7 @@ static void _sdcard_unmount(void) rt_thread_mdelay(200); dfs_unmount("/"); LOG_I("Unmount \"/\""); - + mmcsd_wait_cd_changed(0); stm32_mmcsd_change(); mmcsd_wait_cd_changed(RT_WAITING_FOREVER); @@ -65,7 +65,7 @@ static void _sdcard_unmount(void) static void sd_mount(void *parameter) { rt_uint8_t re_sd_check_pin = 1; - + while (1) { rt_thread_mdelay(200); @@ -73,7 +73,7 @@ static void sd_mount(void *parameter) { _sdcard_mount(); } - + if (!re_sd_check_pin && (re_sd_check_pin = rt_pin_read(SD_CHECK_PIN)) != 0) { _sdcard_unmount(); @@ -84,7 +84,7 @@ static void sd_mount(void *parameter) int stm32_sdcard_mount(void) { rt_thread_t tid; - + rt_pin_mode(SD_CHECK_PIN, PIN_MODE_INPUT_PULLUP); tid = rt_thread_create("sd_mount", sd_mount, RT_NULL, diff --git a/bsp/stm32/stm32f469-st-disco/board/ports/fal_cfg.h b/bsp/stm32/stm32f469-st-disco/board/ports/fal_cfg.h index 46ecb322c4..ac75718bc7 100644 --- a/bsp/stm32/stm32f469-st-disco/board/ports/fal_cfg.h +++ b/bsp/stm32/stm32f469-st-disco/board/ports/fal_cfg.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -57,7 +57,7 @@ extern struct fal_flash_dev nor_flash0; &nor_flash0, \ } -#define ONCHIP_FLASH_PART_TABLE +#define ONCHIP_FLASH_PART_TABLE #define QSPI_FLASH_PART_TABLE \ {FAL_PART_MAGIC_WROD, "qspiflash", FAL_USING_NOR_FLASH_DEV_NAME, 0 , (16 * 1024 * 1024), 0}, @@ -76,7 +76,7 @@ extern struct fal_flash_dev nor_flash0; {FAL_PART_MAGIC_WROD, "param", "onchip_flash_64k", 0 , FLASH_SIZE_GRANULARITY_64K , 0}, \ {FAL_PART_MAGIC_WROD, "app", "onchip_flash_128k", 0 , FLASH_SIZE_GRANULARITY_128K, 0}, -#define QSPI_FLASH_PART_TABLE +#define QSPI_FLASH_PART_TABLE #else diff --git a/bsp/stm32/stm32f469-st-disco/board/ports/lcd_port.h b/bsp/stm32/stm32f469-st-disco/board/ports/lcd_port.h index d5ee2b13b4..b23a970538 100644 --- a/bsp/stm32/stm32f469-st-disco/board/ports/lcd_port.h +++ b/bsp/stm32/stm32f469-st-disco/board/ports/lcd_port.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -7,19 +7,19 @@ * Date Author Notes * 2018-07-28 liu2guang the first version for STM32F469NI-Discovery. */ - -#ifndef __DRV_LCD_H_ -#define __DRV_LCD_H_ -#include <rtthread.h> +#ifndef __DRV_LCD_H_ +#define __DRV_LCD_H_ + +#include <rtthread.h> #include <rtdevice.h> -#include <board.h> +#include <board.h> #define LCD_WIDTH (800U) #define LCD_HEIGHT (480U) #define LCD_HSYNC (1U) -#define LCD_HBP (15U) +#define LCD_HBP (15U) #define LCD_HFP (16U) #define LCD_VSYNC (2U) #define LCD_VBP (34U) diff --git a/bsp/stm32/stm32f469-st-disco/board/ports/qspi_mnt.c b/bsp/stm32/stm32f469-st-disco/board/ports/qspi_mnt.c index f90b468463..5b311a391a 100644 --- a/bsp/stm32/stm32f469-st-disco/board/ports/qspi_mnt.c +++ b/bsp/stm32/stm32f469-st-disco/board/ports/qspi_mnt.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32f469-st-disco/board/ports/sdram_port.h b/bsp/stm32/stm32f469-st-disco/board/ports/sdram_port.h index 14d44f7115..7b33d36362 100644 --- a/bsp/stm32/stm32f469-st-disco/board/ports/sdram_port.h +++ b/bsp/stm32/stm32f469-st-disco/board/ports/sdram_port.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32f469-st-disco/board/ports/touch/drv_touch.c b/bsp/stm32/stm32f469-st-disco/board/ports/touch/drv_touch.c index 1ff29544ff..53437f34ef 100644 --- a/bsp/stm32/stm32f469-st-disco/board/ports/touch/drv_touch.c +++ b/bsp/stm32/stm32f469-st-disco/board/ports/touch/drv_touch.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -7,7 +7,7 @@ * Date Author Notes * 2018-02-08 Zhangyihong the first version */ - + #include "drv_touch.h" #include <string.h> #ifdef BSP_USING_TOUCH @@ -105,7 +105,7 @@ static void touch_thread_entry(void *parameter) { continue; } - + while(touch->ops->read_point(&msg) == RT_EOK) { switch (msg.event) diff --git a/bsp/stm32/stm32f469-st-disco/board/ports/touch/drv_touch.h b/bsp/stm32/stm32f469-st-disco/board/ports/touch/drv_touch.h index a8fea21d54..21bea39f83 100644 --- a/bsp/stm32/stm32f469-st-disco/board/ports/touch/drv_touch.h +++ b/bsp/stm32/stm32f469-st-disco/board/ports/touch/drv_touch.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -7,7 +7,7 @@ * Date Author Notes * 2018-02-08 Zhangyihong the first version */ - + #ifndef __DRV_TOUCH_H__ #define __DRV_TOUCH_H__ diff --git a/bsp/stm32/stm32f469-st-disco/board/ports/touch/drv_touch_ft.c b/bsp/stm32/stm32f469-st-disco/board/ports/touch/drv_touch_ft.c index a7e9275441..e85e793573 100644 --- a/bsp/stm32/stm32f469-st-disco/board/ports/touch/drv_touch_ft.c +++ b/bsp/stm32/stm32f469-st-disco/board/ports/touch/drv_touch_ft.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -109,7 +109,7 @@ static rt_err_t ft_read_point(touch_msg_t msg) { return RT_ERROR; } - + if (point_num == 0) { if (s_tp_down) @@ -121,7 +121,7 @@ static rt_err_t ft_read_point(touch_msg_t msg) msg->event = TOUCH_EVENT_NONE; return RT_ERROR; } - + ret = ft_read(ft_i2c_bus, 0x03, point, 6); if (ret < 0) { @@ -130,7 +130,7 @@ static rt_err_t ft_read_point(touch_msg_t msg) msg->y = (point[0]&0x0F) << 8 | point[1]; msg->x = (point[2]&0x0F) << 8 | point[3]; - + if (s_tp_down) { msg->event = TOUCH_EVENT_MOVE; @@ -138,7 +138,7 @@ static rt_err_t ft_read_point(touch_msg_t msg) } msg->event = TOUCH_EVENT_DOWN; s_tp_down = 1; - + return RT_EOK; } diff --git a/bsp/stm32/stm32f746-st-disco/applications/main.c b/bsp/stm32/stm32f746-st-disco/applications/main.c index 669d889e58..0024ce1c0a 100644 --- a/bsp/stm32/stm32f746-st-disco/applications/main.c +++ b/bsp/stm32/stm32f746-st-disco/applications/main.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32f746-st-disco/board/board.c b/bsp/stm32/stm32f746-st-disco/board/board.c index bf92d115e7..da2564d515 100644 --- a/bsp/stm32/stm32f746-st-disco/board/board.c +++ b/bsp/stm32/stm32f746-st-disco/board/board.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -20,14 +20,14 @@ void SystemClock_Config(void) RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0}; - /**Configure LSE Drive Capability + /**Configure LSE Drive Capability */ HAL_PWR_EnableBkUpAccess(); - /**Configure the main internal regulator output voltage + /**Configure the main internal regulator output voltage */ __HAL_RCC_PWR_CLK_ENABLE(); __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); - /**Initializes the CPU, AHB and APB busses clocks + /**Initializes the CPU, AHB and APB busses clocks */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSI|RCC_OSCILLATORTYPE_HSE; RCC_OscInitStruct.HSEState = RCC_HSE_ON; @@ -42,13 +42,13 @@ void SystemClock_Config(void) { Error_Handler(); } - /**Activate the Over-Drive mode + /**Activate the Over-Drive mode */ if (HAL_PWREx_EnableOverDrive() != HAL_OK) { Error_Handler(); } - /**Initializes the CPU, AHB and APB busses clocks + /**Initializes the CPU, AHB and APB busses clocks */ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; diff --git a/bsp/stm32/stm32f746-st-disco/board/board.h b/bsp/stm32/stm32f746-st-disco/board/board.h index 98e3799e00..b0c120fb41 100644 --- a/bsp/stm32/stm32f746-st-disco/board/board.h +++ b/bsp/stm32/stm32f746-st-disco/board/board.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32f746-st-disco/board/ports/drv_qspi_flash.c b/bsp/stm32/stm32f746-st-disco/board/ports/drv_qspi_flash.c index ca7641f866..4e37f4ec2f 100644 --- a/bsp/stm32/stm32f746-st-disco/board/ports/drv_qspi_flash.c +++ b/bsp/stm32/stm32f746-st-disco/board/ports/drv_qspi_flash.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -7,7 +7,7 @@ * Date Author Notes * 2019-01-26 jinsheng first version */ - + #include <board.h> #include <drv_qspi.h> #include <rtdevice.h> @@ -63,7 +63,7 @@ void n25qxx_enter_qspi_mode(struct rt_qspi_device *device) static int rt_hw_qspi_flash_with_sfud_init(void) { stm32_qspi_bus_attach_device("qspi1", "qspi10", RT_NULL, 4, n25qxx_enter_qspi_mode, RT_NULL); - + /* init n25q128 */ if (RT_NULL == rt_sfud_flash_probe("n25q128", "qspi10")) { diff --git a/bsp/stm32/stm32f746-st-disco/board/ports/fal_cfg.h b/bsp/stm32/stm32f746-st-disco/board/ports/fal_cfg.h index c886dab45d..d7ce293475 100644 --- a/bsp/stm32/stm32f746-st-disco/board/ports/fal_cfg.h +++ b/bsp/stm32/stm32f746-st-disco/board/ports/fal_cfg.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32f746-st-disco/board/ports/lcd_port.h b/bsp/stm32/stm32f746-st-disco/board/ports/lcd_port.h index f534e50522..8ea00b0ed4 100644 --- a/bsp/stm32/stm32f746-st-disco/board/ports/lcd_port.h +++ b/bsp/stm32/stm32f746-st-disco/board/ports/lcd_port.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32f746-st-disco/board/ports/phy_reset.c b/bsp/stm32/stm32f746-st-disco/board/ports/phy_reset.c index 3d5f75c7f0..5825f775cc 100644 --- a/bsp/stm32/stm32f746-st-disco/board/ports/phy_reset.c +++ b/bsp/stm32/stm32f746-st-disco/board/ports/phy_reset.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32f746-st-disco/board/ports/sdcard_port.c b/bsp/stm32/stm32f746-st-disco/board/ports/sdcard_port.c index 0797f9326c..66e8dfefab 100644 --- a/bsp/stm32/stm32f746-st-disco/board/ports/sdcard_port.c +++ b/bsp/stm32/stm32f746-st-disco/board/ports/sdcard_port.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32f746-st-disco/board/ports/sdram_port.h b/bsp/stm32/stm32f746-st-disco/board/ports/sdram_port.h index 4c49e0f217..91bb91b01b 100644 --- a/bsp/stm32/stm32f746-st-disco/board/ports/sdram_port.h +++ b/bsp/stm32/stm32f746-st-disco/board/ports/sdram_port.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32f767-atk-apollo/applications/main.c b/bsp/stm32/stm32f767-atk-apollo/applications/main.c index 7d7440f05c..71e6132ea2 100644 --- a/bsp/stm32/stm32f767-atk-apollo/applications/main.c +++ b/bsp/stm32/stm32f767-atk-apollo/applications/main.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32f767-atk-apollo/board/board.c b/bsp/stm32/stm32f767-atk-apollo/board/board.c index d9959f9301..726b7783b7 100644 --- a/bsp/stm32/stm32f767-atk-apollo/board/board.c +++ b/bsp/stm32/stm32f767-atk-apollo/board/board.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -16,15 +16,15 @@ void SystemClock_Config(void) RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0}; - /** Configure LSE Drive Capability + /** Configure LSE Drive Capability */ HAL_PWR_EnableBkUpAccess(); __HAL_RCC_LSEDRIVE_CONFIG(RCC_LSEDRIVE_LOW); - /** Configure the main internal regulator output voltage + /** Configure the main internal regulator output voltage */ __HAL_RCC_PWR_CLK_ENABLE(); __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); - /** Initializes the CPU, AHB and APB busses clocks + /** Initializes the CPU, AHB and APB busses clocks */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSI|RCC_OSCILLATORTYPE_HSE |RCC_OSCILLATORTYPE_LSE; @@ -41,13 +41,13 @@ void SystemClock_Config(void) { Error_Handler(); } - /** Activate the Over-Drive mode + /** Activate the Over-Drive mode */ if (HAL_PWREx_EnableOverDrive() != HAL_OK) { Error_Handler(); } - /** Initializes the CPU, AHB and APB busses clocks + /** Initializes the CPU, AHB and APB busses clocks */ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; diff --git a/bsp/stm32/stm32f767-atk-apollo/board/board.h b/bsp/stm32/stm32f767-atk-apollo/board/board.h index 3d986024ae..e91271055e 100644 --- a/bsp/stm32/stm32f767-atk-apollo/board/board.h +++ b/bsp/stm32/stm32f767-atk-apollo/board/board.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32f767-atk-apollo/board/ports/drv_qspi_flash.c b/bsp/stm32/stm32f767-atk-apollo/board/ports/drv_qspi_flash.c index 5cabc9d4d2..72e589aea4 100644 --- a/bsp/stm32/stm32f767-atk-apollo/board/ports/drv_qspi_flash.c +++ b/bsp/stm32/stm32f767-atk-apollo/board/ports/drv_qspi_flash.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -7,7 +7,7 @@ * Date Author Notes * 2018-11-27 zylx first version */ - + #include <board.h> #include <drv_qspi.h> #include <rtdevice.h> @@ -63,7 +63,7 @@ void w25qxx_enter_qspi_mode(struct rt_qspi_device *device) static int rt_hw_qspi_flash_with_sfud_init(void) { stm32_qspi_bus_attach_device("qspi1", "qspi10", RT_NULL, 4, w25qxx_enter_qspi_mode, RT_NULL); - + /* init W25Q256 */ if (RT_NULL == rt_sfud_flash_probe("W25Q256", "qspi10")) { diff --git a/bsp/stm32/stm32f767-atk-apollo/board/ports/fal_cfg.h b/bsp/stm32/stm32f767-atk-apollo/board/ports/fal_cfg.h index 891beb2010..5ddddaa2cd 100644 --- a/bsp/stm32/stm32f767-atk-apollo/board/ports/fal_cfg.h +++ b/bsp/stm32/stm32f767-atk-apollo/board/ports/fal_cfg.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32f767-atk-apollo/board/ports/lcd_port.h b/bsp/stm32/stm32f767-atk-apollo/board/ports/lcd_port.h index ca894bb045..156ba2e2cf 100644 --- a/bsp/stm32/stm32f767-atk-apollo/board/ports/lcd_port.h +++ b/bsp/stm32/stm32f767-atk-apollo/board/ports/lcd_port.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32f767-atk-apollo/board/ports/phy_reset.c b/bsp/stm32/stm32f767-atk-apollo/board/ports/phy_reset.c index d00e6c06e0..18bed5f8e4 100644 --- a/bsp/stm32/stm32f767-atk-apollo/board/ports/phy_reset.c +++ b/bsp/stm32/stm32f767-atk-apollo/board/ports/phy_reset.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32f767-atk-apollo/board/ports/sdcard_port.c b/bsp/stm32/stm32f767-atk-apollo/board/ports/sdcard_port.c index 0a9c36fd42..bc7e8b676e 100644 --- a/bsp/stm32/stm32f767-atk-apollo/board/ports/sdcard_port.c +++ b/bsp/stm32/stm32f767-atk-apollo/board/ports/sdcard_port.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32f767-atk-apollo/board/ports/sdram_port.h b/bsp/stm32/stm32f767-atk-apollo/board/ports/sdram_port.h index ff948cb61e..85697210fa 100644 --- a/bsp/stm32/stm32f767-atk-apollo/board/ports/sdram_port.h +++ b/bsp/stm32/stm32f767-atk-apollo/board/ports/sdram_port.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32f767-fire-challenger/applications/main.c b/bsp/stm32/stm32f767-fire-challenger/applications/main.c index 9ed6529712..4cf67f2e9e 100644 --- a/bsp/stm32/stm32f767-fire-challenger/applications/main.c +++ b/bsp/stm32/stm32f767-fire-challenger/applications/main.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32f767-fire-challenger/board/board.c b/bsp/stm32/stm32f767-fire-challenger/board/board.c index f5b0c783c7..de621405e1 100644 --- a/bsp/stm32/stm32f767-fire-challenger/board/board.c +++ b/bsp/stm32/stm32f767-fire-challenger/board/board.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -16,11 +16,11 @@ void SystemClock_Config(void) RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0}; - /**Configure the main internal regulator output voltage + /**Configure the main internal regulator output voltage */ __HAL_RCC_PWR_CLK_ENABLE(); __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); - /**Initializes the CPU, AHB and APB busses clocks + /**Initializes the CPU, AHB and APB busses clocks */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; RCC_OscInitStruct.HSEState = RCC_HSE_ON; @@ -34,13 +34,13 @@ void SystemClock_Config(void) { Error_Handler(); } - /**Activate the Over-Drive mode + /**Activate the Over-Drive mode */ if (HAL_PWREx_EnableOverDrive() != HAL_OK) { Error_Handler(); } - /**Initializes the CPU, AHB and APB busses clocks + /**Initializes the CPU, AHB and APB busses clocks */ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; diff --git a/bsp/stm32/stm32f767-fire-challenger/board/board.h b/bsp/stm32/stm32f767-fire-challenger/board/board.h index 1beb8c5f87..e9a1277849 100644 --- a/bsp/stm32/stm32f767-fire-challenger/board/board.h +++ b/bsp/stm32/stm32f767-fire-challenger/board/board.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32f767-fire-challenger/board/ports/drv_qspi_flash.c b/bsp/stm32/stm32f767-fire-challenger/board/ports/drv_qspi_flash.c index 36ecb754e9..a3091fd2eb 100644 --- a/bsp/stm32/stm32f767-fire-challenger/board/ports/drv_qspi_flash.c +++ b/bsp/stm32/stm32f767-fire-challenger/board/ports/drv_qspi_flash.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -7,7 +7,7 @@ * Date Author Notes * 2018-11-27 zylx first version */ - + #include <board.h> #include <drv_qspi.h> #include <rtdevice.h> @@ -63,7 +63,7 @@ void w25qxx_enter_qspi_mode(struct rt_qspi_device *device) static int rt_hw_qspi_flash_with_sfud_init(void) { stm32_qspi_bus_attach_device("qspi1", "qspi10", RT_NULL, 4, w25qxx_enter_qspi_mode, RT_NULL); - + /* init w25q128 */ if (RT_NULL == rt_sfud_flash_probe("W25Q128", "qspi10")) { diff --git a/bsp/stm32/stm32f767-fire-challenger/board/ports/fal_cfg.h b/bsp/stm32/stm32f767-fire-challenger/board/ports/fal_cfg.h index 891beb2010..5ddddaa2cd 100644 --- a/bsp/stm32/stm32f767-fire-challenger/board/ports/fal_cfg.h +++ b/bsp/stm32/stm32f767-fire-challenger/board/ports/fal_cfg.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32f767-fire-challenger/board/ports/lcd_port.h b/bsp/stm32/stm32f767-fire-challenger/board/ports/lcd_port.h index 2660f3931b..8d297ec915 100644 --- a/bsp/stm32/stm32f767-fire-challenger/board/ports/lcd_port.h +++ b/bsp/stm32/stm32f767-fire-challenger/board/ports/lcd_port.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32f767-fire-challenger/board/ports/phy_reset.c b/bsp/stm32/stm32f767-fire-challenger/board/ports/phy_reset.c index 298dd14e29..8eaf6dcd5a 100644 --- a/bsp/stm32/stm32f767-fire-challenger/board/ports/phy_reset.c +++ b/bsp/stm32/stm32f767-fire-challenger/board/ports/phy_reset.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32f767-fire-challenger/board/ports/sdcard_port.c b/bsp/stm32/stm32f767-fire-challenger/board/ports/sdcard_port.c index 615ad6e06e..f1a7b8c27f 100644 --- a/bsp/stm32/stm32f767-fire-challenger/board/ports/sdcard_port.c +++ b/bsp/stm32/stm32f767-fire-challenger/board/ports/sdcard_port.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32f767-fire-challenger/board/ports/sdram_port.h b/bsp/stm32/stm32f767-fire-challenger/board/ports/sdram_port.h index 0d9c7e6918..7f9485aa4a 100644 --- a/bsp/stm32/stm32f767-fire-challenger/board/ports/sdram_port.h +++ b/bsp/stm32/stm32f767-fire-challenger/board/ports/sdram_port.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32f767-st-nucleo/applications/main.c b/bsp/stm32/stm32f767-st-nucleo/applications/main.c index ed3fc2c341..a0967c1326 100644 --- a/bsp/stm32/stm32f767-st-nucleo/applications/main.c +++ b/bsp/stm32/stm32f767-st-nucleo/applications/main.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -30,5 +30,5 @@ int main(void) rt_thread_mdelay(500); } - return RT_EOK; + return RT_EOK; } diff --git a/bsp/stm32/stm32f767-st-nucleo/board/board.c b/bsp/stm32/stm32f767-st-nucleo/board/board.c index 0c63bfe489..4e00f26886 100644 --- a/bsp/stm32/stm32f767-st-nucleo/board/board.c +++ b/bsp/stm32/stm32f767-st-nucleo/board/board.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -21,14 +21,14 @@ void SystemClock_Config(void) RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0}; - /**Configure LSE Drive Capability + /**Configure LSE Drive Capability */ HAL_PWR_EnableBkUpAccess(); - /**Configure the main internal regulator output voltage + /**Configure the main internal regulator output voltage */ __HAL_RCC_PWR_CLK_ENABLE(); __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); - /**Initializes the CPU, AHB and APB busses clocks + /**Initializes the CPU, AHB and APB busses clocks */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS; @@ -42,13 +42,13 @@ void SystemClock_Config(void) { Error_Handler(); } - /**Activate the Over-Drive mode + /**Activate the Over-Drive mode */ if (HAL_PWREx_EnableOverDrive() != HAL_OK) { Error_Handler(); } - /**Initializes the CPU, AHB and APB busses clocks + /**Initializes the CPU, AHB and APB busses clocks */ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; diff --git a/bsp/stm32/stm32f767-st-nucleo/board/board.h b/bsp/stm32/stm32f767-st-nucleo/board/board.h index 1d1e1d1106..1d82defe0d 100644 --- a/bsp/stm32/stm32f767-st-nucleo/board/board.h +++ b/bsp/stm32/stm32f767-st-nucleo/board/board.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32f767-st-nucleo/board/ports/phy_reset.c b/bsp/stm32/stm32f767-st-nucleo/board/ports/phy_reset.c index 8a833eec2a..79b8fecc16 100644 --- a/bsp/stm32/stm32f767-st-nucleo/board/ports/phy_reset.c +++ b/bsp/stm32/stm32f767-st-nucleo/board/ports/phy_reset.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2019, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -16,6 +16,6 @@ void phy_reset(void) * The PHY reset pin of NUCLEO-F767ZI is connected to the MCU reset pin, * so no additional reset is required. */ - + return ; } diff --git a/bsp/stm32/stm32f769-st-disco/applications/main.c b/bsp/stm32/stm32f769-st-disco/applications/main.c index 14a2f68f81..d61afe14c3 100644 --- a/bsp/stm32/stm32f769-st-disco/applications/main.c +++ b/bsp/stm32/stm32f769-st-disco/applications/main.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32f769-st-disco/board/board.c b/bsp/stm32/stm32f769-st-disco/board/board.c index 97bbbe3076..55126435b1 100644 --- a/bsp/stm32/stm32f769-st-disco/board/board.c +++ b/bsp/stm32/stm32f769-st-disco/board/board.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -20,14 +20,14 @@ void SystemClock_Config(void) RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0}; - /** Configure LSE Drive Capability + /** Configure LSE Drive Capability */ HAL_PWR_EnableBkUpAccess(); - /** Configure the main internal regulator output voltage + /** Configure the main internal regulator output voltage */ __HAL_RCC_PWR_CLK_ENABLE(); __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); - /** Initializes the CPU, AHB and APB busses clocks + /** Initializes the CPU, AHB and APB busses clocks */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; RCC_OscInitStruct.HSIState = RCC_HSI_ON; @@ -42,13 +42,13 @@ void SystemClock_Config(void) { Error_Handler(); } - /** Activate the Over-Drive mode + /** Activate the Over-Drive mode */ if (HAL_PWREx_EnableOverDrive() != HAL_OK) { Error_Handler(); } - /** Initializes the CPU, AHB and APB busses clocks + /** Initializes the CPU, AHB and APB busses clocks */ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; diff --git a/bsp/stm32/stm32f769-st-disco/board/board.h b/bsp/stm32/stm32f769-st-disco/board/board.h index 85c900e4c8..813dd5b27e 100644 --- a/bsp/stm32/stm32f769-st-disco/board/board.h +++ b/bsp/stm32/stm32f769-st-disco/board/board.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32g071-st-nucleo/applications/main.c b/bsp/stm32/stm32g071-st-nucleo/applications/main.c index 8541bd3b9f..5f22fcae65 100644 --- a/bsp/stm32/stm32g071-st-nucleo/applications/main.c +++ b/bsp/stm32/stm32g071-st-nucleo/applications/main.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32g071-st-nucleo/board/board.c b/bsp/stm32/stm32g071-st-nucleo/board/board.c index 5d634db15e..28d4e56e46 100644 --- a/bsp/stm32/stm32g071-st-nucleo/board/board.c +++ b/bsp/stm32/stm32g071-st-nucleo/board/board.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -16,10 +16,10 @@ void SystemClock_Config(void) RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; RCC_PeriphCLKInitTypeDef PeriphClkInit = {0}; - /**Configure the main internal regulator output voltage + /**Configure the main internal regulator output voltage */ HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1); - /**Initializes the CPU, AHB and APB busses clocks + /**Initializes the CPU, AHB and APB busses clocks */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; RCC_OscInitStruct.HSIState = RCC_HSI_ON; @@ -36,7 +36,7 @@ void SystemClock_Config(void) { Error_Handler(); } - /**Initializes the CPU, AHB and APB busses clocks + /**Initializes the CPU, AHB and APB busses clocks */ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK |RCC_CLOCKTYPE_PCLK1; @@ -48,7 +48,7 @@ void SystemClock_Config(void) { Error_Handler(); } - /**Initializes the peripherals clocks + /**Initializes the peripherals clocks */ PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_LPUART1; PeriphClkInit.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_PCLK1; diff --git a/bsp/stm32/stm32g071-st-nucleo/board/board.h b/bsp/stm32/stm32g071-st-nucleo/board/board.h index f0345a1293..d36387892b 100644 --- a/bsp/stm32/stm32g071-st-nucleo/board/board.h +++ b/bsp/stm32/stm32g071-st-nucleo/board/board.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32g071-st-nucleo/board/ports/fal_cfg.h b/bsp/stm32/stm32g071-st-nucleo/board/ports/fal_cfg.h index ee65e188d9..277b98ba70 100644 --- a/bsp/stm32/stm32g071-st-nucleo/board/ports/fal_cfg.h +++ b/bsp/stm32/stm32g071-st-nucleo/board/ports/fal_cfg.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32g431-st-nucleo/applications/main.c b/bsp/stm32/stm32g431-st-nucleo/applications/main.c index aad9acb9b9..fa4fd35a6e 100644 --- a/bsp/stm32/stm32g431-st-nucleo/applications/main.c +++ b/bsp/stm32/stm32g431-st-nucleo/applications/main.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32g431-st-nucleo/board/board.c b/bsp/stm32/stm32g431-st-nucleo/board/board.c index f025a3e234..7aeb088632 100644 --- a/bsp/stm32/stm32g431-st-nucleo/board/board.c +++ b/bsp/stm32/stm32g431-st-nucleo/board/board.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -17,10 +17,10 @@ void SystemClock_Config(void) RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; RCC_PeriphCLKInitTypeDef PeriphClkInit = {0}; - /** Configure the main internal regulator output voltage + /** Configure the main internal regulator output voltage */ HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1_BOOST); - /** Initializes the CPU, AHB and APB busses clocks + /** Initializes the CPU, AHB and APB busses clocks */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; RCC_OscInitStruct.HSIState = RCC_HSI_ON; @@ -36,7 +36,7 @@ void SystemClock_Config(void) { Error_Handler(); } - /** Initializes the CPU, AHB and APB busses clocks + /** Initializes the CPU, AHB and APB busses clocks */ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; @@ -49,7 +49,7 @@ void SystemClock_Config(void) { Error_Handler(); } - /** Initializes the peripherals clocks + /** Initializes the peripherals clocks */ PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USART1; PeriphClkInit.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2; diff --git a/bsp/stm32/stm32g431-st-nucleo/board/board.h b/bsp/stm32/stm32g431-st-nucleo/board/board.h index 9b91078b0f..6fd0c97890 100644 --- a/bsp/stm32/stm32g431-st-nucleo/board/board.h +++ b/bsp/stm32/stm32g431-st-nucleo/board/board.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32h743-atk-apollo/applications/main.c b/bsp/stm32/stm32h743-atk-apollo/applications/main.c index 19a43a12e6..376d3c78ff 100644 --- a/bsp/stm32/stm32h743-atk-apollo/applications/main.c +++ b/bsp/stm32/stm32h743-atk-apollo/applications/main.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -18,9 +18,9 @@ int main(void) { int count = 1; - /* set LED0 pin mode to output */ - rt_pin_mode(LED0_PIN, PIN_MODE_OUTPUT); - + /* set LED0 pin mode to output */ + rt_pin_mode(LED0_PIN, PIN_MODE_OUTPUT); + while (count++) { rt_pin_write(LED0_PIN, PIN_HIGH); diff --git a/bsp/stm32/stm32h743-atk-apollo/board/board.c b/bsp/stm32/stm32h743-atk-apollo/board/board.c index 1180633282..0b0dc623f2 100644 --- a/bsp/stm32/stm32h743-atk-apollo/board/board.c +++ b/bsp/stm32/stm32h743-atk-apollo/board/board.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -16,22 +16,22 @@ void SystemClock_Config(void) RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0}; - /** Supply configuration update enable + /** Supply configuration update enable */ HAL_PWREx_ConfigSupply(PWR_LDO_SUPPLY); - /** Configure the main internal regulator output voltage + /** Configure the main internal regulator output voltage */ __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); while(!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {} - /** Configure LSE Drive Capability + /** Configure LSE Drive Capability */ HAL_PWR_EnableBkUpAccess(); __HAL_RCC_LSEDRIVE_CONFIG(RCC_LSEDRIVE_LOW); - /** Macro to configure the PLL clock source + /** Macro to configure the PLL clock source */ __HAL_RCC_PLL_PLLSOURCE_CONFIG(RCC_PLLSOURCE_HSE); - /** Initializes the CPU, AHB and APB busses clocks + /** Initializes the CPU, AHB and APB busses clocks */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSI|RCC_OSCILLATORTYPE_HSE |RCC_OSCILLATORTYPE_LSE; @@ -52,7 +52,7 @@ void SystemClock_Config(void) { Error_Handler(); } - /** Initializes the CPU, AHB and APB busses clocks + /** Initializes the CPU, AHB and APB busses clocks */ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2 diff --git a/bsp/stm32/stm32h743-atk-apollo/board/board.h b/bsp/stm32/stm32h743-atk-apollo/board/board.h index ffb9772ee7..c9ec7a30d9 100644 --- a/bsp/stm32/stm32h743-atk-apollo/board/board.h +++ b/bsp/stm32/stm32h743-atk-apollo/board/board.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -20,7 +20,7 @@ extern "C" { #endif -#if !defined (LSI_VALUE) +#if !defined (LSI_VALUE) #define LSI_VALUE ((uint32_t)32000) #endif diff --git a/bsp/stm32/stm32h743-atk-apollo/board/drv_mpu.c b/bsp/stm32/stm32h743-atk-apollo/board/drv_mpu.c index 088d7a0bb7..1d5e13f9cf 100644 --- a/bsp/stm32/stm32h743-atk-apollo/board/drv_mpu.c +++ b/bsp/stm32/stm32h743-atk-apollo/board/drv_mpu.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32h743-atk-apollo/board/ports/drv_qspi_flash.c b/bsp/stm32/stm32h743-atk-apollo/board/ports/drv_qspi_flash.c index 5cabc9d4d2..72e589aea4 100644 --- a/bsp/stm32/stm32h743-atk-apollo/board/ports/drv_qspi_flash.c +++ b/bsp/stm32/stm32h743-atk-apollo/board/ports/drv_qspi_flash.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -7,7 +7,7 @@ * Date Author Notes * 2018-11-27 zylx first version */ - + #include <board.h> #include <drv_qspi.h> #include <rtdevice.h> @@ -63,7 +63,7 @@ void w25qxx_enter_qspi_mode(struct rt_qspi_device *device) static int rt_hw_qspi_flash_with_sfud_init(void) { stm32_qspi_bus_attach_device("qspi1", "qspi10", RT_NULL, 4, w25qxx_enter_qspi_mode, RT_NULL); - + /* init W25Q256 */ if (RT_NULL == rt_sfud_flash_probe("W25Q256", "qspi10")) { diff --git a/bsp/stm32/stm32h743-atk-apollo/board/ports/lcd_port.h b/bsp/stm32/stm32h743-atk-apollo/board/ports/lcd_port.h index ca894bb045..156ba2e2cf 100644 --- a/bsp/stm32/stm32h743-atk-apollo/board/ports/lcd_port.h +++ b/bsp/stm32/stm32h743-atk-apollo/board/ports/lcd_port.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32h743-atk-apollo/board/ports/sdram_port.h b/bsp/stm32/stm32h743-atk-apollo/board/ports/sdram_port.h index 5784f79036..50804561eb 100644 --- a/bsp/stm32/stm32h743-atk-apollo/board/ports/sdram_port.h +++ b/bsp/stm32/stm32h743-atk-apollo/board/ports/sdram_port.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32h743-st-nucleo/applications/main.c b/bsp/stm32/stm32h743-st-nucleo/applications/main.c index 2a4d35d4d8..9a8ac51bb5 100644 --- a/bsp/stm32/stm32h743-st-nucleo/applications/main.c +++ b/bsp/stm32/stm32h743-st-nucleo/applications/main.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32h743-st-nucleo/board/board.c b/bsp/stm32/stm32h743-st-nucleo/board/board.c index dc2e79d04f..b5a5a4245d 100644 --- a/bsp/stm32/stm32h743-st-nucleo/board/board.c +++ b/bsp/stm32/stm32h743-st-nucleo/board/board.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32h743-st-nucleo/board/board.h b/bsp/stm32/stm32h743-st-nucleo/board/board.h index 72d84ff29d..32eb25f147 100644 --- a/bsp/stm32/stm32h743-st-nucleo/board/board.h +++ b/bsp/stm32/stm32h743-st-nucleo/board/board.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32h750-armfly-h7-tool/applications/main.c b/bsp/stm32/stm32h750-armfly-h7-tool/applications/main.c index 73691fa783..b19e338dc5 100644 --- a/bsp/stm32/stm32h750-armfly-h7-tool/applications/main.c +++ b/bsp/stm32/stm32h750-armfly-h7-tool/applications/main.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32h750-armfly-h7-tool/board/board.c b/bsp/stm32/stm32h750-armfly-h7-tool/board/board.c index 7783d407a8..6426138e1e 100644 --- a/bsp/stm32/stm32h750-armfly-h7-tool/board/board.c +++ b/bsp/stm32/stm32h750-armfly-h7-tool/board/board.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -20,18 +20,18 @@ void SystemClock_Config(void) RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0}; - /** Supply configuration update enable + /** Supply configuration update enable */ HAL_PWREx_ConfigSupply(PWR_LDO_SUPPLY); - /** Configure the main internal regulator output voltage + /** Configure the main internal regulator output voltage */ __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); while(!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {} - /** Macro to configure the PLL clock source + /** Macro to configure the PLL clock source */ __HAL_RCC_PLL_PLLSOURCE_CONFIG(RCC_PLLSOURCE_HSE); - /** Initializes the CPU, AHB and APB busses clocks + /** Initializes the CPU, AHB and APB busses clocks */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48|RCC_OSCILLATORTYPE_HSE; RCC_OscInitStruct.HSEState = RCC_HSE_ON; @@ -50,7 +50,7 @@ void SystemClock_Config(void) { Error_Handler(); } - /** Initializes the CPU, AHB and APB busses clocks + /** Initializes the CPU, AHB and APB busses clocks */ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2 diff --git a/bsp/stm32/stm32h750-armfly-h7-tool/board/board.h b/bsp/stm32/stm32h750-armfly-h7-tool/board/board.h index a0455aec76..b41ed17e43 100644 --- a/bsp/stm32/stm32h750-armfly-h7-tool/board/board.h +++ b/bsp/stm32/stm32h750-armfly-h7-tool/board/board.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32l053-st-nucleo/applications/main.c b/bsp/stm32/stm32l053-st-nucleo/applications/main.c index 8541bd3b9f..5f22fcae65 100644 --- a/bsp/stm32/stm32l053-st-nucleo/applications/main.c +++ b/bsp/stm32/stm32l053-st-nucleo/applications/main.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32l053-st-nucleo/board/board.c b/bsp/stm32/stm32l053-st-nucleo/board/board.c index 858d59660f..62621eed0a 100644 --- a/bsp/stm32/stm32l053-st-nucleo/board/board.c +++ b/bsp/stm32/stm32l053-st-nucleo/board/board.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -17,11 +17,11 @@ void SystemClock_Config(void) RCC_ClkInitTypeDef RCC_ClkInitStruct; RCC_PeriphCLKInitTypeDef PeriphClkInit; - /**Configure the main internal regulator output voltage + /**Configure the main internal regulator output voltage */ __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); - /**Initializes the CPU, AHB and APB busses clocks + /**Initializes the CPU, AHB and APB busses clocks */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; RCC_OscInitStruct.HSIState = RCC_HSI_ON; @@ -35,7 +35,7 @@ void SystemClock_Config(void) _Error_Handler(__FILE__, __LINE__); } - /**Initializes the CPU, AHB and APB busses clocks + /**Initializes the CPU, AHB and APB busses clocks */ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; @@ -56,11 +56,11 @@ void SystemClock_Config(void) _Error_Handler(__FILE__, __LINE__); } - /**Configure the Systick interrupt time + /**Configure the Systick interrupt time */ HAL_SYSTICK_Config(HAL_RCC_GetHCLKFreq()/1000); - /**Configure the Systick + /**Configure the Systick */ HAL_SYSTICK_CLKSourceConfig(SYSTICK_CLKSOURCE_HCLK); diff --git a/bsp/stm32/stm32l053-st-nucleo/board/board.h b/bsp/stm32/stm32l053-st-nucleo/board/board.h index 016e4ec4e3..f88ee51946 100644 --- a/bsp/stm32/stm32l053-st-nucleo/board/board.h +++ b/bsp/stm32/stm32l053-st-nucleo/board/board.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32l432-st-nucleo/applications/main.c b/bsp/stm32/stm32l432-st-nucleo/applications/main.c index e1755ec81e..336347c11e 100644 --- a/bsp/stm32/stm32l432-st-nucleo/applications/main.c +++ b/bsp/stm32/stm32l432-st-nucleo/applications/main.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32l432-st-nucleo/board/board.c b/bsp/stm32/stm32l432-st-nucleo/board/board.c index 79f7c0344f..93000dc18c 100644 --- a/bsp/stm32/stm32l432-st-nucleo/board/board.c +++ b/bsp/stm32/stm32l432-st-nucleo/board/board.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -17,13 +17,13 @@ void SystemClock_Config(void) RCC_ClkInitTypeDef RCC_ClkInitStruct; RCC_PeriphCLKInitTypeDef PeriphClkInit; - /**Configure LSE Drive Capability + /**Configure LSE Drive Capability */ HAL_PWR_EnableBkUpAccess(); __HAL_RCC_LSEDRIVE_CONFIG(RCC_LSEDRIVE_LOW); - /**Initializes the CPU, AHB and APB busses clocks + /**Initializes the CPU, AHB and APB busses clocks */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSE|RCC_OSCILLATORTYPE_MSI; RCC_OscInitStruct.LSEState = RCC_LSE_ON; @@ -42,7 +42,7 @@ void SystemClock_Config(void) _Error_Handler(__FILE__, __LINE__); } - /**Initializes the CPU, AHB and APB busses clocks + /**Initializes the CPU, AHB and APB busses clocks */ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; @@ -63,22 +63,22 @@ void SystemClock_Config(void) _Error_Handler(__FILE__, __LINE__); } - /**Configure the main internal regulator output voltage + /**Configure the main internal regulator output voltage */ if (HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1) != HAL_OK) { _Error_Handler(__FILE__, __LINE__); } - /**Configure the Systick interrupt time + /**Configure the Systick interrupt time */ HAL_SYSTICK_Config(HAL_RCC_GetHCLKFreq()/1000); - /**Configure the Systick + /**Configure the Systick */ HAL_SYSTICK_CLKSourceConfig(SYSTICK_CLKSOURCE_HCLK); - /**Enable MSI Auto calibration + /**Enable MSI Auto calibration */ HAL_RCCEx_EnableMSIPLLMode(); diff --git a/bsp/stm32/stm32l432-st-nucleo/board/board.h b/bsp/stm32/stm32l432-st-nucleo/board/board.h index 3b3a77e103..77db7fce6e 100644 --- a/bsp/stm32/stm32l432-st-nucleo/board/board.h +++ b/bsp/stm32/stm32l432-st-nucleo/board/board.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32l452-st-nucleo/applications/main.c b/bsp/stm32/stm32l452-st-nucleo/applications/main.c index aad9acb9b9..fa4fd35a6e 100644 --- a/bsp/stm32/stm32l452-st-nucleo/applications/main.c +++ b/bsp/stm32/stm32l452-st-nucleo/applications/main.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32l452-st-nucleo/board/board.c b/bsp/stm32/stm32l452-st-nucleo/board/board.c index 5ab9da967a..d6c090b6b8 100644 --- a/bsp/stm32/stm32l452-st-nucleo/board/board.c +++ b/bsp/stm32/stm32l452-st-nucleo/board/board.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -20,7 +20,7 @@ void SystemClock_Config(void) RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; RCC_PeriphCLKInitTypeDef PeriphClkInit = {0}; - /** Initializes the CPU, AHB and APB busses clocks + /** Initializes the CPU, AHB and APB busses clocks */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; RCC_OscInitStruct.HSIState = RCC_HSI_ON; @@ -36,7 +36,7 @@ void SystemClock_Config(void) { Error_Handler(); } - /** Initializes the CPU, AHB and APB busses clocks + /** Initializes the CPU, AHB and APB busses clocks */ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; @@ -55,7 +55,7 @@ void SystemClock_Config(void) { Error_Handler(); } - /** Configure the main internal regulator output voltage + /** Configure the main internal regulator output voltage */ if (HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1) != HAL_OK) { diff --git a/bsp/stm32/stm32l452-st-nucleo/board/board.h b/bsp/stm32/stm32l452-st-nucleo/board/board.h index 1ea1e6be9c..0c9006dc40 100644 --- a/bsp/stm32/stm32l452-st-nucleo/board/board.h +++ b/bsp/stm32/stm32l452-st-nucleo/board/board.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32l452-st-nucleo/board/ports/fal_cfg.h b/bsp/stm32/stm32l452-st-nucleo/board/ports/fal_cfg.h index db782a5991..09c420dae9 100644 --- a/bsp/stm32/stm32l452-st-nucleo/board/ports/fal_cfg.h +++ b/bsp/stm32/stm32l452-st-nucleo/board/ports/fal_cfg.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -20,9 +20,9 @@ extern const struct fal_flash_dev stm32_onchip_flash; /* ========================= Device Configuration ========================== */ #ifdef BSP_USING_ON_CHIP_FLASH -#define ONCHIP_FLASH_DEV &stm32_onchip_flash, +#define ONCHIP_FLASH_DEV &stm32_onchip_flash, #else -#define ONCHIP_FLASH_DEV +#define ONCHIP_FLASH_DEV #endif /* BSP_USING_ON_CHIP_FLASH */ /* flash device table */ diff --git a/bsp/stm32/stm32l475-atk-pandora/applications/main.c b/bsp/stm32/stm32l475-atk-pandora/applications/main.c index 97e08a7d42..dfad8c68c1 100644 --- a/bsp/stm32/stm32l475-atk-pandora/applications/main.c +++ b/bsp/stm32/stm32l475-atk-pandora/applications/main.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32l475-atk-pandora/applications/nrf24l01_init.c b/bsp/stm32/stm32l475-atk-pandora/applications/nrf24l01_init.c index 59c27ee558..e291154233 100644 --- a/bsp/stm32/stm32l475-atk-pandora/applications/nrf24l01_init.c +++ b/bsp/stm32/stm32l475-atk-pandora/applications/nrf24l01_init.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32l475-atk-pandora/board/board.c b/bsp/stm32/stm32l475-atk-pandora/board/board.c index 3925f7924c..6e2be4bf42 100644 --- a/bsp/stm32/stm32l475-atk-pandora/board/board.c +++ b/bsp/stm32/stm32l475-atk-pandora/board/board.c @@ -18,11 +18,11 @@ void SystemClock_Config(void) RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; RCC_PeriphCLKInitTypeDef PeriphClkInit = {0}; - /** Configure LSE Drive Capability + /** Configure LSE Drive Capability */ HAL_PWR_EnableBkUpAccess(); __HAL_RCC_LSEDRIVE_CONFIG(RCC_LSEDRIVE_LOW); - /** Initializes the CPU, AHB and APB busses clocks + /** Initializes the CPU, AHB and APB busses clocks */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSI|RCC_OSCILLATORTYPE_HSE |RCC_OSCILLATORTYPE_LSE; @@ -40,7 +40,7 @@ void SystemClock_Config(void) { Error_Handler(); } - /** Initializes the CPU, AHB and APB busses clocks + /** Initializes the CPU, AHB and APB busses clocks */ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; @@ -72,7 +72,7 @@ void SystemClock_Config(void) { Error_Handler(); } - /** Configure the main internal regulator output voltage + /** Configure the main internal regulator output voltage */ if (HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1) != HAL_OK) { diff --git a/bsp/stm32/stm32l475-atk-pandora/board/board.h b/bsp/stm32/stm32l475-atk-pandora/board/board.h index ee516b50db..a1029a3e99 100644 --- a/bsp/stm32/stm32l475-atk-pandora/board/board.h +++ b/bsp/stm32/stm32l475-atk-pandora/board/board.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32l475-atk-pandora/board/ports/audio/drv_es8388.c b/bsp/stm32/stm32l475-atk-pandora/board/ports/audio/drv_es8388.c index fe115eb593..5d9844c6bd 100644 --- a/bsp/stm32/stm32l475-atk-pandora/board/ports/audio/drv_es8388.c +++ b/bsp/stm32/stm32l475-atk-pandora/board/ports/audio/drv_es8388.c @@ -1,6 +1,6 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team - * + * Copyright (c) 2006-2021, RT-Thread Development Team + * * SPDX-License-Identifier: Apache-2.0 * * Date Author Notes diff --git a/bsp/stm32/stm32l475-atk-pandora/board/ports/audio/drv_es8388.h b/bsp/stm32/stm32l475-atk-pandora/board/ports/audio/drv_es8388.h index 472c844fca..ac758960f8 100644 --- a/bsp/stm32/stm32l475-atk-pandora/board/ports/audio/drv_es8388.h +++ b/bsp/stm32/stm32l475-atk-pandora/board/ports/audio/drv_es8388.h @@ -1,6 +1,6 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team - * + * Copyright (c) 2006-2021, RT-Thread Development Team + * * SPDX-License-Identifier: Apache-2.0 * * Date Author Notes diff --git a/bsp/stm32/stm32l475-atk-pandora/board/ports/audio/drv_mic.c b/bsp/stm32/stm32l475-atk-pandora/board/ports/audio/drv_mic.c index c4ea570dd7..ac604875f0 100644 --- a/bsp/stm32/stm32l475-atk-pandora/board/ports/audio/drv_mic.c +++ b/bsp/stm32/stm32l475-atk-pandora/board/ports/audio/drv_mic.c @@ -1,6 +1,6 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team - * + * Copyright (c) 2006-2021, RT-Thread Development Team + * * SPDX-License-Identifier: Apache-2.0 * * Date Author Notes diff --git a/bsp/stm32/stm32l475-atk-pandora/board/ports/audio/drv_sound.c b/bsp/stm32/stm32l475-atk-pandora/board/ports/audio/drv_sound.c index bccf9c62db..b19d584d3d 100644 --- a/bsp/stm32/stm32l475-atk-pandora/board/ports/audio/drv_sound.c +++ b/bsp/stm32/stm32l475-atk-pandora/board/ports/audio/drv_sound.c @@ -1,6 +1,6 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team - * + * Copyright (c) 2006-2021, RT-Thread Development Team + * * SPDX-License-Identifier: Apache-2.0 * * Date Author Notes diff --git a/bsp/stm32/stm32l475-atk-pandora/board/ports/audio/drv_sound.h b/bsp/stm32/stm32l475-atk-pandora/board/ports/audio/drv_sound.h index 4dc76631c7..d573b0dee5 100644 --- a/bsp/stm32/stm32l475-atk-pandora/board/ports/audio/drv_sound.h +++ b/bsp/stm32/stm32l475-atk-pandora/board/ports/audio/drv_sound.h @@ -1,6 +1,6 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team - * + * Copyright (c) 2006-2021, RT-Thread Development Team + * * SPDX-License-Identifier: Apache-2.0 * * Date Author Notes diff --git a/bsp/stm32/stm32l475-atk-pandora/board/ports/drv_lcd.c b/bsp/stm32/stm32l475-atk-pandora/board/ports/drv_lcd.c index 65bdcd85f9..f80ca3a4b2 100644 --- a/bsp/stm32/stm32l475-atk-pandora/board/ports/drv_lcd.c +++ b/bsp/stm32/stm32l475-atk-pandora/board/ports/drv_lcd.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -955,7 +955,7 @@ rt_err_t lcd_show_qrcode(rt_uint16_t x, rt_uint16_t y, rt_uint8_t version, rt_ui { enlargement_factor = enlargement; } - + /* malloc memory for quick display of qrcode */ qrcode_buf = rt_malloc(qrcode.size * 2 * enlargement_factor * enlargement_factor); if (qrcode_buf == RT_NULL) diff --git a/bsp/stm32/stm32l475-atk-pandora/board/ports/drv_lcd.h b/bsp/stm32/stm32l475-atk-pandora/board/ports/drv_lcd.h index ca4c28595f..394305012e 100644 --- a/bsp/stm32/stm32l475-atk-pandora/board/ports/drv_lcd.h +++ b/bsp/stm32/stm32l475-atk-pandora/board/ports/drv_lcd.h @@ -1,12 +1,12 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * * Change Logs: * Date Author Notes * 2018-08-14 flybreak the first version - * 2018-09-18 balanceTWK add sleep mode function + * 2018-09-18 balanceTWK add sleep mode function */ #ifndef __DRV_LCD_H__ diff --git a/bsp/stm32/stm32l475-atk-pandora/board/ports/drv_qspi_flash.c b/bsp/stm32/stm32l475-atk-pandora/board/ports/drv_qspi_flash.c index aef2226239..f866d2741c 100644 --- a/bsp/stm32/stm32l475-atk-pandora/board/ports/drv_qspi_flash.c +++ b/bsp/stm32/stm32l475-atk-pandora/board/ports/drv_qspi_flash.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -7,7 +7,7 @@ * Date Author Notes * 2018-11-27 zylx first version */ - + #include <board.h> #include <drv_qspi.h> #include <rtdevice.h> @@ -63,7 +63,7 @@ void w25qxx_enter_qspi_mode(struct rt_qspi_device *device) static int rt_hw_qspi_flash_with_sfud_init(void) { stm32_qspi_bus_attach_device("qspi1", "qspi10", RT_NULL, 4, w25qxx_enter_qspi_mode, RT_NULL); - + /* init w25q128 */ if (RT_NULL == rt_sfud_flash_probe("W25Q128", "qspi10")) { diff --git a/bsp/stm32/stm32l475-atk-pandora/board/ports/fal_cfg.h b/bsp/stm32/stm32l475-atk-pandora/board/ports/fal_cfg.h index a1575859ac..b96477b816 100644 --- a/bsp/stm32/stm32l475-atk-pandora/board/ports/fal_cfg.h +++ b/bsp/stm32/stm32l475-atk-pandora/board/ports/fal_cfg.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -24,15 +24,15 @@ extern struct fal_flash_dev nor_flash0; /* ========================= Device Configuration ========================== */ #ifdef BSP_USING_ON_CHIP_FLASH -#define ONCHIP_FLASH_DEV &stm32_onchip_flash, +#define ONCHIP_FLASH_DEV &stm32_onchip_flash, #else -#define ONCHIP_FLASH_DEV +#define ONCHIP_FLASH_DEV #endif /* BSP_USING_ON_CHIP_FLASH */ #ifdef BSP_USING_QSPI_FLASH -#define SPI_FLASH_DEV &nor_flash0, +#define SPI_FLASH_DEV &nor_flash0, #else -#define SPI_FLASH_DEV +#define SPI_FLASH_DEV #endif /* BSP_USING_QSPI_FLASH */ /* flash device table */ @@ -55,7 +55,7 @@ extern struct fal_flash_dev nor_flash0; #ifdef BSP_USING_QSPI_FLASH #define SPI_FLASH_PARTITION {FAL_PART_MAGIC_WROD, "filesystem", "W25Q128", 9 * 1024 * 1024, 16 * 1024 * 1024, 0}, #else -#define SPI_FLASH_PARTITION +#define SPI_FLASH_PARTITION #endif /* partition table */ diff --git a/bsp/stm32/stm32l475-atk-pandora/board/ports/sdcard_port.c b/bsp/stm32/stm32l475-atk-pandora/board/ports/sdcard_port.c index e1af109455..9db3ec01f1 100644 --- a/bsp/stm32/stm32l475-atk-pandora/board/ports/sdcard_port.c +++ b/bsp/stm32/stm32l475-atk-pandora/board/ports/sdcard_port.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32l475-atk-pandora/board/ports/sensor_port.c b/bsp/stm32/stm32l475-atk-pandora/board/ports/sensor_port.c index d253cc179e..fac1209a63 100644 --- a/bsp/stm32/stm32l475-atk-pandora/board/ports/sensor_port.c +++ b/bsp/stm32/stm32l475-atk-pandora/board/ports/sensor_port.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32l475-st-discovery/applications/main.c b/bsp/stm32/stm32l475-st-discovery/applications/main.c index 2c4ca35a6b..bddb8abe63 100644 --- a/bsp/stm32/stm32l475-st-discovery/applications/main.c +++ b/bsp/stm32/stm32l475-st-discovery/applications/main.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32l475-st-discovery/board/board.c b/bsp/stm32/stm32l475-st-discovery/board/board.c index bdd1307a91..cd2f9a5989 100644 --- a/bsp/stm32/stm32l475-st-discovery/board/board.c +++ b/bsp/stm32/stm32l475-st-discovery/board/board.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -16,7 +16,7 @@ void SystemClock_Config(void) RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; RCC_PeriphCLKInitTypeDef PeriphClkInit = {0}; - /** Initializes the CPU, AHB and APB busses clocks + /** Initializes the CPU, AHB and APB busses clocks */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; RCC_OscInitStruct.HSIState = RCC_HSI_ON; @@ -32,7 +32,7 @@ void SystemClock_Config(void) { Error_Handler(); } - /** Initializes the CPU, AHB and APB busses clocks + /** Initializes the CPU, AHB and APB busses clocks */ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; @@ -51,7 +51,7 @@ void SystemClock_Config(void) { Error_Handler(); } - /** Configure the main internal regulator output voltage + /** Configure the main internal regulator output voltage */ if (HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1) != HAL_OK) { diff --git a/bsp/stm32/stm32l475-st-discovery/board/board.h b/bsp/stm32/stm32l475-st-discovery/board/board.h index e49d71c68c..2b5f830eb9 100644 --- a/bsp/stm32/stm32l475-st-discovery/board/board.h +++ b/bsp/stm32/stm32l475-st-discovery/board/board.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32l476-st-nucleo/applications/main.c b/bsp/stm32/stm32l476-st-nucleo/applications/main.c index e92ed8da71..b22a8b8e8d 100644 --- a/bsp/stm32/stm32l476-st-nucleo/applications/main.c +++ b/bsp/stm32/stm32l476-st-nucleo/applications/main.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32l476-st-nucleo/board/board.c b/bsp/stm32/stm32l476-st-nucleo/board/board.c index 88600d4b4f..0d279e679a 100644 --- a/bsp/stm32/stm32l476-st-nucleo/board/board.c +++ b/bsp/stm32/stm32l476-st-nucleo/board/board.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2019, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32l476-st-nucleo/board/board.h b/bsp/stm32/stm32l476-st-nucleo/board/board.h index b59fe1b3b6..c0b6a905ff 100644 --- a/bsp/stm32/stm32l476-st-nucleo/board/board.h +++ b/bsp/stm32/stm32l476-st-nucleo/board/board.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32l496-ali-developer/applications/main.c b/bsp/stm32/stm32l496-ali-developer/applications/main.c index d4926deb07..86d1cf72dd 100644 --- a/bsp/stm32/stm32l496-ali-developer/applications/main.c +++ b/bsp/stm32/stm32l496-ali-developer/applications/main.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32l496-ali-developer/board/board.c b/bsp/stm32/stm32l496-ali-developer/board/board.c index 4ed0e24cb6..9622e73038 100644 --- a/bsp/stm32/stm32l496-ali-developer/board/board.c +++ b/bsp/stm32/stm32l496-ali-developer/board/board.c @@ -16,11 +16,11 @@ void SystemClock_Config(void) RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; RCC_PeriphCLKInitTypeDef PeriphClkInit = {0}; - /**Configure LSE Drive Capability + /**Configure LSE Drive Capability */ HAL_PWR_EnableBkUpAccess(); __HAL_RCC_LSEDRIVE_CONFIG(RCC_LSEDRIVE_LOW); - /**Initializes the CPU, AHB and APB busses clocks + /**Initializes the CPU, AHB and APB busses clocks */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSI|RCC_OSCILLATORTYPE_LSE |RCC_OSCILLATORTYPE_MSI; @@ -40,7 +40,7 @@ void SystemClock_Config(void) { Error_Handler(); } - /**Initializes the CPU, AHB and APB busses clocks + /**Initializes the CPU, AHB and APB busses clocks */ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; @@ -73,7 +73,7 @@ void SystemClock_Config(void) { Error_Handler(); } - /**Configure the main internal regulator output voltage + /**Configure the main internal regulator output voltage */ if (HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1) != HAL_OK) { diff --git a/bsp/stm32/stm32l496-ali-developer/board/board.h b/bsp/stm32/stm32l496-ali-developer/board/board.h index 78cc07314b..6d99022522 100644 --- a/bsp/stm32/stm32l496-ali-developer/board/board.h +++ b/bsp/stm32/stm32l496-ali-developer/board/board.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32l496-ali-developer/board/ports/drv_spi_lcd.c b/bsp/stm32/stm32l496-ali-developer/board/ports/drv_spi_lcd.c index e37a67f4a1..be6c2a5744 100644 --- a/bsp/stm32/stm32l496-ali-developer/board/ports/drv_spi_lcd.c +++ b/bsp/stm32/stm32l496-ali-developer/board/ports/drv_spi_lcd.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -7,7 +7,7 @@ * Date Author Notes * 2018-11-27 zylx first version */ - + #include <board.h> #include <drv_spi.h> #include <rtdevice.h> diff --git a/bsp/stm32/stm32l496-ali-developer/board/ports/fal_cfg.h b/bsp/stm32/stm32l496-ali-developer/board/ports/fal_cfg.h index d7a1db25e9..a0598e9d83 100644 --- a/bsp/stm32/stm32l496-ali-developer/board/ports/fal_cfg.h +++ b/bsp/stm32/stm32l496-ali-developer/board/ports/fal_cfg.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32l496-ali-developer/board/ports/sdcard_port.c b/bsp/stm32/stm32l496-ali-developer/board/ports/sdcard_port.c index 8a2c1cade7..6abc52c3ba 100644 --- a/bsp/stm32/stm32l496-ali-developer/board/ports/sdcard_port.c +++ b/bsp/stm32/stm32l496-ali-developer/board/ports/sdcard_port.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32l4r5-st-nucleo/applications/main.c b/bsp/stm32/stm32l4r5-st-nucleo/applications/main.c index df59d02ff9..2dbb2b2c81 100644 --- a/bsp/stm32/stm32l4r5-st-nucleo/applications/main.c +++ b/bsp/stm32/stm32l4r5-st-nucleo/applications/main.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -19,12 +19,12 @@ /* defined the LED3 pin: PB14 */ #define LED3_PIN GET_PIN(B, 14) -#define LED_RUN_PIN LED3_PIN +#define LED_RUN_PIN LED3_PIN int main(void) { int count = 1; - + rt_pin_mode(LED_RUN_PIN, PIN_MODE_OUTPUT); while (count++) diff --git a/bsp/stm32/stm32l4r5-st-nucleo/board/board.c b/bsp/stm32/stm32l4r5-st-nucleo/board/board.c index 7ab82ccd58..4b1fccdb4e 100644 --- a/bsp/stm32/stm32l4r5-st-nucleo/board/board.c +++ b/bsp/stm32/stm32l4r5-st-nucleo/board/board.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -16,13 +16,13 @@ void SystemClock_Config(void) RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; RCC_PeriphCLKInitTypeDef PeriphClkInit = {0}; - /** Configure the main internal regulator output voltage + /** Configure the main internal regulator output voltage */ if (HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1_BOOST) != HAL_OK) { Error_Handler(); } - /** Initializes the CPU, AHB and APB busses clocks + /** Initializes the CPU, AHB and APB busses clocks */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI; RCC_OscInitStruct.HSIState = RCC_HSI_ON; @@ -38,7 +38,7 @@ void SystemClock_Config(void) { Error_Handler(); } - /** Initializes the CPU, AHB and APB busses clocks + /** Initializes the CPU, AHB and APB busses clocks */ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; diff --git a/bsp/stm32/stm32l4r5-st-nucleo/board/board.h b/bsp/stm32/stm32l4r5-st-nucleo/board/board.h index 095f503423..b90222c6e3 100644 --- a/bsp/stm32/stm32l4r5-st-nucleo/board/board.h +++ b/bsp/stm32/stm32l4r5-st-nucleo/board/board.h @@ -1,12 +1,12 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * * Change Logs: * Date Author Notes * 2018-11-5 SummerGift first version - * 2019-04-09 jhb + * 2019-04-09 jhb */ #ifndef __BOARD_H__ diff --git a/bsp/stm32/stm32l4r9-st-eval/applications/main.c b/bsp/stm32/stm32l4r9-st-eval/applications/main.c index ee74c2edd2..c53f70fb97 100644 --- a/bsp/stm32/stm32l4r9-st-eval/applications/main.c +++ b/bsp/stm32/stm32l4r9-st-eval/applications/main.c @@ -1,12 +1,12 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * * Change Logs: * Date Author Notes * 2018-11-06 SummerGift first version - * 2019-04-09 jhb + * 2019-04-09 jhb */ #include <rtthread.h> diff --git a/bsp/stm32/stm32l4r9-st-eval/board/board.c b/bsp/stm32/stm32l4r9-st-eval/board/board.c index af69f12729..cf4231f00c 100644 --- a/bsp/stm32/stm32l4r9-st-eval/board/board.c +++ b/bsp/stm32/stm32l4r9-st-eval/board/board.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -16,13 +16,13 @@ void SystemClock_Config(void) RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; RCC_PeriphCLKInitTypeDef PeriphClkInit = {0}; - /**Configure the main internal regulator output voltage + /**Configure the main internal regulator output voltage */ if (HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1_BOOST) != HAL_OK) { Error_Handler(); } - /**Initializes the CPU, AHB and APB busses clocks + /**Initializes the CPU, AHB and APB busses clocks */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; RCC_OscInitStruct.HSEState = RCC_HSE_ON; @@ -37,7 +37,7 @@ void SystemClock_Config(void) { Error_Handler(); } - /**Initializes the CPU, AHB and APB busses clocks + /**Initializes the CPU, AHB and APB busses clocks */ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; @@ -63,5 +63,5 @@ void SystemClock_Config(void) if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) { Error_Handler(); - } + } } diff --git a/bsp/stm32/stm32l4r9-st-eval/board/board.h b/bsp/stm32/stm32l4r9-st-eval/board/board.h index f9f8adbcf8..7d85022bb4 100644 --- a/bsp/stm32/stm32l4r9-st-eval/board/board.h +++ b/bsp/stm32/stm32l4r9-st-eval/board/board.h @@ -1,12 +1,12 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * * Change Logs: * Date Author Notes * 2018-11-5 SummerGift first version - * 2019-04-09 jhb + * 2019-04-09 jhb */ #ifndef __BOARD_H__ diff --git a/bsp/stm32/stm32l4r9-st-eval/board/ports/drv_lcd_dsi.c b/bsp/stm32/stm32l4r9-st-eval/board/ports/drv_lcd_dsi.c index 8e926d7e2d..e00616eaac 100644 --- a/bsp/stm32/stm32l4r9-st-eval/board/ports/drv_lcd_dsi.c +++ b/bsp/stm32/stm32l4r9-st-eval/board/ports/drv_lcd_dsi.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -706,17 +706,17 @@ void line() lcd = (struct drv_lcd_dsi_device *)rt_device_find("lcd_dsi"); rt_uint8_t *ptr = lcd->lcd_info.framebuffer; - /* red */ - for (unsigned long long i = LCD_DSI_BUF_SIZE/4/2; i <LCD_DSI_BUF_SIZE/4/2+390; i++) - { - ptr[4 * i] = 0x00; - ptr[4 * i + 1] = 0x00; - ptr[4 * i + 2] = 0xFF; - ptr[4 * i + 3] = 0xFF; - } - rt_device_control(&lcd->parent, RTGRAPHIC_CTRL_RECT_UPDATE, RT_NULL); + /* red */ + for (unsigned long long i = LCD_DSI_BUF_SIZE/4/2; i <LCD_DSI_BUF_SIZE/4/2+390; i++) + { + ptr[4 * i] = 0x00; + ptr[4 * i + 1] = 0x00; + ptr[4 * i + 2] = 0xFF; + ptr[4 * i + 3] = 0xFF; + } + rt_device_control(&lcd->parent, RTGRAPHIC_CTRL_RECT_UPDATE, RT_NULL); + - } MSH_CMD_EXPORT(line, line); diff --git a/bsp/stm32/stm32l4r9-st-eval/board/ports/drv_sram.c b/bsp/stm32/stm32l4r9-st-eval/board/ports/drv_sram.c index f77fa05aee..416e6863a7 100644 --- a/bsp/stm32/stm32l4r9-st-eval/board/ports/drv_sram.c +++ b/bsp/stm32/stm32l4r9-st-eval/board/ports/drv_sram.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32l4r9-st-eval/board/ports/drv_touch.c b/bsp/stm32/stm32l4r9-st-eval/board/ports/drv_touch.c index 314b1d707f..dc24066f51 100644 --- a/bsp/stm32/stm32l4r9-st-eval/board/ports/drv_touch.c +++ b/bsp/stm32/stm32l4r9-st-eval/board/ports/drv_touch.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32l4r9-st-eval/board/ports/drv_touch_ft.c b/bsp/stm32/stm32l4r9-st-eval/board/ports/drv_touch_ft.c index 726be84e0d..0d3904444f 100644 --- a/bsp/stm32/stm32l4r9-st-eval/board/ports/drv_touch_ft.c +++ b/bsp/stm32/stm32l4r9-st-eval/board/ports/drv_touch_ft.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -119,7 +119,7 @@ static rt_err_t ft_read_point(touch_msg_t msg) { return RT_ERROR; } - + if (point_num == 0) { if (s_tp_down) @@ -131,7 +131,7 @@ static rt_err_t ft_read_point(touch_msg_t msg) msg->event = TOUCH_EVENT_NONE; return RT_ERROR; } - + ret = ft_read(ft_i2c_bus, 0x03, point, 6); if (ret < 0) { @@ -147,7 +147,7 @@ static rt_err_t ft_read_point(touch_msg_t msg) } msg->event = TOUCH_EVENT_DOWN; s_tp_down = 1; - + return RT_EOK; } diff --git a/bsp/stm32/stm32l4r9-st-eval/board/ports/include/drv_touch.h b/bsp/stm32/stm32l4r9-st-eval/board/ports/include/drv_touch.h index 0e0cfae502..b70dd3eb25 100644 --- a/bsp/stm32/stm32l4r9-st-eval/board/ports/include/drv_touch.h +++ b/bsp/stm32/stm32l4r9-st-eval/board/ports/include/drv_touch.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32l4r9-st-eval/board/ports/include/lcd_port_dsi.h b/bsp/stm32/stm32l4r9-st-eval/board/ports/include/lcd_port_dsi.h index fbc56b4a44..4d602fc344 100644 --- a/bsp/stm32/stm32l4r9-st-eval/board/ports/include/lcd_port_dsi.h +++ b/bsp/stm32/stm32l4r9-st-eval/board/ports/include/lcd_port_dsi.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * diff --git a/bsp/stm32/stm32l4r9-st-eval/board/ports/include/sram_port.h b/bsp/stm32/stm32l4r9-st-eval/board/ports/include/sram_port.h index a5d89f1d80..f02a735dc4 100644 --- a/bsp/stm32/stm32l4r9-st-eval/board/ports/include/sram_port.h +++ b/bsp/stm32/stm32l4r9-st-eval/board/ports/include/sram_port.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2018, RT-Thread Development Team + * Copyright (c) 2006-2021, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * |