rt-thread.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Collapse)	Author
2023-01-08	format Kconfig and sconscript	Meco Man

2022-01-05	add RT_USING_POSIX_STDIO	Meco Man

2021-11-24	对finsh_set_device调用增加宏定义限制	Meco Man

2021-04-09	[bsp]update GPL license to Apache-2.0, and format files	yangjie

2020-11-23	【优化】在代码中移除 rt_system_object_init/rt_system_tick_init ↵	guozhanxin
	的调用。
2013-10-20	rm48x50: add GCC support	Grissiom

2013-10-19	rm48x50: fix the prototype of finsh_system_init	Grissiom

2013-06-12	RM48 does not have cache implemented	Grissiom

2013-06-03	rm48x50: remove useless reg_test code	Grissiom

2013-05-31	rm48x50: turn on VFP support	Grissiom
	This support Common VFPv2 sub-architecture.
2013-05-30	rm48x50: remove unused vPortTaskUsesFPU	Grissiom

2013-05-29	rm48x50: add finsh support	Grissiom

2013-05-29	rm48x50: now it has console	Grissiom

2013-05-26	rm48x50: temperately disable the VFP register test	Grissiom

2013-05-26	rm48x50: add vRegTestTask2	Grissiom

2013-05-26	rm48x50: fix bug in reg_test from FreeRTOS	Grissiom
	It does not satisfy AAPCS.
2013-05-26	rm48x50: add reg_test from FreeRTOS	Grissiom
	The code is GPLv2 so I think we could use it for free(both free beer and free speech).
2013-05-24	add rm48x50 bsp and libcpu	Grissiom
	We currently only support building with CCS and SCons is not using. bsp/rm48x50/HALCoGen/HALCoGen.{hcg,dil} is the HALCoGen project file. You may need to regenerate the source file as you like, providing that: 1, IRQ is in Dispatch Mode and the table entry is IRQ_Handler. The channel 5 in enabled and connected to IRQ. 2, RTI driver is enabled and compare3 source is selected to counter1 and the compare3 will generate tick in the period of 10ms. This value is coresponding with RT_TICK_PER_SECOND in rtconfig.h. In CCS, you need to create a new CCS project and create link folders pointing at bsp/rm48x50, libcpu/arm/rm48x50 and src/, include/. Remember to add the include path to the Build Properties.