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* [libcpu][risc-v] Refactor the RISC-V architecture port
Introduce an opt-in unified RISC-V common layer for RV32 and RV64 while keeping existing BSPs on the legacy implementation during migration.
- use ARCH_RISCV and ARCH_CPU_64BIT for architecture and XLEN selection
- unify context, trap, MMU, cache, timer, SBI, SMP and ISA handling
- add PLIC, CLIC, ACLINT, APLIC and IMSIC support
- map physical hart IDs to contiguous logical CPU IDs
- add T-Head vendor overrides while preserving legacy ports
- migrate qemu-virt64-riscv with RV32 and RV64 support
- update clock_time, MM, LWP, OFW, PCI and Rust integration
Existing BSPs continue using legacy_common or common64 unless they select RT_USING_RISCV_NEW_COMMON.
Signed-off-by: GuEe-GUI <[email protected]>
* [libcpu][risc-v] skip disabled CPU nodes in early FDT walk
Rbb666 noted that rt_hw_fdt_install_early() walked every /cpus child
without checking status, so disabled cores still joined hart registration
and MMU capability probing. Skip nodes that are not okay/ok via
rt_fdt_device_is_available() before reading reg or mmu-type.
Signed-off-by: seteiro <[email protected]>
* [libcpu][risc-v] Fix per-CPU page table mapping
- reuse existing non-leaf page table entries when mapping per-CPU areas
- reject leaf entry conflicts instead of overwriting mappings
Signed-off-by: GuEe-GUI <[email protected]>
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Signed-off-by: GuEe-GUI <[email protected]>
Signed-off-by: seteiro <[email protected]>
Co-authored-by: seteiro <[email protected]>
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- Implement _noncache() and _cache() function features;
- Correct rt_hw_mmu_setup function for NORMAL_NOCACHE_MEM type property configuration;
- Update C908/C906 PTE macro definition configuration;
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* [components][clock_time] Refactor time subsystem around clock_time
Introduce the clock_time core with clock source/event separation, high-resolution scheduling, and boot-time helpers, plus clock_timer adapters for timer peripherals.
Remove legacy ktime/cputime/hwtimer implementations and migrate arch and BSP time paths to the new subsystem while keeping POSIX time integration functional.
Update drivers, Kconfig/SConscript wiring, documentation, and tests; add clock_time overview docs and align naming to clock_boottime/clock_hrtimer/clock_timer.
* [components][clock_time] Use BSP-provided clock timer frequency on riscv64
* [risc-v] Use runtime clock timer frequency for tick and delays
* [bsp] Add clock timer frequency hooks for riscv64 boards
* [bsp] Update Renesas RA driver doc clock_timer link
* [bsp] Sync zynqmp-r5-axu4ev rtconfig after config refresh
* [bsp][rk3500] Update rk3500 clock configuration
* [bsp][hpmicro] Add rt_hw_us_delay hook and update board delays
* [bsp][stm32l496-st-nucleo] enable clock_time for hwtimer sample in ci
* [bsp][hpmicro] Fix rtconfig include scope for hpm6750evk
Move rtconfig.h include outside the ENET_MULTIPLE_PORT guard for hpm6750evk and hpm6750evk2 so configuration macros are available regardless of ENET settings.
* [bsp][raspi3] select clock time for systimer
* [bsp][hpm5300evk] Trim trailing blank line
* [bsp][hpm5301evklite] Trim trailing blank line
* [bsp][hpm5e00evk] Trim trailing blank line
* [bsp][hpm6200evk] Trim trailing blank line
* [bsp][hpm6300evk] Trim trailing blank line
* [bsp][hpm6750evk] Trim trailing blank line
* [bsp][hpm6750evk2] Trim trailing blank line
* [bsp][hpm6750evkmini] Trim trailing blank line
* [bsp][hpm6800evk] Trim trailing blank line
* [bsp][hpm6e00evk] Trim trailing blank line
* [bsp][nxp] switch lpc178x to gcc and remove mcx timer source
* [bsp][stm32] fix the CONFIG_RT_USING_CLOCK_TIME issue.
* [docs][clock_time] add clock time documentation
* [docs][clock_time] Update clock time subsystem documentation
- Update device driver index to use correct page reference
- Clarify upper layer responsibilities in architecture overview
- Update README to describe POSIX/libc, Soft RTC, and device driver usage
- Refine architecture diagram with improved layout and color scheme
- Remove obsolete clock_timer.md file
* [kernel][utest] Trim trailing space
* [clock_time] Fix hrtimer wrap handling
* [clock_time] fix the static rt_inline issue
* [clock_time] fix the rt_clock_hrtimer_control result issue
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definition with RT_USING_DM (#11100)
* Initial plan
* [risc-v][common64] Make rt_hw_cpu_shutdown weak to fix multiple definition error
Co-authored-by: BernardXiong <[email protected]>
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Co-authored-by: copilot-swe-agent[bot] <[email protected]>
Co-authored-by: BernardXiong <[email protected]>
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1.Add the necessary function declarations for SMP enablement and implement the corresponding
functionalities, including rt_hw_secondary_cpu_up, secondary_cpu_entry, rt_hw_local_irq_disable,
rt_hw_local_irq_enable, rt_hw_secondary_cpu_idle_exec, rt_hw_spin_lock_init, rt_hw_spin_lock,
rt_hw_spin_unlock, rt_hw_ipi_send, rt_hw_interrupt_set_priority, rt_hw_interrupt_get_priority,
rt_hw_ipi_init, rt_hw_ipi_handler_install, and rt_hw_ipi_handler.
2.In the two functions (rt_hw_context_switch_to and rt_hw_context_switch) in context_gcc.S,
add a call to rt_cpus_lock_status_restore to update the scheduler information.
3.If the MMU is enabled, use the .percpu section and record different hartids by configuring
special page tables; if the MMU is not enabled, record them directly in the satp register.
Additionally, add dynamic startup based on core configuration.The .percpu section is only used
when both ARCH_MM_MMU and RT_USING_SMP are enabled. However, there is a certain amount of space
waste since no macro guard is added for it in the link script currently.
4.The physical memory of QEMU started in CI is 128MB, so RT_HW_PAGE_END is modified from the
original +256MB to +128MB. Modify the SConscript file under the common64 directory to include
common/atomic_riscv.c in the compilation process.
Signed-off-by: Mengchen Teng <[email protected]>
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memory access
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is located
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libcpu/risc-v/common64/mmu.c uses the external
symbol "__bss_end" (this symbol generally is
defined in the link script file) and depends
on the extern declaration of this symbol in
the bsp's "board.h". This is not a problem in
implementation, but it is not a good habit.
If this extern symbol is used locally, just
declare it locally should be better.
In this way, there will be no dependency of
the kernel core on the bsp header file. And
there will be no special requirements for the
bsp board code, such as the need to make
extern declarations for these "__bss_end"
symbols in "board.h".
This patch currently only explicitly externly
declares "__bss_end" inside libcpu itself.
The code of "#include <board.h>" is kept, because
the modification involved is too large, it is
necessary to clean up the bsp involved before
cleaning this include code line uniformly.
Signed-off-by: Chen Wang <[email protected]>
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* libcpu: cleanup undefined rt_hw_mmu_kernel_map_init
rt_hw_mmu_kernel_map_init() is declared in header files but
no definition found, cleanup the code.
Signed-off-by: Chen Wang <[email protected]>
* bsp: allwinner: d1: remove calling of rt_hw_mmu_kernel_map_init
rt_hw_mmu_kernel_map_init is an undefined function, calling it
is meaningless.
Signed-off-by: Chen Wang <[email protected]>
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Signed-off-by: Chen Wang <[email protected]>
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Signed-off-by: ligr <[email protected]>
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description: Using the vector instruction set to trigger
an illegal instruction exception when ARCH_SISCV_VECTOR=y.
analysis: When initializing the thread stack,
the rt_cw_stack_init function did not enable VS for SSTATUS.
Solution: When ARCH_SISCV_VECTOR=y,
increment the initial value of sstatus by 0x600(SSTATUS_VS).
Signed-off-by: Liu Gui <[email protected]>
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RISCV_S_MODE configuration only affects the code in
libcpu/risc-v/virt64, and the only bsp using this
libcpu is qemu-virt64-riscv.
Considering s-mode is the default mode RT-Thread
running on virt64 machine, it seems unnecessary to
make RISCV_S_MODE a Kconfig option.
Solution: Remove RISCV_S_MODE from Kconfig and define
it as a macro in the code in libcpu/risc-v/virt64.
Plus, due to this macro is only related to virt64, rename
RISCV_S_MODE to RISCV_VIRT64_S_MODE.
Update the .config/rtconfig.h in this patch.
Signed-off-by: Chen Wang <[email protected]>
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[libcpu]添加对riscv vector的支持
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* (fix) mmu: satp value should be 64-bit
Corrected the SATP register to ensure it uses the correct 64-bit format as required by the system architecture.
* use __asm__ instead of asm for the GNU C compiler
Co-authored-by: Shell <[email protected]>
---------
Co-authored-by: Shell <[email protected]>
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cpu is in exception (#9516)
Remove redundant '0x' from printed output
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Changes:
- create new folder name `common64` and save all common codes of rv64
inside
Signed-off-by: Shell <[email protected]>
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