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| author | Frédéric Desbiens <[email protected]> | 2026-03-06 19:27:49 +0100 |
|---|---|---|
| committer | GitHub <[email protected]> | 2026-03-06 19:27:49 +0100 |
| commit | 3726d7906b4808bfec7855fc088e073199df9120 (patch) | |
| tree | 8789bfd03d1d49e1967e80d04aa4ff606fda43eb /ports/arm11/gnu/src/tx_thread_context_save.S | |
| parent | 4b6e8100d932a3a67b34c6eb17f84f3bffb9e2ae (diff) | |
| parent | c3259a216026372e3833dd8996a68f77e8595fbd (diff) | |
Merge pull request #510 from eclipse-threadx/devv6.5.0.202601_rel
Merge changes ahead of the v6.5.0.202601 release
Diffstat (limited to 'ports/arm11/gnu/src/tx_thread_context_save.S')
| -rw-r--r-- | ports/arm11/gnu/src/tx_thread_context_save.S | 85 |
1 files changed, 38 insertions, 47 deletions
diff --git a/ports/arm11/gnu/src/tx_thread_context_save.S b/ports/arm11/gnu/src/tx_thread_context_save.S index 3fe539d2..c8d7e503 100644 --- a/ports/arm11/gnu/src/tx_thread_context_save.S +++ b/ports/arm11/gnu/src/tx_thread_context_save.S @@ -1,18 +1,18 @@ @/*************************************************************************** -@ * Copyright (c) 2024 Microsoft Corporation -@ * +@ * Copyright (c) 2024 Microsoft Corporation +@ * @ * This program and the accompanying materials are made available under the @ * terms of the MIT License which is available at @ * https://opensource.org/licenses/MIT. -@ * +@ * @ * SPDX-License-Identifier: MIT @ **************************************************************************/ @ @ @/**************************************************************************/ @/**************************************************************************/ -@/** */ -@/** ThreadX Component */ +@/** */ +@/** ThreadX Component */ @/** */ @/** Thread */ @/** */ @@ -36,50 +36,41 @@ DISABLE_INTS = 0x80 @ IRQ interrupts disabled @ @/* No 16-bit Thumb mode veneer code is needed for _tx_thread_context_save @ since it will never be called 16-bit mode. */ -@ +@ .arm .text .align 2 -@/**************************************************************************/ -@/* */ -@/* FUNCTION RELEASE */ -@/* */ -@/* _tx_thread_context_save ARM11/GNU */ +@/**************************************************************************/ +@/* */ +@/* FUNCTION RELEASE */ +@/* */ +@/* _tx_thread_context_save ARM11/GNU */ @/* 6.2.1 */ @/* AUTHOR */ @/* */ @/* William E. Lamie, Microsoft Corporation */ @/* */ @/* DESCRIPTION */ -@/* */ -@/* This function saves the context of an executing thread in the */ -@/* beginning of interrupt processing. The function also ensures that */ -@/* the system stack is used upon return to the calling ISR. */ -@/* */ -@/* INPUT */ -@/* */ -@/* None */ -@/* */ -@/* OUTPUT */ -@/* */ -@/* None */ -@/* */ -@/* CALLS */ -@/* */ -@/* None */ -@/* */ -@/* CALLED BY */ -@/* */ -@/* ISRs */ -@/* */ -@/* RELEASE HISTORY */ -@/* */ -@/* DATE NAME DESCRIPTION */ @/* */ -@/* 09-30-2020 William E. Lamie Initial Version 6.1 */ -@/* 03-08-2023 Cindy Deng Modified comment(s), added */ -@/* #include tx_user.h, */ -@/* resulting in version 6.2.1 */ +@/* This function saves the context of an executing thread in the */ +@/* beginning of interrupt processing. The function also ensures that */ +@/* the system stack is used upon return to the calling ISR. */ +@/* */ +@/* INPUT */ +@/* */ +@/* None */ +@/* */ +@/* OUTPUT */ +@/* */ +@/* None */ +@/* */ +@/* CALLS */ +@/* */ +@/* None */ +@/* */ +@/* CALLED BY */ +@/* */ +@/* ISRs */ @/* */ @/**************************************************************************/ @VOID _tx_thread_context_save(VOID) @@ -95,7 +86,7 @@ _tx_thread_context_save: @ if (_tx_thread_system_state++) @ { @ - STMDB sp!, {r0-r3} @ Save some working registers + STMDB sp!, {r0-r3} @ Save some working registers #ifdef TX_ENABLE_FIQ_SUPPORT MRS r0, CPSR @ Pickup the CPSR ORR r0, r0, #DISABLE_INTS @ Build disable interrupt CPSR @@ -115,7 +106,7 @@ _tx_thread_context_save: @ calling ISR. */ @ MRS r0, SPSR @ Pickup saved SPSR - SUB lr, lr, #4 @ Adjust point of interrupt + SUB lr, lr, #4 @ Adjust point of interrupt STMDB sp!, {r0, r10, r12, lr} @ Store other registers @ @ /* Return to the ISR. */ @@ -131,7 +122,7 @@ _tx_thread_context_save: POP {lr} @ Recover ISR lr #endif - B __tx_irq_processing_return @ Continue IRQ processing + B __tx_irq_processing_return @ Continue IRQ processing @ __tx_thread_not_nested_save: @ } @@ -145,13 +136,13 @@ __tx_thread_not_nested_save: LDR r1, =_tx_thread_current_ptr @ Pickup address of current thread ptr LDR r0, [r1] @ Pickup current thread pointer CMP r0, #0 @ Is it NULL? - BEQ __tx_thread_idle_system_save @ If so, interrupt occurred in + BEQ __tx_thread_idle_system_save @ If so, interrupt occurred in @ scheduling loop - nothing needs saving! @ @ /* Save minimal context of interrupted thread. */ @ MRS r2, SPSR @ Pickup saved SPSR - SUB lr, lr, #4 @ Adjust point of interrupt + SUB lr, lr, #4 @ Adjust point of interrupt STMDB sp!, {r2, r10, r12, lr} @ Store other registers @ @ /* Save the current stack pointer in the thread's control block. */ @@ -171,7 +162,7 @@ __tx_thread_not_nested_save: POP {lr} @ Recover ISR lr #endif - B __tx_irq_processing_return @ Continue IRQ processing + B __tx_irq_processing_return @ Continue IRQ processing @ @ } @ else @@ -181,7 +172,7 @@ __tx_thread_idle_system_save: @ @ /* Interrupt occurred in the scheduling loop. */ @ -@ /* Not much to do here, just adjust the stack pointer, and return to IRQ +@ /* Not much to do here, just adjust the stack pointer, and return to IRQ @ processing. */ @ MOV r10, #0 @ Clear stack limit @@ -196,7 +187,7 @@ __tx_thread_idle_system_save: #endif ADD sp, sp, #16 @ Recover saved registers - B __tx_irq_processing_return @ Continue IRQ processing + B __tx_irq_processing_return @ Continue IRQ processing @ @ } @} |