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authorYuxin Zhou <[email protected]>2022-07-26 02:04:40 +0000
committerYuxin Zhou <[email protected]>2022-07-26 02:04:40 +0000
commit8c3c08f10826c4d5332a6d8e2fdf014b793a456a (patch)
treec6c2528d7901b11ec5173bdd0bc38339ab18288f /ports/cortex_m3/keil
parent54cda6ee9e68cd9701d759df13e3f6e41429b9bc (diff)
Release 6.1.12v6.1.12_rel
Diffstat (limited to 'ports/cortex_m3/keil')
-rw-r--r--ports/cortex_m3/keil/example_build/ThreadX_Demo.uvopt2
-rw-r--r--ports/cortex_m3/keil/example_build/ThreadX_Demo.uvproj15
-rw-r--r--ports/cortex_m3/keil/example_build/ThreadX_Library.uvopt2
-rw-r--r--ports/cortex_m3/keil/example_build/ThreadX_Library.uvproj15
-rw-r--r--ports/cortex_m3/keil/inc/tx_port.h13
5 files changed, 13 insertions, 34 deletions
diff --git a/ports/cortex_m3/keil/example_build/ThreadX_Demo.uvopt b/ports/cortex_m3/keil/example_build/ThreadX_Demo.uvopt
index 5fcedc85..70384682 100644
--- a/ports/cortex_m3/keil/example_build/ThreadX_Demo.uvopt
+++ b/ports/cortex_m3/keil/example_build/ThreadX_Demo.uvopt
@@ -10,7 +10,7 @@
<aExt>*.s*; *.src; *.a*</aExt>
<oExt>*.obj</oExt>
<lExt>*.lib</lExt>
- <tExt>*.txt; *.h; *.inc</tExt>
+ <tExt>*.txt; *.h; *.inc; *.md</tExt>
<pExt>*.plm</pExt>
<CppX>*.cpp</CppX>
<nMigrate>0</nMigrate>
diff --git a/ports/cortex_m3/keil/example_build/ThreadX_Demo.uvproj b/ports/cortex_m3/keil/example_build/ThreadX_Demo.uvproj
index 1d887f06..1700c5e1 100644
--- a/ports/cortex_m3/keil/example_build/ThreadX_Demo.uvproj
+++ b/ports/cortex_m3/keil/example_build/ThreadX_Demo.uvproj
@@ -555,19 +555,4 @@
</Target>
</Targets>
- <LayerInfo>
- <Layers>
- <Layer>
- <LayName>&lt;Project Info&gt;</LayName>
- <LayDesc></LayDesc>
- <LayUrl></LayUrl>
- <LayKeys></LayKeys>
- <LayCat></LayCat>
- <LayLic></LayLic>
- <LayTarg>0</LayTarg>
- <LayPrjMark>1</LayPrjMark>
- </Layer>
- </Layers>
- </LayerInfo>
-
</Project>
diff --git a/ports/cortex_m3/keil/example_build/ThreadX_Library.uvopt b/ports/cortex_m3/keil/example_build/ThreadX_Library.uvopt
index ac554f54..f8594618 100644
--- a/ports/cortex_m3/keil/example_build/ThreadX_Library.uvopt
+++ b/ports/cortex_m3/keil/example_build/ThreadX_Library.uvopt
@@ -10,7 +10,7 @@
<aExt>*.s*; *.src; *.a*</aExt>
<oExt>*.obj; *.o</oExt>
<lExt>*.lib</lExt>
- <tExt>*.txt; *.h; *.inc</tExt>
+ <tExt>*.txt; *.h; *.inc; *.md</tExt>
<pExt>*.plm</pExt>
<CppX>*.cpp</CppX>
<nMigrate>0</nMigrate>
diff --git a/ports/cortex_m3/keil/example_build/ThreadX_Library.uvproj b/ports/cortex_m3/keil/example_build/ThreadX_Library.uvproj
index 560ac208..39e74b01 100644
--- a/ports/cortex_m3/keil/example_build/ThreadX_Library.uvproj
+++ b/ports/cortex_m3/keil/example_build/ThreadX_Library.uvproj
@@ -1532,19 +1532,4 @@
</Target>
</Targets>
- <LayerInfo>
- <Layers>
- <Layer>
- <LayName>&lt;Project Info&gt;</LayName>
- <LayDesc></LayDesc>
- <LayUrl></LayUrl>
- <LayKeys></LayKeys>
- <LayCat></LayCat>
- <LayLic></LayLic>
- <LayTarg>0</LayTarg>
- <LayPrjMark>1</LayPrjMark>
- </Layer>
- </Layers>
- </LayerInfo>
-
</Project>
diff --git a/ports/cortex_m3/keil/inc/tx_port.h b/ports/cortex_m3/keil/inc/tx_port.h
index d12b1ad9..59a1b36c 100644
--- a/ports/cortex_m3/keil/inc/tx_port.h
+++ b/ports/cortex_m3/keil/inc/tx_port.h
@@ -26,7 +26,7 @@
/* PORT SPECIFIC C INFORMATION RELEASE */
/* */
/* tx_port.h Cortex-M3/Keil */
-/* 6.1.11 */
+/* 6.1.12 */
/* */
/* AUTHOR */
/* */
@@ -59,6 +59,9 @@
/* 04-25-2022 Scott Larson Modified comments and added */
/* volatile to registers, */
/* resulting in version 6.1.11 */
+/* 07-29-2022 Scott Larson Modified comments and */
+/* described BASEPRI usage, */
+/* resulting in version 6.1.12 */
/* */
/**************************************************************************/
@@ -146,6 +149,12 @@ typedef unsigned short USHORT;
#define TX_TIMER_THREAD_PRIORITY 0 /* Default timer thread priority */
#endif
+/* By default, ThreadX for Cortex-M uses the PRIMASK register to enable/disable interrupts.
+If using BASEPRI is desired, define the following two symbols for both c and assembly files:
+TX_PORT_USE_BASEPRI - This tells ThreadX to use BASEPRI instead of PRIMASK.
+TX_PORT_BASEPRI = (priority_mask << (8 - number_priority_bits)) - this defines the maximum priority level to mask.
+Any interrupt with a higher priority than priority_mask will not be masked, thus the interrupt will run.
+*/
/* Define various constants for the ThreadX Cortex-M port. */
@@ -707,7 +716,7 @@ void tx_thread_fpu_disable(void);
#ifdef TX_THREAD_INIT
CHAR _tx_version_id[] =
- "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M3/Keil Version 6.1.11 *";
+ "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M3/Keil Version 6.1.12 *";
#else
#ifdef TX_MISRA_ENABLE
extern CHAR _tx_version_id[100];