diff options
| author | Yuxin Zhou <[email protected]> | 2022-07-26 02:04:40 +0000 |
|---|---|---|
| committer | Yuxin Zhou <[email protected]> | 2022-07-26 02:04:40 +0000 |
| commit | 8c3c08f10826c4d5332a6d8e2fdf014b793a456a (patch) | |
| tree | c6c2528d7901b11ec5173bdd0bc38339ab18288f /ports/cortex_m7/gnu | |
| parent | 54cda6ee9e68cd9701d759df13e3f6e41429b9bc (diff) | |
Release 6.1.12v6.1.12_rel
Diffstat (limited to 'ports/cortex_m7/gnu')
| -rw-r--r-- | ports/cortex_m7/gnu/example_build/build_threadx.bat | 387 | ||||
| -rw-r--r-- | ports/cortex_m7/gnu/example_build/build_threadx_sample.bat | 12 | ||||
| -rw-r--r-- | ports/cortex_m7/gnu/example_build/cortexm7_crt0.S (renamed from ports/cortex_m7/gnu/example_build/cortexm7_crt0.s) | 42 | ||||
| -rw-r--r-- | ports/cortex_m7/gnu/example_build/cortexm7_vectors.S (renamed from ports/cortex_m7/gnu/example_build/tx_simulator_startup.s) | 15 | ||||
| -rw-r--r-- | ports/cortex_m7/gnu/example_build/sample_threadx.ld | 267 | ||||
| -rw-r--r-- | ports/cortex_m7/gnu/example_build/tx_initialize_low_level.S | 299 | ||||
| -rw-r--r-- | ports/cortex_m7/gnu/inc/tx_port.h | 13 | ||||
| -rw-r--r-- | ports/cortex_m7/gnu/src/tx_misra.S | 504 |
8 files changed, 541 insertions, 998 deletions
diff --git a/ports/cortex_m7/gnu/example_build/build_threadx.bat b/ports/cortex_m7/gnu/example_build/build_threadx.bat index f0c995e7..3d92efd3 100644 --- a/ports/cortex_m7/gnu/example_build/build_threadx.bat +++ b/ports/cortex_m7/gnu/example_build/build_threadx.bat @@ -1,199 +1,198 @@ del tx.a -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb tx_initialize_low_level.S -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb ../src/tx_thread_stack_build.S -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb ../src/tx_thread_schedule.S -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb ../src/tx_thread_system_return.S -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb ../src/tx_thread_context_save.S -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb ../src/tx_thread_context_restore.S -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb ../src/tx_thread_interrupt_control.S -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb ../src/tx_timer_interrupt.S -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb ../src/tx_thread_interrupt_control.S -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_block_allocate.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_block_pool_cleanup.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_block_pool_create.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_block_pool_delete.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_block_pool_info_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_block_pool_initialize.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_block_pool_performance_info_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_block_pool_performance_system_info_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_block_pool_prioritize.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_block_release.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_allocate.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_pool_cleanup.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_pool_create.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_pool_delete.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_pool_info_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_pool_initialize.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_pool_performance_info_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_pool_performance_system_info_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_pool_prioritize.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_pool_search.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_byte_release.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_event_flags_cleanup.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_event_flags_create.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_event_flags_delete.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_event_flags_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_event_flags_info_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_event_flags_initialize.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_event_flags_performance_info_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_event_flags_performance_system_info_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_event_flags_set.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_event_flags_set_notify.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_initialize_high_level.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_initialize_kernel_enter.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_initialize_kernel_setup.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_mutex_cleanup.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_mutex_create.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_mutex_delete.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_mutex_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_mutex_info_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_mutex_initialize.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_mutex_performance_info_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_mutex_performance_system_info_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_mutex_prioritize.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_mutex_priority_change.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_mutex_put.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_cleanup.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_create.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_delete.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_flush.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_front_send.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_info_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_initialize.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_performance_info_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_performance_system_info_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_prioritize.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_receive.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_send.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_queue_send_notify.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_semaphore_ceiling_put.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_semaphore_cleanup.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_semaphore_create.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_semaphore_delete.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_semaphore_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_semaphore_info_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_semaphore_initialize.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_semaphore_performance_info_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_semaphore_performance_system_info_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_semaphore_prioritize.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_semaphore_put.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_semaphore_put_notify.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_create.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_delete.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_entry_exit_notify.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_identify.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_info_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_initialize.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_performance_info_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_performance_system_info_get.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_preemption_change.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_priority_change.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_relinquish.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_reset.c -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc 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../../../../common/src/tx_thread_delete.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_entry_exit_notify.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_identify.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_info_get.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_initialize.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/tx_thread_performance_info_get.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc 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+arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_queue_front_send.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_queue_info_get.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_queue_prioritize.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_queue_receive.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_queue_send.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_queue_send_notify.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_semaphore_ceiling_put.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_semaphore_create.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_semaphore_delete.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_semaphore_get.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_semaphore_info_get.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_semaphore_prioritize.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_semaphore_put.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_semaphore_put_notify.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_create.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_delete.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_entry_exit_notify.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_info_get.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_preemption_change.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_priority_change.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_relinquish.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_reset.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_resume.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_suspend.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_terminate.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_time_slice_change.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_thread_wait_abort.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_timer_activate.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_timer_change.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_timer_create.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_timer_deactivate.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_timer_delete.c +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc ../../../../common/src/txe_timer_info_get.c + arm-none-eabi-ar -r tx.a tx_thread_stack_build.o tx_thread_schedule.o tx_thread_system_return.o tx_thread_context_save.o tx_thread_context_restore.o tx_timer_interrupt.o tx_thread_interrupt_control.o -arm-none-eabi-ar -r tx.a tx_thread_interrupt_control.o tx_initialize_low_level.o arm-none-eabi-ar -r tx.a tx_block_allocate.o tx_block_pool_cleanup.o tx_block_pool_create.o tx_block_pool_delete.o tx_block_pool_info_get.o arm-none-eabi-ar -r tx.a tx_block_pool_initialize.o tx_block_pool_performance_info_get.o tx_block_pool_performance_system_info_get.o tx_block_pool_prioritize.o arm-none-eabi-ar -r tx.a tx_block_release.o tx_byte_allocate.o tx_byte_pool_cleanup.o tx_byte_pool_create.o tx_byte_pool_delete.o tx_byte_pool_info_get.o diff --git a/ports/cortex_m7/gnu/example_build/build_threadx_sample.bat b/ports/cortex_m7/gnu/example_build/build_threadx_sample.bat index 0e58e963..52e836bc 100644 --- a/ports/cortex_m7/gnu/example_build/build_threadx_sample.bat +++ b/ports/cortex_m7/gnu/example_build/build_threadx_sample.bat @@ -1,7 +1,5 @@ -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb tx_simulator_startup.S -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb cortexm7_crt0.S -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb tx_initialize_low_level.S -arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mthumb -I../../../../common/inc -I../inc sample_threadx.c -arm-none-eabi-ld -A cortex-m7 -ereset_handler -T sample_threadx.ld tx_simulator_startup.o cortexm7_crt0.o tx_initialize_low_level.o sample_threadx.o tx.a libc.a -o sample_threadx.out -M > sample_threadx.map - - +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb cortexm7_vectors.S +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb cortexm7_crt0.S +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb tx_initialize_low_level.S +arm-none-eabi-gcc -c -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -I../../../../common/inc -I../inc sample_threadx.c +arm-none-eabi-gcc -g -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16 -mthumb -T sample_threadx.ld -ereset_handler -nostartfiles -o sample_threadx.out -Wl,-Map=sample_threadx.map cortexm7_vectors.o cortexm7_crt0.o tx_initialize_low_level.o sample_threadx.o tx.a diff --git a/ports/cortex_m7/gnu/example_build/cortexm7_crt0.s b/ports/cortex_m7/gnu/example_build/cortexm7_crt0.S index d4cb1636..4228fc11 100644 --- a/ports/cortex_m7/gnu/example_build/cortexm7_crt0.s +++ b/ports/cortex_m7/gnu/example_build/cortexm7_crt0.S @@ -1,45 +1,20 @@ - .global _start - .extern main - - + .syntax unified .section .init, "ax" .code 16 .align 2 .thumb_func - + .global _start _start: CPSID i ldr r1, =__stack_end__ mov sp, r1 - /* Copy initialised sections into RAM if required. */ ldr r0, =__data_load_start__ ldr r1, =__data_start__ ldr r2, =__data_end__ bl crt0_memory_copy - ldr r0, =__text_load_start__ - ldr r1, =__text_start__ - ldr r2, =__text_end__ - bl crt0_memory_copy - ldr r0, =__fast_load_start__ - ldr r1, =__fast_start__ - ldr r2, =__fast_end__ - bl crt0_memory_copy - ldr r0, =__ctors_load_start__ - ldr r1, =__ctors_start__ - ldr r2, =__ctors_end__ - bl crt0_memory_copy - ldr r0, =__dtors_load_start__ - ldr r1, =__dtors_start__ - ldr r2, =__dtors_end__ - bl crt0_memory_copy - ldr r0, =__rodata_load_start__ - ldr r1, =__rodata_start__ - ldr r2, =__rodata_end__ - bl crt0_memory_copy - /* Zero bss. */ ldr r0, =__bss_start__ @@ -47,7 +22,6 @@ _start: mov r2, #0 bl crt0_memory_set - /* Setup heap - not recommended for Threadx but here for compatibility reasons */ ldr r0, = __heap_start__ ldr r1, = __heap_end__ @@ -57,7 +31,6 @@ _start: add r0, r0, #4 str r1, [r0] - /* constructors in case of using C++ */ ldr r0, =__ctors_start__ ldr r1, =__ctors_end__ @@ -72,13 +45,11 @@ crt0_ctor_loop: b crt0_ctor_loop crt0_ctor_end: - /* Setup call frame for main() */ mov r0, #0 mov lr, r0 mov r12, sp - start: /* Jump to main() */ mov r0, #0 @@ -88,28 +59,22 @@ start: /* when main returns, loop forever. */ crt0_exit_loop: b crt0_exit_loop - - /* Startup helper functions. */ - crt0_memory_copy: cmp r0, r1 beq memory_copy_done - sub r2, r2, r1 - beq memory_copy_done memory_copy_loop: ldrb r3, [r0] add r0, r0, #1 strb r3, [r1] add r1, r1, #1 - sub r2, r2, #1 + cmp r1, r2 bne memory_copy_loop memory_copy_done: bx lr - crt0_memory_set: cmp r0, r1 beq memory_set_done @@ -119,7 +84,6 @@ crt0_memory_set: memory_set_done: bx lr - /* Setup attibutes of stack and heap sections so they don't take up room in the elf file */ .section .stack, "wa", %nobits .section .stack_process, "wa", %nobits diff --git a/ports/cortex_m7/gnu/example_build/tx_simulator_startup.s b/ports/cortex_m7/gnu/example_build/cortexm7_vectors.S index cf0db974..6ae558e4 100644 --- a/ports/cortex_m7/gnu/example_build/tx_simulator_startup.s +++ b/ports/cortex_m7/gnu/example_build/cortexm7_vectors.S @@ -1,5 +1,3 @@ - - .global reset_handler .global __tx_NMIHandler @@ -10,7 +8,6 @@ .global __tx_SysTickHandler .global __tx_BadHandler - .syntax unified .section .vectors, "ax" .code 16 @@ -29,7 +26,7 @@ _vectors: .word 0 // Reserved .word 0 // Reserved .word 0 // Reserved - .word __tx_SVCallHandler //_SVC_Handler - used by Threadx scheduler // + .word __tx_SVCallHandler //_SVC_Handler - used by Threadx scheduler // .word __tx_DBGHandler .word 0 // Reserved .word __tx_PendSVHandler @@ -70,14 +67,10 @@ _vectors: .word __tx_BadHandler .word __tx_BadHandler - - - .section .init, "ax" - .thumb_func + .section .init, "ax" + .thumb_func reset_handler: - -// low level hardware config, such as PLL setup goes here - + // low level hardware config, such as PLL setup goes here b _start diff --git a/ports/cortex_m7/gnu/example_build/sample_threadx.ld b/ports/cortex_m7/gnu/example_build/sample_threadx.ld index 28f203fd..c65a1346 100644 --- a/ports/cortex_m7/gnu/example_build/sample_threadx.ld +++ b/ports/cortex_m7/gnu/example_build/sample_threadx.ld @@ -1,206 +1,125 @@ MEMORY { - UNPLACED_SECTIONS (wx) : ORIGIN = 0x100000000, LENGTH = 0 - CM3_System_Control_Space (wx) : ORIGIN = 0xe000e000, LENGTH = 0x00001000 - AHB_Peripherals (wx) : ORIGIN = 0x50000000, LENGTH = 0x00200000 - APB1_Peripherals (wx) : ORIGIN = 0x40080000, LENGTH = 0x00080000 - APB0_Peripherals (wx) : ORIGIN = 0x40000000, LENGTH = 0x00080000 - GPIO (wx) : ORIGIN = 0x2009c000, LENGTH = 0x00004000 - AHBSRAM1 (wx) : ORIGIN = 0x20080000, LENGTH = 0x00004000 - AHBSRAM0 (wx) : ORIGIN = 0x2007c000, LENGTH = 0x00004000 - RAM (wx) : ORIGIN = 0x10000000, LENGTH = 0x00008000 - FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 0x00080000 + RAM (wx) : ORIGIN = 0x20000000, LENGTH = 0x00800000 + FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 0x00400000 } +__STACKSIZE__ = 1024; +__STACKSIZE_PROCESS__ = 0; +__HEAPSIZE__ = 128; SECTIONS { - __CM3_System_Control_Space_segment_start__ = 0xe000e000; - __CM3_System_Control_Space_segment_end__ = 0xe000f000; - __AHB_Peripherals_segment_start__ = 0x50000000; - __AHB_Peripherals_segment_end__ = 0x50200000; - __APB1_Peripherals_segment_start__ = 0x40080000; - __APB1_Peripherals_segment_end__ = 0x40100000; - __APB0_Peripherals_segment_start__ = 0x40000000; - __APB0_Peripherals_segment_end__ = 0x40080000; - __GPIO_segment_start__ = 0x2009c000; - __GPIO_segment_end__ = 0x200a0000; - __AHBSRAM1_segment_start__ = 0x20080000; - __AHBSRAM1_segment_end__ = 0x20084000; - __AHBSRAM0_segment_start__ = 0x2007c000; - __AHBSRAM0_segment_end__ = 0x20080000; - __RAM_segment_start__ = 0x10000000; - __RAM_segment_end__ = 0x10008000; - __FLASH_segment_start__ = 0x00000000; - __FLASH_segment_end__ = 0x00080000; - - __STACKSIZE__ = 1024; - __STACKSIZE_PROCESS__ = 0; - __STACKSIZE_IRQ__ = 0; - __STACKSIZE_FIQ__ = 0; - __STACKSIZE_SVC__ = 0; - __STACKSIZE_ABT__ = 0; - __STACKSIZE_UND__ = 0; - __HEAPSIZE__ = 128; - - __vectors_load_start__ = __FLASH_segment_start__; - .vectors __FLASH_segment_start__ : AT(__FLASH_segment_start__) - { - __vectors_start__ = .; - *(.vectors .vectors.*) - } - __vectors_end__ = __vectors_start__ + SIZEOF(.vectors); - - . = ASSERT(__vectors_end__ >= __FLASH_segment_start__ && __vectors_end__ <= (__FLASH_segment_start__ + 0x00080000) , "error: .vectors is too large to fit in FLASH memory segment"); - - __init_load_start__ = ALIGN(__vectors_end__ , 4); - .init ALIGN(__vectors_end__ , 4) : AT(ALIGN(__vectors_end__ , 4)) - { - __init_start__ = .; - *(.init .init.*) - } - __init_end__ = __init_start__ + SIZEOF(.init); - - . = ASSERT(__init_end__ >= __FLASH_segment_start__ && __init_end__ <= (__FLASH_segment_start__ + 0x00080000) , "error: .init is too large to fit in FLASH memory segment"); - - __text_load_start__ = ALIGN(__init_end__ , 4); - .text ALIGN(__init_end__ , 4) : AT(ALIGN(__init_end__ , 4)) + .vectors : { - __text_start__ = .; - *(.text .text.* .glue_7t .glue_7 .gnu.linkonce.t.* .gcc_except_table) - } - __text_end__ = __text_start__ + SIZEOF(.text); - - . = ASSERT(__text_end__ >= __FLASH_segment_start__ && __text_end__ <= (__FLASH_segment_start__ + 0x00080000) , "error: .text is too large to fit in FLASH memory segment"); - - __dtors_load_start__ = ALIGN(__text_end__ , 4); - .dtors ALIGN(__text_end__ , 4) : AT(ALIGN(__text_end__ , 4)) - { - __dtors_start__ = .; - KEEP (*(SORT(.dtors.*))) KEEP (*(.dtors)) - } - __dtors_end__ = __dtors_start__ + SIZEOF(.dtors); - - . = ASSERT(__dtors_end__ >= __FLASH_segment_start__ && __dtors_end__ <= (__FLASH_segment_start__ + 0x00080000) , "error: .dtors is too large to fit in FLASH memory segment"); - - __ctors_load_start__ = ALIGN(__dtors_end__ , 4); - .ctors ALIGN(__dtors_end__ , 4) : AT(ALIGN(__dtors_end__ , 4)) - { - __ctors_start__ = .; - KEEP (*(SORT(.ctors.*))) KEEP (*(.ctors)) - } - __ctors_end__ = __ctors_start__ + SIZEOF(.ctors); - - . = ASSERT(__ctors_end__ >= __FLASH_segment_start__ && __ctors_end__ <= (__FLASH_segment_start__ + 0x00080000) , "error: .ctors is too large to fit in FLASH memory segment"); + KEEP(*(.vectors .vectors.*)) + } > FLASH - __rodata_load_start__ = ALIGN(__ctors_end__ , 4); - .rodata ALIGN(__ctors_end__ , 4) : AT(ALIGN(__ctors_end__ , 4)) - { - __rodata_start__ = .; - *(.rodata .rodata.* .gnu.linkonce.r.*) - } - __rodata_end__ = __rodata_start__ + SIZEOF(.rodata); + .text : + { + *(.text*) - . = ASSERT(__rodata_end__ >= __FLASH_segment_start__ && __rodata_end__ <= (__FLASH_segment_start__ + 0x00080000) , "error: .rodata is too large to fit in FLASH memory segment"); + KEEP(*(.init)) + KEEP(*(.fini)) - __fast_load_start__ = ALIGN(__rodata_end__ , 4); - .fast ALIGN(__RAM_segment_start__ , 4) : AT(ALIGN(__rodata_end__ , 4)) - { - __fast_start__ = .; - *(.fast .fast.*) - } - __fast_end__ = __fast_start__ + SIZEOF(.fast); + /* .ctors */ + *crtbegin.o(.ctors) + *crtbegin?.o(.ctors) + *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors) + __ctors_start__ = ALIGN(4); + *(SORT(.ctors.*)) + *(.ctors) + __ctors_end__ = ALIGN(4); - __fast_load_end__ = __fast_load_start__ + SIZEOF(.fast); + /* .dtors */ + *crtbegin.o(.dtors) + *crtbegin?.o(.dtors) + *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors) + __dtors_start__ = ALIGN(4); + *(SORT(.dtors.*)) + *(.dtors) + __dtors_end__ = ALIGN(4); - . = ASSERT((__fast_load_start__ + SIZEOF(.fast)) >= __FLASH_segment_start__ && (__fast_load_start__ + SIZEOF(.fast)) <= (__FLASH_segment_start__ + 0x00080000) , "error: .fast is too large to fit in FLASH memory segment"); + *(.rodata*) - .fast_run ALIGN(__RAM_segment_start__ , 4) (NOLOAD) : - { - __fast_run_start__ = .; - . = MAX(__fast_run_start__ + SIZEOF(.fast), .); - } - __fast_run_end__ = __fast_run_start__ + SIZEOF(.fast_run); + KEEP(*(.eh_frame*)) + } > FLASH - . = ASSERT(__fast_run_end__ >= __RAM_segment_start__ && __fast_run_end__ <= (__RAM_segment_start__ + 0x00008000) , "error: .fast_run is too large to fit in RAM memory segment"); + .ARM.extab : + { + *(.ARM.extab* .gnu.linkonce.armextab.*) + } > FLASH - __data_load_start__ = ALIGN(__fast_load_start__ + SIZEOF(.fast) , 4); - .data ALIGN(__fast_run_end__ , 4) : AT(ALIGN(__fast_load_start__ + SIZEOF(.fast) , 4)) - { - __data_start__ = .; - *(.data .data.* .gnu.linkonce.d.*) - } - __data_end__ = __data_start__ + SIZEOF(.data); + __exidx_start = .; + .ARM.exidx : + { + *(.ARM.exidx* .gnu.linkonce.armexidx.*) + } > FLASH + __exidx_end = .; - __data_load_end__ = __data_load_start__ + SIZEOF(.data); + __data_load_start__ = ALIGN (4); - __FLASH_segment_used_end__ = ALIGN(__fast_load_start__ + SIZEOF(.fast) , 4) + SIZEOF(.data); + .data : AT (__data_load_start__) + { + __data_start__ = .; - . = ASSERT((__data_load_start__ + SIZEOF(.data)) >= __FLASH_segment_start__ && (__data_load_start__ + SIZEOF(.data)) <= (__FLASH_segment_start__ + 0x00080000) , "error: .data is too large to fit in FLASH memory segment"); + *(vtable) + *(.data*) - .data_run ALIGN(__fast_run_end__ , 4) (NOLOAD) : - { - __data_run_start__ = .; - . = MAX(__data_run_start__ + SIZEOF(.data), .); - } - __data_run_end__ = __data_run_start__ + SIZEOF(.data_run); + . = ALIGN(4); + /* preinit data */ + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP(*(.preinit_array)) + PROVIDE_HIDDEN (__preinit_array_end = .); - . = ASSERT(__data_run_end__ >= __RAM_segment_start__ && __data_run_end__ <= (__RAM_segment_start__ + 0x00008000) , "error: .data_run is too large to fit in RAM memory segment"); + . = ALIGN(4); + /* init data */ + PROVIDE_HIDDEN (__init_array_start = .); + KEEP(*(SORT(.init_array.*))) + KEEP(*(.init_array)) + PROVIDE_HIDDEN (__init_array_end = .); - __bss_load_start__ = ALIGN(__data_run_end__ , 4); - .bss ALIGN(__data_run_end__ , 4) (NOLOAD) : AT(ALIGN(__data_run_end__ , 4)) - { - __bss_start__ = .; - *(.bss .bss.* .gnu.linkonce.b.*) *(COMMON) - } - __bss_end__ = __bss_start__ + SIZEOF(.bss); + . = ALIGN(4); + /* finit data */ + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP(*(SORT(.fini_array.*))) + KEEP(*(.fini_array)) + PROVIDE_HIDDEN (__fini_array_end = .); - . = ASSERT(__bss_end__ >= __RAM_segment_start__ && __bss_end__ <= (__RAM_segment_start__ + 0x00008000) , "error: .bss is too large to fit in RAM memory segment"); + KEEP(*(.jcr*)) + . = ALIGN(4); + /* All data end */ + + __data_end__ = .; - __non_init_load_start__ = ALIGN(__bss_end__ , 4); - .non_init ALIGN(__bss_end__ , 4) (NOLOAD) : AT(ALIGN(__bss_end__ , 4)) - { - __non_init_start__ = .; - *(.non_init .non_init.*) - } - __non_init_end__ = __non_init_start__ + SIZEOF(.non_init); + } > RAM - . = ASSERT(__non_init_end__ >= __RAM_segment_start__ && __non_init_end__ <= (__RAM_segment_start__ + 0x00008000) , "error: .non_init is too large to fit in RAM memory segment"); + .bss : + { + . = ALIGN(4); + __bss_start__ = .; + *(.bss*) + *(COMMON) + . = ALIGN(4); + __bss_end__ = .; - __heap_load_start__ = ALIGN(__non_init_end__ , 4); - .heap ALIGN(__non_init_end__ , 4) (NOLOAD) : AT(ALIGN(__non_init_end__ , 4)) - { - __heap_start__ = .; + } > RAM + + .heap (COPY): + { + __heap_start__ = ALIGN(4); *(.heap) - . = ALIGN(MAX(__heap_start__ + __HEAPSIZE__ , .), 4); - } - __heap_end__ = __heap_start__ + SIZEOF(.heap); + . = ALIGN(. + __HEAPSIZE__, 4); + __heap_end__ = ALIGN(4); + } > RAM - . = ASSERT(__heap_end__ >= __RAM_segment_start__ && __heap_end__ <= (__RAM_segment_start__ + 0x00008000) , "error: .heap is too large to fit in RAM memory segment"); - - __stack_load_start__ = ALIGN(__heap_end__ , 4); - .stack ALIGN(__heap_end__ , 4) (NOLOAD) : AT(ALIGN(__heap_end__ , 4)) + .stack ALIGN(4) (NOLOAD) : { - __stack_start__ = .; + __stack_start__ = ALIGN(4); *(.stack) - . = ALIGN(MAX(__stack_start__ + __STACKSIZE__ , .), 4); - } - __stack_end__ = __stack_start__ + SIZEOF(.stack); - - . = ASSERT(__stack_end__ >= __RAM_segment_start__ && __stack_end__ <= (__RAM_segment_start__ + 0x00008000) , "error: .stack is too large to fit in RAM memory segment"); - - __stack_process_load_start__ = ALIGN(__stack_end__ , 4); - .stack_process ALIGN(__stack_end__ , 4) (NOLOAD) : AT(ALIGN(__stack_end__ , 4)) - { - __stack_process_start__ = .; - *(.stack_process) - . = ALIGN(MAX(__stack_process_start__ + __STACKSIZE_PROCESS__ , .), 4); - } - __stack_process_end__ = __stack_process_start__ + SIZEOF(.stack_process); - - __RAM_segment_used_end__ = ALIGN(__stack_end__ , 4) + SIZEOF(.stack_process); - - . = ASSERT(__stack_process_end__ >= __RAM_segment_start__ && __stack_process_end__ <= (__RAM_segment_start__ + 0x00008000) , "error: .stack_process is too large to fit in RAM memory segment"); + . = ALIGN(. + __STACKSIZE__, 4); + __stack_end__ = ALIGN(4); + } > RAM + __RAM_segment_used_end__ = .; } - diff --git a/ports/cortex_m7/gnu/example_build/tx_initialize_low_level.S b/ports/cortex_m7/gnu/example_build/tx_initialize_low_level.S index 85e612a6..c84822e6 100644 --- a/ports/cortex_m7/gnu/example_build/tx_initialize_low_level.S +++ b/ports/cortex_m7/gnu/example_build/tx_initialize_low_level.S @@ -1,226 +1,201 @@ -@/**************************************************************************/ -@/* */ -@/* Copyright (c) Microsoft Corporation. All rights reserved. */ -@/* */ -@/* This software is licensed under the Microsoft Software License */ -@/* Terms for Microsoft Azure RTOS. Full text of the license can be */ -@/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */ -@/* and in the root directory of this software. */ -@/* */ -@/**************************************************************************/ -@ -@ -@/**************************************************************************/ -@/**************************************************************************/ -@/** */ -@/** ThreadX Component */ -@/** */ -@/** Initialize */ -@/** */ -@/**************************************************************************/ -@/**************************************************************************/ -@ -@ +/**************************************************************************/ +/* */ +/* Copyright (c) Microsoft Corporation. All rights reserved. */ +/* */ +/* This software is licensed under the Microsoft Software License */ +/* Terms for Microsoft Azure RTOS. Full text of the license can be */ +/* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */ +/* and in the root directory of this software. */ +/* */ +/**************************************************************************/ + +/**************************************************************************/ +/**************************************************************************/ +/** */ +/** ThreadX Component */ +/** */ +/** Initialize */ +/** */ +/**************************************************************************/ +/**************************************************************************/ + .global _tx_thread_system_stack_ptr .global _tx_initialize_unused_memory .global __RAM_segment_used_end__ .global _tx_timer_interrupt .global __main - .global __tx_SVCallHandler - .global __tx_PendSVHandler .global _vectors - .global __tx_NMIHandler @ NMI - .global __tx_BadHandler @ HardFault - .global __tx_SVCallHandler @ SVCall - .global __tx_DBGHandler @ Monitor - .global __tx_PendSVHandler @ PendSV - .global __tx_SysTickHandler @ SysTick - .global __tx_IntHandler @ Int 0 -@ -@ + .global __tx_NMIHandler // NMI + .global __tx_BadHandler // HardFault + .global __tx_SVCallHandler // SVCall + .global __tx_DBGHandler // Monitor + .global __tx_PendSVHandler // PendSV + .global __tx_SysTickHandler // SysTick + .global __tx_IntHandler // Int 0 + SYSTEM_CLOCK = 6000000 SYSTICK_CYCLES = ((SYSTEM_CLOCK / 100) -1) .text 32 .align 4 .syntax unified -@/**************************************************************************/ -@/* */ -@/* FUNCTION RELEASE */ -@/* */ -@/* _tx_initialize_low_level Cortex-M7/GNU */ -@/* 6.1 */ -@/* AUTHOR */ -@/* */ -@/* William E. Lamie, Microsoft Corporation */ -@/* */ -@/* DESCRIPTION */ -@/* */ -@/* This function is responsible for any low-level processor */ -@/* initialization, including setting up interrupt vectors, setting */ -@/* up a periodic timer interrupt source, saving the system stack */ -@/* pointer for use in ISR processing later, and finding the first */ -@/* available RAM memory address for tx_application_define. */ -@/* */ -@/* INPUT */ -@/* */ -@/* None */ -@/* */ -@/* OUTPUT */ -@/* */ -@/* None */ -@/* */ -@/* CALLS */ -@/* */ -@/* None */ -@/* */ -@/* CALLED BY */ -@/* */ -@/* _tx_initialize_kernel_enter ThreadX entry function */ -@/* */ -@/* RELEASE HISTORY */ -@/* */ -@/* DATE NAME DESCRIPTION */ -@/* */ -@/* 05-19-2020 William E. Lamie Initial Version 6.0 */ -@/* 09-30-2020 William E. Lamie Modified Comment(s), fixed */ -@/* GNU assembly comment, clean */ -@/* up whitespace, resulting */ -@/* in version 6.1 */ -@/* */ -@/**************************************************************************/ -@VOID _tx_initialize_low_level(VOID) -@{ +/**************************************************************************/ +/* */ +/* FUNCTION RELEASE */ +/* */ +/* _tx_initialize_low_level Cortex-M7/GNU */ +/* 6.1 */ +/* AUTHOR */ +/* */ +/* William E. Lamie, Microsoft Corporation */ +/* */ +/* DESCRIPTION */ +/* */ +/* This function is responsible for any low-level processor */ +/* initialization, including setting up interrupt vectors, setting */ +/* up a periodic timer interrupt source, saving the system stack */ +/* pointer for use in ISR processing later, and finding the first */ +/* available RAM memory address for tx_application_define. */ +/* */ +/* INPUT */ +/* */ +/* None */ +/* */ +/* OUTPUT */ +/* */ +/* None */ +/* */ +/* CALLS */ +/* */ +/* None */ +/* */ +/* CALLED BY */ +/* */ +/* _tx_initialize_kernel_enter ThreadX entry function */ +/* */ +/* RELEASE HISTORY */ +/* */ +/* DATE NAME DESCRIPTION */ +/* */ +/* 05-19-2020 William E. Lamie Initial Version 6.0 */ +/* 09-30-2020 William E. Lamie Modified Comment(s), fixed */ +/* GNU assembly comment, clean */ +/* up whitespace, resulting */ +/* in version 6.1 */ +/* */ +/**************************************************************************/ +// VOID _tx_initialize_low_level(VOID) +// { .global _tx_initialize_low_level .thumb_func _tx_initialize_low_level: -@ -@ /* Disable interrupts during ThreadX initialization. */ -@ + + /* Disable interrupts during ThreadX initialization. */ CPSID i -@ -@ /* Set base of available memory to end of non-initialised RAM area. */ -@ - LDR r0, =_tx_initialize_unused_memory @ Build address of unused memory pointer - LDR r1, =__RAM_segment_used_end__ @ Build first free address - ADD r1, r1, #4 @ - STR r1, [r0] @ Setup first unused memory pointer -@ -@ /* Setup Vector Table Offset Register. */ -@ - MOV r0, #0xE000E000 @ Build address of NVIC registers - LDR r1, =_vectors @ Pickup address of vector table - STR r1, [r0, #0xD08] @ Set vector table address -@ -@ /* Set system stack pointer from vector value. */ -@ - LDR r0, =_tx_thread_system_stack_ptr @ Build address of system stack pointer - LDR r1, =_vectors @ Pickup address of vector table - LDR r1, [r1] @ Pickup reset stack pointer - STR r1, [r0] @ Save system stack pointer -@ -@ /* Enable the cycle count register. */ -@ - LDR r0, =0xE0001000 @ Build address of DWT register - LDR r1, [r0] @ Pickup the current value - ORR r1, r1, #1 @ Set the CYCCNTENA bit - STR r1, [r0] @ Enable the cycle count register -@ -@ /* Configure SysTick for 100Hz clock, or 16384 cycles if no reference. */ -@ - MOV r0, #0xE000E000 @ Build address of NVIC registers + + /* Set base of available memory to end of non-initialised RAM area. */ + LDR r0, =_tx_initialize_unused_memory // Build address of unused memory pointer + LDR r1, =__RAM_segment_used_end__ // Build first free address + ADD r1, r1, #4 // + STR r1, [r0] // Setup first unused memory pointer + + /* Setup Vector Table Offset Register. */ + MOV r0, #0xE000E000 // Build address of NVIC registers + LDR r1, =_vectors // Pickup address of vector table + STR r1, [r0, #0xD08] // Set vector table address + + /* Set system stack pointer from vector value. */ + LDR r0, =_tx_thread_system_stack_ptr // Build address of system stack pointer + LDR r1, =_vectors // Pickup address of vector table + LDR r1, [r1] // Pickup reset stack pointer + STR r1, [r0] // Save system stack pointer + + /* Enable the cycle count register. */ + LDR r0, =0xE0001000 // Build address of DWT register + LDR r1, [r0] // Pickup the current value + ORR r1, r1, #1 // Set the CYCCNTENA bit + STR r1, [r0] // Enable the cycle count register + + /* Configure SysTick. */ + MOV r0, #0xE000E000 // Build address of NVIC registers LDR r1, =SYSTICK_CYCLES - STR r1, [r0, #0x14] @ Setup SysTick Reload Value - MOV r1, #0x7 @ Build SysTick Control Enable Value - STR r1, [r0, #0x10] @ Setup SysTick Control -@ -@ /* Configure handler priorities. */ -@ - LDR r1, =0x00000000 @ Rsrv, UsgF, BusF, MemM - STR r1, [r0, #0xD18] @ Setup System Handlers 4-7 Priority Registers + STR r1, [r0, #0x14] // Setup SysTick Reload Value + MOV r1, #0x7 // Build SysTick Control Enable Value + STR r1, [r0, #0x10] // Setup SysTick Control - LDR r1, =0xFF000000 @ SVCl, Rsrv, Rsrv, Rsrv - STR r1, [r0, #0xD1C] @ Setup System Handlers 8-11 Priority Registers - @ Note: SVC must be lowest priority, which is 0xFF + /* Configure handler priorities. */ + LDR r1, =0x00000000 // Rsrv, UsgF, BusF, MemM + STR r1, [r0, #0xD18] // Setup System Handlers 4-7 Priority Registers + LDR r1, =0xFF000000 // SVCl, Rsrv, Rsrv, Rsrv + STR r1, [r0, #0xD1C] // Setup System Handlers 8-11 Priority Registers + // Note: SVC must be lowest priority, which is 0xFF + LDR r1, =0x40FF0000 // SysT, PnSV, Rsrv, DbgM + STR r1, [r0, #0xD20] // Setup System Handlers 12-15 Priority Registers + // Note: PnSV must be lowest priority, which is 0xFF - LDR r1, =0x40FF0000 @ SysT, PnSV, Rsrv, DbgM - STR r1, [r0, #0xD20] @ Setup System Handlers 12-15 Priority Registers - @ Note: PnSV must be lowest priority, which is 0xFF -@ -@ /* Return to caller. */ -@ + /* Return to caller. */ BX lr -@} -@ +// } -@/* Define shells for each of the unused vectors. */ -@ +/* Define shells for each of the unused vectors. */ .global __tx_BadHandler .thumb_func __tx_BadHandler: B __tx_BadHandler -@ /* added to catch the hardfault */ - +/* added to catch the hardfault */ .global __tx_HardfaultHandler .thumb_func __tx_HardfaultHandler: B __tx_HardfaultHandler - -@ /* added to catch the SVC */ - +/* added to catch the SVC */ .global __tx_SVCallHandler .thumb_func __tx_SVCallHandler: B __tx_SVCallHandler - -@ /* Generic interrupt handler template */ +/* Generic interrupt handler template */ .global __tx_IntHandler .thumb_func __tx_IntHandler: -@ VOID InterruptHandler (VOID) -@ { +// VOID InterruptHandler (VOID) +// { PUSH {r0, lr} #ifdef TX_ENABLE_EXECUTION_CHANGE_NOTIFY - BL _tx_execution_isr_enter @ Call the ISR enter function + BL _tx_execution_isr_enter // Call the ISR enter function #endif - -@ /* Do interrupt handler work here */ -@ /* BL <your C Function>.... */ - + /* Do interrupt handler work here */ + /* BL <your C Function>.... */ #ifdef TX_ENABLE_EXECUTION_CHANGE_NOTIFY - BL _tx_execution_isr_exit @ Call the ISR exit function + BL _tx_execution_isr_exit // Call the ISR exit function #endif POP {r0, lr} BX LR -@ } +// } -@ /* System Tick timer interrupt handler */ +/* System Tick timer interrupt handler */ .global __tx_SysTickHandler .global SysTick_Handler .thumb_func __tx_SysTickHandler: .thumb_func SysTick_Handler: -@ VOID TimerInterruptHandler (VOID) -@ { -@ +// VOID SysTick_Handler (VOID) +// { PUSH {r0, lr} #ifdef TX_ENABLE_EXECUTION_CHANGE_NOTIFY - BL _tx_execution_isr_enter @ Call the ISR enter function + BL _tx_execution_isr_enter // Call the ISR enter function #endif BL _tx_timer_interrupt #ifdef TX_ENABLE_EXECUTION_CHANGE_NOTIFY - BL _tx_execution_isr_exit @ Call the ISR exit function + BL _tx_execution_isr_exit // Call the ISR exit function #endif POP {r0, lr} - BX LR -@ } - + BX lr +// } -@ /* NMI, DBG handlers */ +/* NMI, DBG handlers */ .global __tx_NMIHandler .thumb_func __tx_NMIHandler: diff --git a/ports/cortex_m7/gnu/inc/tx_port.h b/ports/cortex_m7/gnu/inc/tx_port.h index 9a88b1d8..7d14ac82 100644 --- a/ports/cortex_m7/gnu/inc/tx_port.h +++ b/ports/cortex_m7/gnu/inc/tx_port.h @@ -26,7 +26,7 @@ /* PORT SPECIFIC C INFORMATION RELEASE */ /* */ /* tx_port.h Cortex-M7/GNU */ -/* 6.1.11 */ +/* 6.1.12 */ /* */ /* AUTHOR */ /* */ @@ -59,6 +59,9 @@ /* 04-25-2022 Scott Larson Modified comments and added */ /* volatile to registers, */ /* resulting in version 6.1.11 */ +/* 07-29-2022 Scott Larson Modified comments and */ +/* described BASEPRI usage, */ +/* resulting in version 6.1.12 */ /* */ /**************************************************************************/ @@ -146,6 +149,12 @@ typedef unsigned short USHORT; #define TX_TIMER_THREAD_PRIORITY 0 /* Default timer thread priority */ #endif +/* By default, ThreadX for Cortex-M uses the PRIMASK register to enable/disable interrupts. +If using BASEPRI is desired, define the following two symbols for both c and assembly files: +TX_PORT_USE_BASEPRI - This tells ThreadX to use BASEPRI instead of PRIMASK. +TX_PORT_BASEPRI = (priority_mask << (8 - number_priority_bits)) - this defines the maximum priority level to mask. +Any interrupt with a higher priority than priority_mask will not be masked, thus the interrupt will run. +*/ /* Define various constants for the ThreadX Cortex-M port. */ @@ -707,7 +716,7 @@ void tx_thread_fpu_disable(void); #ifdef TX_THREAD_INIT CHAR _tx_version_id[] = - "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M7/GNU Version 6.1.11 *"; + "Copyright (c) Microsoft Corporation. All rights reserved. * ThreadX Cortex-M7/GNU Version 6.1.12 *"; #else #ifdef TX_MISRA_ENABLE extern CHAR _tx_version_id[100]; diff --git a/ports/cortex_m7/gnu/src/tx_misra.S b/ports/cortex_m7/gnu/src/tx_misra.S index b03fdcd0..155512be 100644 --- a/ports/cortex_m7/gnu/src/tx_misra.S +++ b/ports/cortex_m7/gnu/src/tx_misra.S @@ -103,6 +103,14 @@ .global _tx_misra_vfp_touch #endif + .global _tx_misra_event_flags_group_not_used + .global _tx_misra_event_flags_set_notify_not_used + .global _tx_misra_queue_not_used + .global _tx_misra_queue_send_notify_not_used + .global _tx_misra_semaphore_not_used + .global _tx_misra_semaphore_put_notify_not_used + .global _tx_misra_thread_entry_exit_notify_not_used + .global _tx_misra_thread_not_used /**************************************************************************/ /**************************************************************************/ @@ -172,17 +180,93 @@ _tx_misra_uchar_pointer_dif: BX LR // return -/**************************************************************************/ -/**************************************************************************/ -/** */ -/** ULONG _tx_misra_pointer_to_ulong_convert(VOID *ptr); */ -/** */ -/**************************************************************************/ -/**************************************************************************/ - +/************************************************************************************************************************************/ +/************************************************************************************************************************************/ +/** */ +/** This single function serves all of the below prototypes. */ +/** */ +/** ULONG _tx_misra_pointer_to_ulong_convert(VOID *ptr); */ +/** VOID *_tx_misra_ulong_to_pointer_convert(ULONG input); */ +/** UCHAR **_tx_misra_indirect_void_to_uchar_pointer_convert(VOID **return_ptr); */ +/** UCHAR **_tx_misra_uchar_to_indirect_uchar_pointer_convert(UCHAR *pointer); */ +/** UCHAR *_tx_misra_block_pool_to_uchar_pointer_convert(TX_BLOCK_POOL *pool); */ +/** TX_BLOCK_POOL *_tx_misra_void_to_block_pool_pointer_convert(VOID *pointer); */ +/** UCHAR *_tx_misra_void_to_uchar_pointer_convert(VOID *pointer); */ +/** TX_BLOCK_POOL *_tx_misra_uchar_to_block_pool_pointer_convert(UCHAR *pointer); */ +/** UCHAR **_tx_misra_void_to_indirect_uchar_pointer_convert(VOID *pointer); */ +/** TX_BYTE_POOL *_tx_misra_void_to_byte_pool_pointer_convert(VOID *pointer); */ +/** UCHAR *_tx_misra_byte_pool_to_uchar_pointer_convert(TX_BYTE_POOL *pool); */ +/** ALIGN_TYPE *_tx_misra_uchar_to_align_type_pointer_convert(UCHAR *pointer); */ +/** TX_BYTE_POOL **_tx_misra_uchar_to_indirect_byte_pool_pointer_convert(UCHAR *pointer); */ +/** TX_EVENT_FLAGS_GROUP *_tx_misra_void_to_event_flags_pointer_convert(VOID *pointer); */ +/** ULONG *_tx_misra_void_to_ulong_pointer_convert(VOID *pointer); */ +/** TX_MUTEX *_tx_misra_void_to_mutex_pointer_convert(VOID *pointer); */ +/** TX_QUEUE *_tx_misra_void_to_queue_pointer_convert(VOID *pointer); */ +/** TX_SEMAPHORE *_tx_misra_void_to_semaphore_pointer_convert(VOID *pointer); */ +/** VOID *_tx_misra_uchar_to_void_pointer_convert(UCHAR *pointer); */ +/** TX_THREAD *_tx_misra_ulong_to_thread_pointer_convert(ULONG value); */ +/** VOID *_tx_misra_timer_indirect_to_void_pointer_convert(TX_TIMER_INTERNAL **pointer); */ +/** CHAR *_tx_misra_const_char_to_char_pointer_convert(const char *pointer); */ +/** TX_THREAD *_tx_misra_void_to_thread_pointer_convert(void *pointer); */ +/** UCHAR *_tx_misra_object_to_uchar_pointer_convert(TX_TRACE_OBJECT_ENTRY *pointer); */ +/** TX_TRACE_OBJECT_ENTRY *_tx_misra_uchar_to_object_pointer_convert(UCHAR *pointer); */ +/** TX_TRACE_HEADER *_tx_misra_uchar_to_header_pointer_convert(UCHAR *pointer); */ +/** TX_TRACE_BUFFER_ENTRY *_tx_misra_uchar_to_entry_pointer_convert(UCHAR *pointer); */ +/** UCHAR *_tx_misra_entry_to_uchar_pointer_convert(TX_TRACE_BUFFER_ENTRY *pointer); */ +/** UCHAR *_tx_misra_char_to_uchar_pointer_convert(CHAR *pointer); */ +/** VOID _tx_misra_event_flags_group_not_used(TX_EVENT_FLAGS_GROUP *group_ptr); */ +/** VOID _tx_misra_event_flags_set_notify_not_used(VOID (*events_set_notify)(TX_EVENT_FLAGS_GROUP *notify_group_ptr)); */ +/** VOID _tx_misra_queue_not_used(TX_QUEUE *queue_ptr); */ +/** VOID _tx_misra_queue_send_notify_not_used(VOID (*queue_send_notify)(TX_QUEUE *notify_queue_ptr)); */ +/** VOID _tx_misra_semaphore_not_used(TX_SEMAPHORE *semaphore_ptr); */ +/** VOID _tx_misra_semaphore_put_notify_not_used(VOID (*semaphore_put_notify)(TX_SEMAPHORE *notify_semaphore_ptr)); */ +/** VOID _tx_misra_thread_not_used(TX_THREAD *thread_ptr); */ +/** VOID _tx_misra_thread_entry_exit_notify_not_used(VOID (*thread_entry_exit_notify)(TX_THREAD *notify_thread_ptr, UINT id)); */ +/** */ +/************************************************************************************************************************************/ +/************************************************************************************************************************************/ .text .thumb_func _tx_misra_pointer_to_ulong_convert: +_tx_misra_ulong_to_pointer_convert: +_tx_misra_indirect_void_to_uchar_pointer_convert: +_tx_misra_uchar_to_indirect_uchar_pointer_convert: +_tx_misra_block_pool_to_uchar_pointer_convert: +_tx_misra_void_to_block_pool_pointer_convert: +_tx_misra_void_to_uchar_pointer_convert: +_tx_misra_uchar_to_block_pool_pointer_convert: +_tx_misra_void_to_indirect_uchar_pointer_convert: +_tx_misra_void_to_byte_pool_pointer_convert: +_tx_misra_byte_pool_to_uchar_pointer_convert: +_tx_misra_uchar_to_align_type_pointer_convert: +_tx_misra_uchar_to_indirect_byte_pool_pointer_convert: +_tx_misra_void_to_event_flags_pointer_convert: +_tx_misra_void_to_ulong_pointer_convert: +_tx_misra_void_to_mutex_pointer_convert: +_tx_misra_void_to_queue_pointer_convert: +_tx_misra_void_to_semaphore_pointer_convert: +_tx_misra_uchar_to_void_pointer_convert: +_tx_misra_ulong_to_thread_pointer_convert: +_tx_misra_timer_indirect_to_void_pointer_convert: +_tx_misra_const_char_to_char_pointer_convert: +_tx_misra_void_to_thread_pointer_convert: +#ifdef TX_ENABLE_EVENT_TRACE +_tx_misra_object_to_uchar_pointer_convert: +_tx_misra_uchar_to_object_pointer_convert: +_tx_misra_uchar_to_header_pointer_convert: +_tx_misra_uchar_to_entry_pointer_convert: +_tx_misra_entry_to_uchar_pointer_convert: +#endif +_tx_misra_char_to_uchar_pointer_convert: +_tx_misra_event_flags_group_not_used: +_tx_misra_event_flags_set_notify_not_used: +_tx_misra_queue_not_used: +_tx_misra_queue_send_notify_not_used: +_tx_misra_semaphore_not_used: +_tx_misra_semaphore_put_notify_not_used: +_tx_misra_thread_entry_exit_notify_not_used: +_tx_misra_thread_not_used: + BX LR // return @@ -237,20 +321,6 @@ _tx_misra_ulong_pointer_dif: /**************************************************************************/ /**************************************************************************/ /** */ -/** VOID *_tx_misra_ulong_to_pointer_convert(ULONG input); */ -/** */ -/**************************************************************************/ -/**************************************************************************/ - - .text - .thumb_func -_tx_misra_ulong_to_pointer_convert: - BX LR // return - - -/**************************************************************************/ -/**************************************************************************/ -/** */ /** VOID _tx_misra_message_copy(ULONG **source, ULONG **destination, */ /** UINT size); */ /** */ @@ -332,12 +402,9 @@ _tx_misra_timer_pointer_add: .text .thumb_func _tx_misra_user_timer_pointer_get: - ADDS R2,R0,#+8 - SUBS R2,R2,R0 - RSBS R2,R2,#+0 - ADD R0,R0,R2 - STR R0,[R1, #+0] - BX LR // return + SUBS R0,#8 + STR R0,[R1, #+0] + BX LR // return /**************************************************************************/ @@ -553,202 +620,6 @@ _tx_misra_always_true: BX LR // return -/******************************************************************************************/ -/******************************************************************************************/ -/** */ -/** UCHAR **_tx_misra_indirect_void_to_uchar_pointer_convert(VOID **return_ptr); */ -/** */ -/******************************************************************************************/ -/******************************************************************************************/ - - .text - .thumb_func -_tx_misra_indirect_void_to_uchar_pointer_convert: - BX LR // return - - -/***************************************************************************************/ -/***************************************************************************************/ -/** */ -/** UCHAR **_tx_misra_uchar_to_indirect_uchar_pointer_convert(UCHAR *pointer); */ -/** */ -/***************************************************************************************/ -/***************************************************************************************/ - - .text - .thumb_func -_tx_misra_uchar_to_indirect_uchar_pointer_convert: - BX LR // return - - -/***********************************************************************************/ -/***********************************************************************************/ -/** */ -/** UCHAR *_tx_misra_block_pool_to_uchar_pointer_convert(TX_BLOCK_POOL *pool); */ -/** */ -/***********************************************************************************/ -/***********************************************************************************/ - - .text - .thumb_func -_tx_misra_block_pool_to_uchar_pointer_convert: - BX LR // return - - -/******************************************************************************************/ -/******************************************************************************************/ -/** */ -/** TX_BLOCK_POOL *_tx_misra_void_to_block_pool_pointer_convert(VOID *pointer); */ -/** */ -/******************************************************************************************/ -/******************************************************************************************/ - - .text - .thumb_func -_tx_misra_void_to_block_pool_pointer_convert: - BX LR // return - - -/*****************************************************************************/ -/*****************************************************************************/ -/** */ -/** UCHAR *_tx_misra_void_to_uchar_pointer_convert(VOID *pointer); */ -/** */ -/*****************************************************************************/ -/*****************************************************************************/ - - .text - .thumb_func -_tx_misra_void_to_uchar_pointer_convert: - BX LR // return - - -/************************************************************************************/ -/************************************************************************************/ -/** */ -/** TX_BLOCK_POOL *_tx_misra_uchar_to_block_pool_pointer_convert(UCHAR *pointer); */ -/** */ -/************************************************************************************/ -/************************************************************************************/ - - .text - .thumb_func -_tx_misra_uchar_to_block_pool_pointer_convert: - BX LR // return - - -/**************************************************************************************/ -/**************************************************************************************/ -/** */ -/** UCHAR **_tx_misra_void_to_indirect_uchar_pointer_convert(VOID *pointer); */ -/** */ -/**************************************************************************************/ -/**************************************************************************************/ - - .text - .thumb_func -_tx_misra_void_to_indirect_uchar_pointer_convert: - BX LR // return - - -/*****************************************************************************************/ -/*****************************************************************************************/ -/** */ -/** TX_BYTE_POOL *_tx_misra_void_to_byte_pool_pointer_convert(VOID *pointer); */ -/** */ -/*****************************************************************************************/ -/*****************************************************************************************/ - - .text - .thumb_func -_tx_misra_void_to_byte_pool_pointer_convert: - BX LR // return - - -/***************************************************************************************/ -/***************************************************************************************/ -/** */ -/** UCHAR *_tx_misra_byte_pool_to_uchar_pointer_convert(TX_BYTE_POOL *pool); */ -/** */ -/***************************************************************************************/ -/***************************************************************************************/ - - .text - .thumb_func -_tx_misra_byte_pool_to_uchar_pointer_convert: - BX LR // return - - -/*****************************************************************************************/ -/*****************************************************************************************/ -/** */ -/** ALIGN_TYPE *_tx_misra_uchar_to_align_type_pointer_convert(UCHAR *pointer); */ -/** */ -/*****************************************************************************************/ -/*****************************************************************************************/ - - .text - .thumb_func -_tx_misra_uchar_to_align_type_pointer_convert: - BX LR // return - - -/****************************************************************************************************/ -/****************************************************************************************************/ -/** */ -/** TX_BYTE_POOL **_tx_misra_uchar_to_indirect_byte_pool_pointer_convert(UCHAR *pointer); */ -/** */ -/****************************************************************************************************/ -/****************************************************************************************************/ - - .text - .thumb_func -_tx_misra_uchar_to_indirect_byte_pool_pointer_convert: - BX LR // return - - -/**************************************************************************************************/ -/**************************************************************************************************/ -/** */ -/** TX_EVENT_FLAGS_GROUP *_tx_misra_void_to_event_flags_pointer_convert(VOID *pointer); */ -/** */ -/**************************************************************************************************/ -/**************************************************************************************************/ - - .text - .thumb_func -_tx_misra_void_to_event_flags_pointer_convert: - BX LR // return - - -/*****************************************************************************/ -/*****************************************************************************/ -/** */ -/** ULONG *_tx_misra_void_to_ulong_pointer_convert(VOID *pointer); */ -/** */ -/*****************************************************************************/ -/*****************************************************************************/ - - .text - .thumb_func -_tx_misra_void_to_ulong_pointer_convert: - BX LR // return - - -/********************************************************************************/ -/********************************************************************************/ -/** */ -/** TX_MUTEX *_tx_misra_void_to_mutex_pointer_convert(VOID *pointer); */ -/** */ -/********************************************************************************/ -/********************************************************************************/ - - .text - .thumb_func -_tx_misra_void_to_mutex_pointer_convert: - BX LR // return - - /**************************************************************************/ /**************************************************************************/ /** */ @@ -764,191 +635,6 @@ _tx_misra_status_get: BX LR // return -/********************************************************************************/ -/********************************************************************************/ -/** */ -/** TX_QUEUE *_tx_misra_void_to_queue_pointer_convert(VOID *pointer); */ -/** */ -/********************************************************************************/ -/********************************************************************************/ - - .text - .thumb_func -_tx_misra_void_to_queue_pointer_convert: - BX LR // return - - -/****************************************************************************************/ -/****************************************************************************************/ -/** */ -/** TX_SEMAPHORE *_tx_misra_void_to_semaphore_pointer_convert(VOID *pointer); */ -/** */ -/****************************************************************************************/ -/****************************************************************************************/ - - .text - .thumb_func -_tx_misra_void_to_semaphore_pointer_convert: - BX LR // return - - -/**************************************************************************/ -/**************************************************************************/ -/** */ -/** VOID *_tx_misra_uchar_to_void_pointer_convert(UCHAR *pointer); */ -/** */ -/**************************************************************************/ -/**************************************************************************/ - - .text - .thumb_func -_tx_misra_uchar_to_void_pointer_convert: - BX LR // return - - -/*********************************************************************************/ -/*********************************************************************************/ -/** */ -/** TX_THREAD *_tx_misra_ulong_to_thread_pointer_convert(ULONG value); */ -/** */ -/*********************************************************************************/ -/*********************************************************************************/ - - .text - .thumb_func -_tx_misra_ulong_to_thread_pointer_convert: - BX LR // return - - -/***************************************************************************************************/ -/***************************************************************************************************/ -/** */ -/** VOID *_tx_misra_timer_indirect_to_void_pointer_convert(TX_TIMER_INTERNAL **pointer); */ -/** */ -/***************************************************************************************************/ -/***************************************************************************************************/ - - .text - .thumb_func -_tx_misra_timer_indirect_to_void_pointer_convert: - BX LR // return - - -/***************************************************************************************/ -/***************************************************************************************/ -/** */ -/** CHAR *_tx_misra_const_char_to_char_pointer_convert(const char *pointer); */ -/** */ -/***************************************************************************************/ -/***************************************************************************************/ - - .text - .thumb_func -_tx_misra_const_char_to_char_pointer_convert: - BX LR // return - - -/**********************************************************************************/ -/**********************************************************************************/ -/** */ -/** TX_THREAD *_tx_misra_void_to_thread_pointer_convert(void *pointer); */ -/** */ -/**********************************************************************************/ -/**********************************************************************************/ - - .text - .thumb_func -_tx_misra_void_to_thread_pointer_convert: - BX LR // return - - -#ifdef TX_ENABLE_EVENT_TRACE - -/************************************************************************************************/ -/************************************************************************************************/ -/** */ -/** UCHAR *_tx_misra_object_to_uchar_pointer_convert(TX_TRACE_OBJECT_ENTRY *pointer); */ -/** */ -/************************************************************************************************/ -/************************************************************************************************/ - - .text - .thumb_func -_tx_misra_object_to_uchar_pointer_convert: - BX LR // return - - -/************************************************************************************************/ -/************************************************************************************************/ -/** */ -/** TX_TRACE_OBJECT_ENTRY *_tx_misra_uchar_to_object_pointer_convert(UCHAR *pointer); */ -/** */ -/************************************************************************************************/ -/************************************************************************************************/ - - .text - .thumb_func -_tx_misra_uchar_to_object_pointer_convert: - BX LR // return - - -/******************************************************************************************/ -/******************************************************************************************/ -/** */ -/** TX_TRACE_HEADER *_tx_misra_uchar_to_header_pointer_convert(UCHAR *pointer); */ -/** */ -/******************************************************************************************/ -/******************************************************************************************/ - - .text - .thumb_func -_tx_misra_uchar_to_header_pointer_convert: - BX LR // return - - -/***********************************************************************************************/ -/***********************************************************************************************/ -/** */ -/** TX_TRACE_BUFFER_ENTRY *_tx_misra_uchar_to_entry_pointer_convert(UCHAR *pointer); */ -/** */ -/***********************************************************************************************/ -/***********************************************************************************************/ - - .text - .thumb_func -_tx_misra_uchar_to_entry_pointer_convert: - BX LR // return - - -/***********************************************************************************************/ -/***********************************************************************************************/ -/** */ -/** UCHAR *_tx_misra_entry_to_uchar_pointer_convert(TX_TRACE_BUFFER_ENTRY *pointer); */ -/** */ -/***********************************************************************************************/ -/***********************************************************************************************/ - - .text - .thumb_func -_tx_misra_entry_to_uchar_pointer_convert: - BX LR // return -#endif - - -/***********************************************************************************************/ -/***********************************************************************************************/ -/** */ -/** UCHAR *_tx_misra_char_to_uchar_pointer_convert(CHAR *pointer); */ -/** */ -/***********************************************************************************************/ -/***********************************************************************************************/ - - .text - .thumb_func -_tx_misra_char_to_uchar_pointer_convert: - BX LR // return - - /***********************************************************************************************/ /***********************************************************************************************/ /** */ |