Merge pull request #510 from eclipse-threadx/devv6.5.0.202601_rel

Merge changes ahead of the v6.5.0.202601 release

11 files changed, 123 insertions, 135 deletions

diff --git a/ports/rxv1/ccrx/CMakeLists.txt b/ports/rxv1/ccrx/CMakeLists.txt
index fabadffe..f2269c51 100644
--- a/ports/rxv1/ccrx/CMakeLists.txt
+++ b/ports/rxv1/ccrx/CMakeLists.txt
@@ -2,7 +2,7 @@
 target_sources(${PROJECT_NAME}
     PRIVATE
     # {{BEGIN_TARGET_SOURCES}}
-	${CMAKE_CURRENT_LIST_DIR}/src/tx_initialize_low_level.src 
+	${CMAKE_CURRENT_LIST_DIR}/src/tx_initialize_low_level.src
 	${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_context_restore.src
 	${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_context_save.src
 	${CMAKE_CURRENT_LIST_DIR}/src/tx_thread_interrupt_control.src
diff --git a/ports/rxv1/ccrx/inc/tx_port.h b/ports/rxv1/ccrx/inc/tx_port.h
index e729a7bb..295add89 100644
--- a/ports/rxv1/ccrx/inc/tx_port.h
+++ b/ports/rxv1/ccrx/inc/tx_port.h
@@ -1,10 +1,11 @@
 /***************************************************************************
- * Copyright (c) 2024 Microsoft Corporation 
- * 
+ * Copyright (c) 2024 Microsoft Corporation
+ * Copyright (c) 2026-present Eclipse ThreadX contributors
+ *
  * This program and the accompanying materials are made available under the
  * terms of the MIT License which is available at
  * https://opensource.org/licenses/MIT.
- * 
+ *
  * SPDX-License-Identifier: MIT
  **************************************************************************/
 
@@ -29,7 +30,7 @@
 /*                                                                        */
 /*  AUTHOR                                                                */
 /*                                                                        */
-/*    William E. Lamie, Microsoft Corporation                             */ 
+/*    William E. Lamie, Microsoft Corporation                             */
 /*                                                                        */
 /*  DESCRIPTION                                                           */
 /*                                                                        */
@@ -42,21 +43,6 @@
 /*    own special types that can be mapped to actual data types by this   */
 /*    file to guarantee consistency in the interface and functionality.   */
 /*                                                                        */
-/*  RELEASE HISTORY                                                       */
-/*                                                                        */
-/*    DATE              NAME                      DESCRIPTION             */
-/*                                                                        */
-/*  08-02-2021     William E. Lamie         Initial Version 6.1.8         */
-/*  10-15-2021     William E. Lamie         Modified comment(s),          */
-/*                                            resulting in version 6.1.9  */
-/*  01-31-2022     William E. Lamie         Modified comment(s), removed  */
-/*                                            system state macro, and     */
-/*                                            added missing interrupt     */
-/*                                            control defines,            */
-/*                                            resulting in version 6.1.10 */
-/*  04-25-2022     William E. Lamie         Modified comment(s),          */
-/*                                            resulting in version 6.1.11 */
-/*                                                                        */
 /**************************************************************************/
 
 #ifndef TX_PORT_H
@@ -67,13 +53,13 @@
 #ifdef TX_INCLUDE_USER_DEFINE_FILE
 
 
-/* Yes, include the user defines in tx_user.h. The defines in this file may 
+/* Yes, include the user defines in tx_user.h. The defines in this file may
    alternately be defined on the command line.  */
 
 #include "tx_user.h"
 #endif
 
-/* Define ThreadX basic types for this port.  */ 
+/* Define ThreadX basic types for this port.  */
 
 #define VOID                                    void
 typedef char                                    CHAR;
@@ -82,8 +68,10 @@ typedef int                                     INT;
 typedef unsigned int                            UINT;
 typedef long                                    LONG;
 typedef unsigned long                           ULONG;
+typedef unsigned long long                      ULONG64;
 typedef short                                   SHORT;
 typedef unsigned short                          USHORT;
+#define ULONG64_DEFINED
 
 
 /* Define interrupt control options.  */
@@ -115,8 +103,8 @@ typedef unsigned short                          USHORT;
 #define TX_TIMER_THREAD_STACK_SIZE              1024        /* Default timer thread stack size  */
 #endif
 
-#ifndef TX_TIMER_THREAD_PRIORITY    
-#define TX_TIMER_THREAD_PRIORITY                0           /* Default timer thread priority    */ 
+#ifndef TX_TIMER_THREAD_PRIORITY
+#define TX_TIMER_THREAD_PRIORITY                0           /* Default timer thread priority    */
 #endif
 
 #ifndef TX_TRACE_TIME_SOURCE
@@ -140,7 +128,7 @@ typedef unsigned short                          USHORT;
 #define TX_INLINE_INITIALIZATION
 
 
-/* Determine whether or not stack checking is enabled. By default, ThreadX stack checking is 
+/* Determine whether or not stack checking is enabled. By default, ThreadX stack checking is
    disabled. When the following is defined, ThreadX thread stack checking is enabled.  If stack
    checking is enabled (TX_ENABLE_STACK_CHECKING is defined), the TX_DISABLE_STACK_FILLING
    define is negated, thereby forcing the stack fill which is necessary for the stack checking
@@ -152,13 +140,13 @@ typedef unsigned short                          USHORT;
 
 
 /* Define the TX_THREAD control block extensions for this port. The main reason
-   for the multiple macros is so that backward compatibility can be maintained with 
+   for the multiple macros is so that backward compatibility can be maintained with
    existing ThreadX kernel awareness modules.  */
 
-#define TX_THREAD_EXTENSION_0          
-#define TX_THREAD_EXTENSION_1                  
-#define TX_THREAD_EXTENSION_2          
-#define TX_THREAD_EXTENSION_3          
+#define TX_THREAD_EXTENSION_0
+#define TX_THREAD_EXTENSION_1
+#define TX_THREAD_EXTENSION_2
+#define TX_THREAD_EXTENSION_3
 
 
 /* Define the port extensions of the remaining ThreadX objects.  */
@@ -172,11 +160,11 @@ typedef unsigned short                          USHORT;
 #define TX_TIMER_EXTENSION
 
 
-/* Define the user extension field of the thread control block.  Nothing 
+/* Define the user extension field of the thread control block.  Nothing
    additional is needed for this port so it is defined as white space.  */
 
 #ifndef TX_THREAD_USER_EXTENSION
-#define TX_THREAD_USER_EXTENSION    
+#define TX_THREAD_USER_EXTENSION
 #endif
 
 
@@ -184,8 +172,8 @@ typedef unsigned short                          USHORT;
    tx_thread_shell_entry, and tx_thread_terminate.  */
 
 
-#define TX_THREAD_CREATE_EXTENSION(thread_ptr)                                  
-#define TX_THREAD_DELETE_EXTENSION(thread_ptr)                                  
+#define TX_THREAD_CREATE_EXTENSION(thread_ptr)
+#define TX_THREAD_DELETE_EXTENSION(thread_ptr)
 #define TX_THREAD_COMPLETED_EXTENSION(thread_ptr)
 #define TX_THREAD_TERMINATED_EXTENSION(thread_ptr)
 
@@ -212,16 +200,16 @@ typedef unsigned short                          USHORT;
 #define TX_TIMER_DELETE_EXTENSION(timer_ptr)
 
 
-/* Define ThreadX interrupt lockout and restore macros for protection on 
-   access of critical kernel information.  The restore interrupt macro must 
-   restore the interrupt posture of the running thread prior to the value 
+/* Define ThreadX interrupt lockout and restore macros for protection on
+   access of critical kernel information.  The restore interrupt macro must
+   restore the interrupt posture of the running thread prior to the value
    present prior to the disable macro.  In most cases, the save area macro
    is used to define a local function save area for the disable and restore
    macros.  */
 
 /* UINT   _tx_thread_interrupt_control(UINT new_posture); */
 
-#pragma inline_asm _tx_thread_interrupt_disable 
+#pragma inline_asm _tx_thread_interrupt_disable
 static UINT _tx_thread_interrupt_disable(void){
     MVFC PSW,R1  ;
     CLRPSW I     ;
@@ -271,8 +259,8 @@ static void _tx_thread_system_return_inline(void)
 /* Define the version ID of ThreadX.  This may be utilized by the application.  */
 
 #ifdef TX_THREAD_INIT
-CHAR                            _tx_version_id[] = 
-                                    "Copyright (c) 2024 Microsoft Corporation.  *  ThreadX RXv1/CCRX Version 6.4.2 *";
+CHAR                            _tx_version_id[] =
+                                    "(c) 2024 Microsoft Corp. (c) 2026-present Eclipse ThreadX contributors.  *  ThreadX RXv1/CCRX Version 6.5.0.202601 *";
 #else
 extern  CHAR                    _tx_version_id[];
 #endif
diff --git a/ports/rxv1/ccrx/readme_threadx.txt b/ports/rxv1/ccrx/readme_threadx.txt
index a104a9f2..f0e11b02 100644
--- a/ports/rxv1/ccrx/readme_threadx.txt
+++ b/ports/rxv1/ccrx/readme_threadx.txt
@@ -16,25 +16,25 @@ for the RXv1
 
 3.  System Initialization
 
-The system entry point using Renesas tools is at the label _PowerON_Reset_PC. 
-Use the resetprg.c file that comes with your release. Most notable is that Threadx 
-applications run in supervisor mode and do not use user mode. Hence switching to 
+The system entry point using Renesas tools is at the label _PowerON_Reset_PC.
+Use the resetprg.c file that comes with your release. Most notable is that Threadx
+applications run in supervisor mode and do not use user mode. Hence switching to
 user mode has been commented out.
 
 The vector area is set up using either intprg.c or in the file tx_initialize_low_level.src.
-The file tx_initialize_low_level.src is responsible for setting up various system data 
-structures, interrupt vectors, and a periodic timer. This is the ideal place add 
+The file tx_initialize_low_level.src is responsible for setting up various system data
+structures, interrupt vectors, and a periodic timer. This is the ideal place add
 application specific hardware initialization code.
 
-ThreadX utilizes CMT0 as a periodic timer interrupt source. The CMT0 interrupt is 
-typically setup for 10ms periodic interrupts and the interrupt priority level is set to 
+ThreadX utilizes CMT0 as a periodic timer interrupt source. The CMT0 interrupt is
+typically setup for 10ms periodic interrupts and the interrupt priority level is set to
 level 5 with the symbol CMT_RX_CFG_IPR in r_cmt_rx_config.h of Renesas CMT timer module
 (r_cmt_rx). You may change any of the timer parameters to suit your needs.
 
-In addition, _tx_initialize_low_level determines the first available address for use by 
-the application, which is supplied as the sole input parameter to your application 
-definition function, tx_application_define(). The mechanism is implemented by creating the 
-FREEMEM section, this section should be linked last in the RAM area. tx_initialize_low_level 
+In addition, _tx_initialize_low_level determines the first available address for use by
+the application, which is supplied as the sole input parameter to your application
+definition function, tx_application_define(). The mechanism is implemented by creating the
+FREEMEM section, this section should be linked last in the RAM area. tx_initialize_low_level
 will pick up the starting label of this section and put it in the global variable:
 _tx_initialize_unused_memory
 
@@ -42,15 +42,15 @@ _tx_initialize_unused_memory
 4.  Context Switch, Register Usage and Stack Frames
 
 The RXv1 port for ThreadX uses the first software interrupt, SWINT, i.e., interrupt #27,
-to perform context switch with the interrupt priority level 1. This ISR is thus reserved 
-when using ThreadX and the SWINT should not be manipulated in any way by the application. 
-The port will setup the interrupt within _tx_initialize_low_level and the compiler will 
-automatically install the necessary interrupt vector. As such no additional initialization 
+to perform context switch with the interrupt priority level 1. This ISR is thus reserved
+when using ThreadX and the SWINT should not be manipulated in any way by the application.
+The port will setup the interrupt within _tx_initialize_low_level and the compiler will
+automatically install the necessary interrupt vector. As such no additional initialization
 is necessary by the application.
 
 The following defines the saved context stack frame used by the ThreadX port. The
-state of the CPU registers at the time of a context switch is saved on the running 
-thread's stack The top of the suspended thread's stack is pointed to by 
+state of the CPU registers at the time of a context switch is saved on the running
+thread's stack The top of the suspended thread's stack is pointed to by
 tx_thread_stack_ptr in the associated thread control block TX_THREAD.
 
     Offset        Interrupted Stack Frame
@@ -73,24 +73,24 @@ tx_thread_stack_ptr in the associated thread control block TX_THREAD.
      0x44                   R2
      0x48                   PC - return address
      0x4C                   PSW
-     
+
 Note: By default ccrx does not save the state of the accumulator register ACC0
 when entering an ISR. This means that if the ISR uses any of the DSP instructions the
 content of the register could be corrupted. Saving and restoring of the accumulator
 can be enabled by adding the -save_acc command line option.
 
-     
+
 5.  Improving Performance
 
-The distribution version of ThreadX is built without any compiler 
-optimizations.  This makes it easy to debug because you can trace or set 
-breakpoints inside of ThreadX itself.  Of course, this costs some 
-performance.  To make ThreadX run faster, you can change the ThreadX Library 
-project to disable debug information and enable the desired optimizations.  
+The distribution version of ThreadX is built without any compiler
+optimizations.  This makes it easy to debug because you can trace or set
+breakpoints inside of ThreadX itself.  Of course, this costs some
+performance.  To make ThreadX run faster, you can change the ThreadX Library
+project to disable debug information and enable the desired optimizations.
 
-In addition, you can eliminate the ThreadX basic API error checking by 
-compiling your application code with the symbol TX_DISABLE_ERROR_CHECKING 
-defined before tx_api.h is included. 
+In addition, you can eliminate the ThreadX basic API error checking by
+compiling your application code with the symbol TX_DISABLE_ERROR_CHECKING
+defined before tx_api.h is included.
 
 
 6. Timer Processing
@@ -102,18 +102,18 @@ a Renesas Fit CMT periodic timer module (r_cmt_rx) is used as the timer source.
 
 7.  Interrupt Handling
 
-Interrupt handling is unaffected by the ThreadX port as such user interrupts can be 
+Interrupt handling is unaffected by the ThreadX port as such user interrupts can be
 written according to the toolchain's documentation. It is recommended not to use interrupt
 priority 1 as this is the priority of the context switch interrupt. However using interrupt
-priority 1 won't cause any negative side effects but doing so may slightly reduce 
+priority 1 won't cause any negative side effects but doing so may slightly reduce
 performance. Please refer to the toolchain documentation for additional details on how to
 define interrupt service routines.
 
 
 8. Execution Profiling
 
-The RX port adds support for the Execution Profiling Kit (EPK). The EPK consists 
-of the files tx_execution_profile.c and tx_execution_profile.h. See the documentation 
+The RX port adds support for the Execution Profiling Kit (EPK). The EPK consists
+of the files tx_execution_profile.c and tx_execution_profile.h. See the documentation
 of the EPK for generic usage details.
 
 To add the EPK to your RXv1 release make the following modifications:
@@ -132,7 +132,7 @@ typedef unsigned long long              EXECUTION_TIME;
 typedef unsigned long                   EXECUTION_TIME;
 #define TX_EXECUTION_MAX_TIME_SOURCE    0xFFFF
 #endif
-                                        
+
 /* Define basic constants for the execution profile kit.  */
 
 #define TX_EXECUTION_TIME_SOURCE         (EXECUTION_TIME)  *((USHORT *) 0x8800A)
@@ -155,14 +155,14 @@ information associated with this specific port of ThreadX:
             tx_thread_schedule.src              Added low power support
 
 01-31-2022  Release 6.1.10 changes:
-            tx_port.h                           Removed system state macro, and added 
+            tx_port.h                           Removed system state macro, and added
                                                 missing interrupt control defines
             tx_timer_interrupt.src              Added missing thread preemption logic
 
 10-15-2021  Release 6.1.9 changes:
-            tx_thread_context_restore.src       Removed unnecessary stack type placement 
+            tx_thread_context_restore.src       Removed unnecessary stack type placement
             tx_thread_schedule.src              Removed unnecessary stack type checking
-            tx_thread_stack_build.src           Removed unnecessary stack type placement 
+            tx_thread_stack_build.src           Removed unnecessary stack type placement
 
 08-02-2021  Initial ThreadX release for the RXv1 using CC-RXX tools, version 6.1.8
 
diff --git a/ports/rxv1/ccrx/src/tx_initialize_low_level.src b/ports/rxv1/ccrx/src/tx_initialize_low_level.src
index a460a4f0..5624e70d 100644
--- a/ports/rxv1/ccrx/src/tx_initialize_low_level.src
+++ b/ports/rxv1/ccrx/src/tx_initialize_low_level.src
@@ -1,10 +1,10 @@
 ;/***************************************************************************
-; * Copyright (c) 2024 Microsoft Corporation 
-; * 
+; * Copyright (c) 2024 Microsoft Corporation
+; *
 ; * This program and the accompanying materials are made available under the
 ; * terms of the MIT License which is available at
 ; * https://opensource.org/licenses/MIT.
-; * 
+; *
 ; * SPDX-License-Identifier: MIT
 ; **************************************************************************/
 ;
@@ -26,7 +26,7 @@
     IEN03    .EQU  87203H
 
     .SECTION P,CODE
-    
+
 ;
 ;/**************************************************************************/
 ;/*                                                                        */
@@ -97,7 +97,7 @@ __tx_initialize_low_level:
     OR       #(1 << 3), r2
     MOV.B    r2, [r1]
 
-    RTS                                    
+    RTS
 
     .SECTION    FREEMEM ,DATA, ALIGN=4
 free_mem_start:
diff --git a/ports/rxv1/ccrx/src/tx_thread_context_restore.src b/ports/rxv1/ccrx/src/tx_thread_context_restore.src
index eaf1eed1..be536daf 100644
--- a/ports/rxv1/ccrx/src/tx_thread_context_restore.src
+++ b/ports/rxv1/ccrx/src/tx_thread_context_restore.src
@@ -1,10 +1,10 @@
 ;/***************************************************************************
-; * Copyright (c) 2024 Microsoft Corporation 
-; * 
+; * Copyright (c) 2024 Microsoft Corporation
+; *
 ; * This program and the accompanying materials are made available under the
 ; * terms of the MIT License which is available at
 ; * https://opensource.org/licenses/MIT.
-; * 
+; *
 ; * SPDX-License-Identifier: MIT
 ; **************************************************************************/
 ;
@@ -104,7 +104,7 @@ __tx_thread_context_restore:
      MOV.L    [R1], R2
      SUB      #1, R2
      MOV.L    R2,[R1]
-     BEQ      __tx_thread_not_nested_restore 
+     BEQ      __tx_thread_not_nested_restore
 
 ;
 ;    /* Interrupts are nested.  */
@@ -125,17 +125,17 @@ __tx_thread_not_nested_restore:
 ;    else if (((_tx_thread_current_ptr) && (_tx_thread_current_ptr == _tx_thread_execute_ptr))
 ;               || (_tx_thread_preempt_disable))
 ;    {
-    
+
      MOV.L    #__tx_thread_current_ptr, R1       ; Pickup current thread ptr address
      MOV.L    [R1], R2
      CMP      #0, R2
-     BEQ      __tx_thread_idle_system_restore 
-     
+     BEQ      __tx_thread_idle_system_restore
+
      MOV.L    #__tx_thread_preempt_disable, R3   ; Pick up preempt disable flag
      MOV.L    [R3], R3
      CMP      #0, R3
      BNE      __tx_thread_no_preempt_restore     ; If pre-empt disable flag set, we simply return to the original point of interrupt regardless
-     
+
      MOV.L    #__tx_thread_execute_ptr, R3       ; (_tx_thread_current_ptr != _tx_thread_execute_ptr)
      CMP      [R3], R2
      BNE      __tx_thread_preempt_restore        ; Jump to pre-empt restoring
diff --git a/ports/rxv1/ccrx/src/tx_thread_context_save.src b/ports/rxv1/ccrx/src/tx_thread_context_save.src
index c4f78b3c..9fb1a70a 100644
--- a/ports/rxv1/ccrx/src/tx_thread_context_save.src
+++ b/ports/rxv1/ccrx/src/tx_thread_context_save.src
@@ -1,18 +1,18 @@
 ;/***************************************************************************
-; * Copyright (c) 2024 Microsoft Corporation 
-; * 
+; * Copyright (c) 2024 Microsoft Corporation
+; *
 ; * This program and the accompanying materials are made available under the
 ; * terms of the MIT License which is available at
 ; * https://opensource.org/licenses/MIT.
-; * 
+; *
 ; * SPDX-License-Identifier: MIT
 ; **************************************************************************/
 ;
 ;
 ;/**************************************************************************/
 ;/**************************************************************************/
-;/**                                                                       */ 
-;/** ThreadX Component                                                     */ 
+;/**                                                                       */
+;/** ThreadX Component                                                     */
 ;/**                                                                       */
 ;/**   Thread                                                              */
 ;/**                                                                       */
@@ -104,7 +104,7 @@ __tx_thread_context_save:
     BEQ     __tx_thread_not_nested_save
 ;
 ;    /* Nested interrupt condition.  */
-;   
+;
     ADD   #1, r2                                 ; _tx_thread_system_state++
     MOV.L   r2, [r1]
 
@@ -129,7 +129,7 @@ __tx_thread_not_nested_save:
 
     MOV.L   #__tx_thread_current_ptr, R2         ; Pickup current thread pointer
     MOV.L   [R2], R2
-    CMP     #0,R2                                ; Is it NULL?  
+    CMP     #0,R2                                ; Is it NULL?
     BEQ      __tx_thread_idle_system_save        ; Yes, idle system is running - idle restore
 ;
 ;    /* Move stack frame over to the current threads stack.  */
@@ -149,7 +149,7 @@ __tx_thread_not_nested_save:
     MOV.L   R3, [-R1]                            ; Save R3 on thread stack
     MOV.L   R15, [-R1]                           ; Save R15 on thread stack
     MOV.L   R14, [-R1]                           ; Save R14 on thread stack
-	
+
     POP     R2                                   ; Pick up return address from interrupt stack
     ADD     #16, R0, R0                          ; Correct interrupt stack pointer back to the bottom
     MVTC    R1, USP                              ; Set user/thread stack pointer
diff --git a/ports/rxv1/ccrx/src/tx_thread_interrupt_control.src b/ports/rxv1/ccrx/src/tx_thread_interrupt_control.src
index 9724dad3..048952a5 100644
--- a/ports/rxv1/ccrx/src/tx_thread_interrupt_control.src
+++ b/ports/rxv1/ccrx/src/tx_thread_interrupt_control.src
@@ -1,10 +1,10 @@
 ;/***************************************************************************
-; * Copyright (c) 2024 Microsoft Corporation 
-; * 
+; * Copyright (c) 2024 Microsoft Corporation
+; *
 ; * This program and the accompanying materials are made available under the
 ; * terms of the MIT License which is available at
 ; * https://opensource.org/licenses/MIT.
-; * 
+; *
 ; * SPDX-License-Identifier: MIT
 ; **************************************************************************/
 ;
@@ -81,20 +81,20 @@ __tx_thread_interrupt_control:
 ;
 ;    /* Pickup current interrupt lockout posture.  */
 ;
-    
+
     MVFC      PSW, R2           ; Save PSW to R2
     MOV.L     R2, R3            ; Make a copy of PSW in r3
-    
+
 ;
 ;    /* Apply the new interrupt posture.  */
 ;
-    
+
     BTST    #16, R1             ; Test I bit of PSW of "new posture"
     BMNE    #16, R2             ; Conditionally set I bit of intermediate posture
-    
+
     MVTC    R2, PSW             ; Save intermediate posture to PSW
-    
-    MOV.L   R3,R1               ; Get original SR 
+
+    MOV.L   R3,R1               ; Get original SR
     RTS                         ; Return to caller
 ;}
     .END
diff --git a/ports/rxv1/ccrx/src/tx_thread_schedule.src b/ports/rxv1/ccrx/src/tx_thread_schedule.src
index 1d19b5fa..6281290e 100644
--- a/ports/rxv1/ccrx/src/tx_thread_schedule.src
+++ b/ports/rxv1/ccrx/src/tx_thread_schedule.src
@@ -1,10 +1,10 @@
 ;/***************************************************************************
-; * Copyright (c) 2024 Microsoft Corporation 
-; * 
+; * Copyright (c) 2024 Microsoft Corporation
+; *
 ; * This program and the accompanying materials are made available under the
 ; * terms of the MIT License which is available at
 ; * https://opensource.org/licenses/MIT.
-; * 
+; *
 ; * SPDX-License-Identifier: MIT
 ; **************************************************************************/
 ;
@@ -86,9 +86,9 @@
 ;/*                                            resulting in version 6.1.9  */
 ;/*  01-31-2022     William E. Lamie         Modified comment(s),          */
 ;/*                                            resulting in version 6.1.10 */
-;/*  04-25-2022     William E. Lamie         Modified comment(s), and      */ 
-;/*                                            added low power support,    */ 
-;/*                                            resulting in version 6.1.11 */ 
+;/*  04-25-2022     William E. Lamie         Modified comment(s), and      */
+;/*                                            added low power support,    */
+;/*                                            resulting in version 6.1.11 */
 ;/*                                                                        */
 ;/**************************************************************************/
 ;VOID   _tx_thread_schedule(VOID)
@@ -107,7 +107,7 @@ __tx_thread_schedule_loop:
     MOV.L    [R1],R2                             ; Pickup next thread to execute
     CMP      #0,R2                               ; Is it NULL?
     BNE      __tx_thread_thread_ready            ; Not NULL, schedule the thread
-                                                 ; Idle system - no thread is ready    
+                                                 ; Idle system - no thread is ready
 .IF TX_LOW_POWER==1
     MOV.L    #__tx_thread_preempt_disable, R1    ; Load prempt disable flag.
     MOV.L    [R1], R2
@@ -136,7 +136,7 @@ __tx_thread_thread_ready:
 ;
 ;    }
 ;    while(_tx_thread_execute_ptr == TX_NULL);
-;    
+;
 ;    /* Yes! We have a thread to execute. Note that interrupts are locked out at this point.  */
 ;
 ;    /* Setup the current thread pointer.  */
@@ -171,7 +171,7 @@ __tx_thread_thread_ready:
     POPM   R6-R13                                ; Recover interrupt stack frame
     POPM   R14-R15
     POPM   R3-R5
-    POPM   R1-R2    
+    POPM   R1-R2
     RTE                                          ; Return to point of interrupt, this restores PC and PSW
 
 ;}
diff --git a/ports/rxv1/ccrx/src/tx_thread_stack_build.src b/ports/rxv1/ccrx/src/tx_thread_stack_build.src
index 79df118b..a96cdad8 100644
--- a/ports/rxv1/ccrx/src/tx_thread_stack_build.src
+++ b/ports/rxv1/ccrx/src/tx_thread_stack_build.src
@@ -1,10 +1,10 @@
 ;/***************************************************************************
-; * Copyright (c) 2024 Microsoft Corporation 
-; * 
+; * Copyright (c) 2024 Microsoft Corporation
+; *
 ; * This program and the accompanying materials are made available under the
 ; * terms of the MIT License which is available at
 ; * https://opensource.org/licenses/MIT.
-; * 
+; *
 ; * SPDX-License-Identifier: MIT
 ; **************************************************************************/
 ;
@@ -83,10 +83,10 @@
     .GLB __tx_thread_stack_build
 __tx_thread_stack_build:
 ;
-;       
+;
 ;    /* Build an interrupt frame.  The form of the fake interrupt stack
 ;       on the Renesas RX should look like the following after it is built:
-;       
+;
 ;  Stack Top:           ACC0
 ;                       R6
 ;                       R7
@@ -139,11 +139,11 @@ __tx_thread_stack_build:
     MOV.L R4,[-R3]
 
 ;    /* Setup stack pointer.  */
-;    thread_ptr -> tx_thread_stack_ptr =  R1;   
+;    thread_ptr -> tx_thread_stack_ptr =  R1;
     MOV.L R3, 8[R1]
                                                  ; Store initial SP in thread control block
     RTS
-                                 
+
 ;}
     .END
 
diff --git a/ports/rxv1/ccrx/src/tx_thread_system_return.src b/ports/rxv1/ccrx/src/tx_thread_system_return.src
index c1363639..989235a7 100644
--- a/ports/rxv1/ccrx/src/tx_thread_system_return.src
+++ b/ports/rxv1/ccrx/src/tx_thread_system_return.src
@@ -1,10 +1,10 @@
 ;/***************************************************************************
-; * Copyright (c) 2024 Microsoft Corporation 
-; * 
+; * Copyright (c) 2024 Microsoft Corporation
+; *
 ; * This program and the accompanying materials are made available under the
 ; * terms of the MIT License which is available at
 ; * https://opensource.org/licenses/MIT.
-; * 
+; *
 ; * SPDX-License-Identifier: MIT
 ; **************************************************************************/
 ;
diff --git a/ports/rxv1/ccrx/src/tx_timer_interrupt.src b/ports/rxv1/ccrx/src/tx_timer_interrupt.src
index a386e50a..b76329ee 100644
--- a/ports/rxv1/ccrx/src/tx_timer_interrupt.src
+++ b/ports/rxv1/ccrx/src/tx_timer_interrupt.src
@@ -1,10 +1,10 @@
 ;/***************************************************************************
-; * Copyright (c) 2024 Microsoft Corporation 
-; * 
+; * Copyright (c) 2024 Microsoft Corporation
+; *
 ; * This program and the accompanying materials are made available under the
 ; * terms of the MIT License which is available at
 ; * https://opensource.org/licenses/MIT.
-; * 
+; *
 ; * SPDX-License-Identifier: MIT
 ; **************************************************************************/
 ;
@@ -95,8 +95,8 @@
 ;/*  10-15-2021     William E. Lamie         Modified comment(s),          */
 ;/*                                            resulting in version 6.1.9  */
 ;/*  01-31-2022     William E. Lamie         Modified comment(s), and      */
-;/*                                            added missing thread        */ 
-;/*                                            preemption logic,           */ 
+;/*                                            added missing thread        */
+;/*                                            preemption logic,           */
 ;/*                                            resulting in version 6.1.10 */
 ;/*  04-25-2022     William E. Lamie         Modified comment(s),          */
 ;/*                                            resulting in version 6.1.11 */
@@ -164,7 +164,7 @@ __tx_timer_no_time_slice:
     MOV.L   [R2+], R1                            ; Pickup timer list entry, _tx_timer_current_ptr++
     CMP     #0, R1                               ; Is timer pointer NULL?
     BEQ     __tx_timer_no_timer                  ; Yes, no timer has expired
-        
+
 ;
 ;        /* Set expiration flag.  */
 ;        _tx_timer_expired =  TX_TRUE;
@@ -182,7 +182,7 @@ __tx_timer_no_timer:
 ;        /* No timer expired, increment the timer pointer.  */
 ;        _tx_timer_current_ptr++;
 ;
-;       /* R2 already contains __tx_timer_current_ptr++ */                         
+;       /* R2 already contains __tx_timer_current_ptr++ */
 ;
 ;        /* Check for wrap-around.  */
 ;        if (_tx_timer_current_ptr == _tx_timer_list_end)
@@ -201,9 +201,9 @@ __tx_timer_no_timer:
 ;    }
 ;
 __tx_timer_skip_wrap:
-    MOV.L   #__tx_timer_current_ptr,R1     
+    MOV.L   #__tx_timer_current_ptr,R1
     MOV.L   R2, [R1]                             ; Store in updated pointer in  _tx_timer_current_ptr
-    
+
 __tx_timer_done:
 ;
 ;    /* See if anything has expired.  */
@@ -237,14 +237,14 @@ __tx_timer_dont_activate:
 ;    /* Did time slice expire?  */
 ;    if (_tx_timer_expired_time_slice)
 ;    {
-; 
+;
     MOV.L   #__tx_timer_expired_time_slice, R1   ; Pickup time-slice expired flag addr
     MOV.L   [R1], R1                             ; Pickup actual flag
     CMP     #0,R1                                ; Has time-slice expired?
     BEQ      __tx_timer_not_ts_expiration        ; No, skip time-slice expiration
 ;
 ;        /* Time slice interrupted thread.  */
-;        _tx_thread_time_slice(); 
+;        _tx_thread_time_slice();
 
     BSR     __tx_thread_time_slice               ; Call time-slice processing