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| author | Frédéric Desbiens <[email protected]> | 2026-03-06 19:27:49 +0100 |
|---|---|---|
| committer | GitHub <[email protected]> | 2026-03-06 19:27:49 +0100 |
| commit | 3726d7906b4808bfec7855fc088e073199df9120 (patch) | |
| tree | 8789bfd03d1d49e1967e80d04aa4ff606fda43eb /ports/xtensa/xcc/src/xtensa_init.c | |
| parent | 4b6e8100d932a3a67b34c6eb17f84f3bffb9e2ae (diff) | |
| parent | c3259a216026372e3833dd8996a68f77e8595fbd (diff) | |
Merge pull request #510 from eclipse-threadx/devv6.5.0.202601_rel
Merge changes ahead of the v6.5.0.202601 release
Diffstat (limited to 'ports/xtensa/xcc/src/xtensa_init.c')
| -rw-r--r-- | ports/xtensa/xcc/src/xtensa_init.c | 8 |
1 files changed, 1 insertions, 7 deletions
diff --git a/ports/xtensa/xcc/src/xtensa_init.c b/ports/xtensa/xcc/src/xtensa_init.c index 298ca28d..d153ad35 100644 --- a/ports/xtensa/xcc/src/xtensa_init.c +++ b/ports/xtensa/xcc/src/xtensa_init.c @@ -27,12 +27,6 @@ /* */ /* Xtensa initialization routines. */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 12-31-2020 Cadence Design Systems Initial Version 6.1.3 */ -/* */ /**************************************************************************/ @@ -49,7 +43,7 @@ uint32_t xt_tick_divisor = 0; /* cached number of cycles per tick */ /* -Compute and initialize at run-time the tick divisor (the number of +Compute and initialize at run-time the tick divisor (the number of processor clock cycles in an RTOS tick, used to set the tick timer). Called when the processor clock frequency is not known at compile-time. */ |