diff options
Diffstat (limited to 'ports_module/cortex_a35')
129 files changed, 1626 insertions, 1805 deletions
diff --git a/ports_module/cortex_a35/ac6/example_build/sample_threadx/.cproject b/ports_module/cortex_a35/ac6/example_build/sample_threadx/.cproject index a49dadd2..8a32c271 100644 --- a/ports_module/cortex_a35/ac6/example_build/sample_threadx/.cproject +++ b/ports_module/cortex_a35/ac6/example_build/sample_threadx/.cproject @@ -1,174 +1,174 @@ <?xml version="1.0" encoding="UTF-8" standalone="no"?> <?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage"> - + <storageModule moduleId="org.eclipse.cdt.core.settings"> - + <cconfiguration id="com.arm.eclipse.build.config.v6.exe.debug.base.515451048"> - + <storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.arm.eclipse.build.config.v6.exe.debug.base.515451048" moduleId="org.eclipse.cdt.core.settings" name="Debug"> - + <externalSettings/> - + <extensions> - + <extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/> - + <extension id="com.arm.eclipse.builder.armcc.error" point="org.eclipse.cdt.core.ErrorParser"/> - + <extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/> - + </extensions> - + </storageModule> - + <storageModule moduleId="cdtBuildSystem" version="4.0.0"> - + <configuration artifactExtension="axf" artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.debug" cleanCommand="clean" description="" id="com.arm.eclipse.build.config.v6.exe.debug.base.515451048" name="Debug" parent="com.arm.eclipse.build.config.v6.exe.debug.base"> - + <folderInfo id="com.arm.eclipse.build.config.v6.exe.debug.base.515451048." name="/" resourcePath=""> - + <toolChain id="com.arm.toolchain.v6.exe.debug.base.var.arm_compiler_6-6.1388095870" name="Arm Compiler 6" superClass="com.arm.toolchain.v6.exe.debug.base.var.arm_compiler_6-6"> - + <option id="com.arm.toolchain.v6.base.options.target.cpu_fpu.689426261" superClass="com.arm.toolchain.v6.base.options.target.cpu_fpu" useByScannerDiscovery="false" value="Cortex-A35.AArch64.ARMv8.Neon.Crypto" valueType="string"/> - + <option id="com.arm.toolchain.v6.base.options.debug.level.1729514272" name="Debug Level" superClass="com.arm.toolchain.v6.base.options.debug.level" useByScannerDiscovery="false" value="com.arm.tool.c.compiler.v6.base.options.debug.level.std" valueType="enumerated"/> - + <targetPlatform id="com.arm.toolchain.v6.exe.debug.base.var.arm_compiler_6-6.1388095870.857809581" name=""/> - + <builder autoBuildTarget="all" buildPath="${workspace_loc:/sample_threadx}/Debug" cleanBuildTarget="clean" enableAutoBuild="false" enableCleanBuild="true" enabledIncrementalBuild="true" id="com.arm.toolchain.v6.builder.1944684744" incrementalBuildTarget="all" keepEnvironmentInBuildfile="false" managedBuildOn="true" name="Gnu Make Builder" parallelBuildOn="true" parallelizationNumber="8" superClass="com.arm.toolchain.v6.builder"/> - + <tool id="com.arm.tool.c.compiler.v6.base.var.arm_compiler_6-6.259341383" name="Arm C Compiler 6" superClass="com.arm.tool.c.compiler.v6.base.var.arm_compiler_6-6"> - + <option id="com.arm.tool.c.compiler.v6.base.option.cpu.96377009" name="CPU (-mcpu)" superClass="com.arm.tool.c.compiler.v6.base.option.cpu" useByScannerDiscovery="true" value="cortex-a35" valueType="string"/> - + <option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.arm.tool.c.compiler.v6.base.option.defmac.1975445896" name="Define macro (-D)" superClass="com.arm.tool.c.compiler.v6.base.option.defmac" useByScannerDiscovery="false" valueType="definedSymbols"> - + <listOptionValue builtIn="false" value="STANDALONE"/> - + </option> - + <option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.arm.tool.c.compiler.v6.base.option.incpath.1271571516" name="Include path (-I)" superClass="com.arm.tool.c.compiler.v6.base.option.incpath" useByScannerDiscovery="false" valueType="includePath"> - + <listOptionValue builtIn="false" value=""${workspace_loc:/tx/inc_generic}""/> - + <listOptionValue builtIn="false" value=""${workspace_loc:/tx/inc_port}""/> - + </option> - + <option id="com.arm.tool.c.compiler.v6.base.options.debug.level.1548640167" name="Debug Level" superClass="com.arm.tool.c.compiler.v6.base.options.debug.level" useByScannerDiscovery="true" value="com.arm.tool.c.compiler.v6.base.options.debug.level.std" valueType="enumerated"/> - + <inputType id="com.arm.tool.c.compiler.v6.base.input.815952161" superClass="com.arm.tool.c.compiler.v6.base.input"/> - + </tool> - + <tool id="com.arm.tool.cpp.compiler.v6.base.var.arm_compiler_6-6.1091536604" name="Arm C++ Compiler 6" superClass="com.arm.tool.cpp.compiler.v6.base.var.arm_compiler_6-6"> - + <option id="com.arm.tool.c.compiler.v6.base.options.debug.level.1962633763" name="Debug Level" superClass="com.arm.tool.c.compiler.v6.base.options.debug.level" useByScannerDiscovery="true" value="com.arm.tool.c.compiler.v6.base.options.debug.level.std" valueType="enumerated"/> - + </tool> - + <tool id="com.arm.tool.assembler.v6.base.var.arm_compiler_6-6.1147447905" name="Arm Assembler 6" superClass="com.arm.tool.assembler.v6.base.var.arm_compiler_6-6"> - + <option id="com.arm.tool.assembler.v6.base.option.cpu.269795998" name="CPU (-mcpu)" superClass="com.arm.tool.assembler.v6.base.option.cpu" useByScannerDiscovery="false" value="cortex-a35" valueType="string"/> - + <option id="com.arm.tool.assembler.v6.base.options.debug.level.1521551718" name="Debug Level" superClass="com.arm.tool.assembler.v6.base.options.debug.level" useByScannerDiscovery="false" value="com.arm.tool.assembler.v6.base.options.debug.level.std" valueType="enumerated"/> - + <option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="true" id="com.arm.tool.assembler.v6.base.option.defmac.281085002" name="Define macro (-D)" superClass="com.arm.tool.assembler.v6.base.option.defmac" useByScannerDiscovery="false" valueType="definedSymbols"/> - + <inputType id="com.arm.tool.assembler.v6.base.input.1000911913" superClass="com.arm.tool.assembler.v6.base.input"/> - + </tool> - + <tool id="com.arm.tool.c.linker.v6.base.var.arm_compiler_6-6.1807144931" name="Arm Linker 6" superClass="com.arm.tool.c.linker.v6.base.var.arm_compiler_6-6"> - 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+ <option id="com.arm.tool.c.linker.option.totals.428431324" name="List total code and data sizes of output image (--info=totals)" superClass="com.arm.tool.c.linker.option.totals" useByScannerDiscovery="false" value="true" valueType="boolean"/> - + <option id="com.arm.tool.c.linker.option.redirectoutput.259431691" name="Redirect diagnostics output to file (--list)" superClass="com.arm.tool.c.linker.option.redirectoutput" useByScannerDiscovery="false" value="sample_threadx.map" valueType="string"/> - + <option id="com.arm.tool.c.linker.option.elim.532237314" name="List unused sections that are eliminated (--info=unused)" superClass="com.arm.tool.c.linker.option.elim" useByScannerDiscovery="false" value="true" valueType="boolean"/> - + <option id="com.arm.tool.c.linker.option.compress.1449950796" name="Print RW compression information (--info=compression)" superClass="com.arm.tool.c.linker.option.compress" useByScannerDiscovery="false" value="true" valueType="boolean"/> - + <option id="com.arm.tool.c.linker.option.stack.1835435506" name="List stack usage of global symbols (--info=stack)" superClass="com.arm.tool.c.linker.option.stack" useByScannerDiscovery="false" value="true" valueType="boolean"/> - + <option id="com.arm.tool.c.linker.option.inlineinfo.1898593362" name="List functions inlined by linker (--info=inline)" superClass="com.arm.tool.c.linker.option.inlineinfo" useByScannerDiscovery="false" value="true" valueType="boolean"/> - + <option id="com.arm.tool.c.linker.option.callgraph.1505673040" name="Generate call graph (--callgraph)" superClass="com.arm.tool.c.linker.option.callgraph" useByScannerDiscovery="false" value="true" valueType="boolean"/> - + <option id="com.arm.tool.c.linker.option.graphfile.1311318964" name="Callgraph file (--callgraph_file)" superClass="com.arm.tool.c.linker.option.graphfile" useByScannerDiscovery="false" value="callgraph" valueType="string"/> - + </tool> - + <tool id="com.arm.tool.librarian.v6.base.var.arm_compiler_6-6.1243987688" name="Arm Librarian 6" superClass="com.arm.tool.librarian.v6.base.var.arm_compiler_6-6"/> - + </toolChain> - + </folderInfo> - + <sourceEntries> - + <entry excluding="startup_el3.S|startup_el2.S|startup_el1.S|startup_old.S" flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name=""/> - + </sourceEntries> - + </configuration> - + </storageModule> - + <storageModule moduleId="org.eclipse.cdt.core.externalSettings"/> - + </cconfiguration> - + </storageModule> - + <storageModule moduleId="cdtBuildSystem" version="4.0.0"> - + <project id="sample_threadx.com.arm.eclipse.build.project.v6.exe.1027551600" name="Executable"/> - + </storageModule> - + <storageModule moduleId="scannerConfiguration"> - + <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/> - + </storageModule> - + <storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/> - + <storageModule moduleId="refreshScope" versionNumber="2"> - + <configuration configurationName="Debug"> - + <resource resourceType="PROJECT" workspacePath="/sample_threadx"/> - + </configuration> - + <configuration configurationName="Release"> - + <resource resourceType="PROJECT" workspacePath="/sample_threadx"/> - + </configuration> - + </storageModule> - + <storageModule moduleId="org.eclipse.cdt.make.core.buildtargets"/> - + <storageModule moduleId="com.arm.projectSettings" version="6.0.0"/> - + <storageModule moduleId="org.eclipse.cdt.internal.ui.text.commentOwnerProjectMappings"/> - + </cproject> diff --git a/ports_module/cortex_a35/ac6/example_build/sample_threadx/GICv3.h b/ports_module/cortex_a35/ac6/example_build/sample_threadx/GICv3.h index 23bc7fd8..dfe37586 100644 --- a/ports_module/cortex_a35/ac6/example_build/sample_threadx/GICv3.h +++ b/ports_module/cortex_a35/ac6/example_build/sample_threadx/GICv3.h @@ -3,7 +3,7 @@ * * Copyright (c) 2014-2017 Arm Limited (or its affiliates). All rights reserved. * Use, modification and redistribution of this file is subject to your possession of a - * valid End User License Agreement for the Arm Product of which these examples are part of + * valid End User License Agreement for the Arm Product of which these examples are part of * and your compliance with all applicable terms and conditions of such licence agreement. */ #ifndef GICV3_h diff --git a/ports_module/cortex_a35/ac6/example_build/sample_threadx/GICv3_gicc.h b/ports_module/cortex_a35/ac6/example_build/sample_threadx/GICv3_gicc.h index 8e6f0acc..beaa9157 100644 --- a/ports_module/cortex_a35/ac6/example_build/sample_threadx/GICv3_gicc.h +++ b/ports_module/cortex_a35/ac6/example_build/sample_threadx/GICv3_gicc.h @@ -3,7 +3,7 @@ * * Copyright (c) 2014-2017 Arm Limited (or its affiliates). All rights reserved. * Use, modification and redistribution of this file is subject to your possession of a - * valid End User License Agreement for the Arm Product of which these examples are part of + * valid End User License Agreement for the Arm Product of which these examples are part of * and your compliance with all applicable terms and conditions of such licence agreement. */ #ifndef GICV3_gicc_h diff --git a/ports_module/cortex_a35/ac6/example_build/sample_threadx/GICv3_gicd.c b/ports_module/cortex_a35/ac6/example_build/sample_threadx/GICv3_gicd.c index 3bfb4a93..2cf1553b 100644 --- a/ports_module/cortex_a35/ac6/example_build/sample_threadx/GICv3_gicd.c +++ b/ports_module/cortex_a35/ac6/example_build/sample_threadx/GICv3_gicd.c @@ -3,7 +3,7 @@ * * Copyright (c) 2014-2017 Arm Limited (or its affiliates). All rights reserved. * Use, modification and redistribution of this file is subject to your possession of a - * valid End User License Agreement for the Arm Product of which these examples are part of + * valid End User License Agreement for the Arm Product of which these examples are part of * and your compliance with all applicable terms and conditions of such licence agreement. */ #include <stdint.h> diff --git a/ports_module/cortex_a35/ac6/example_build/sample_threadx/GICv3_gicr.c b/ports_module/cortex_a35/ac6/example_build/sample_threadx/GICv3_gicr.c index 7b437b18..912ab2e4 100644 --- a/ports_module/cortex_a35/ac6/example_build/sample_threadx/GICv3_gicr.c +++ b/ports_module/cortex_a35/ac6/example_build/sample_threadx/GICv3_gicr.c @@ -3,7 +3,7 @@ * * Copyright (c) 2014-2019 Arm Limited (or its affiliates). All rights reserved. * Use, modification and redistribution of this file is subject to your possession of a - * valid End User License Agreement for the Arm Product of which these examples are part of + * valid End User License Agreement for the Arm Product of which these examples are part of * and your compliance with all applicable terms and conditions of such licence agreement. */ #include "GICv3.h" diff --git a/ports_module/cortex_a35/ac6/example_build/sample_threadx/MP_Mutexes.S b/ports_module/cortex_a35/ac6/example_build/sample_threadx/MP_Mutexes.S index e7f95aa7..e8a87f0b 100644 --- a/ports_module/cortex_a35/ac6/example_build/sample_threadx/MP_Mutexes.S +++ b/ports_module/cortex_a35/ac6/example_build/sample_threadx/MP_Mutexes.S @@ -4,7 +4,7 @@ // // Copyright (c) 2012-2019 Arm Limited (or its affiliates). All rights reserved. // Use, modification and redistribution of this file is subject to your possession of a -// valid End User License Agreement for the Arm Product of which these examples are part of +// valid End User License Agreement for the Arm Product of which these examples are part of // and your compliance with all applicable terms and conditions of such licence agreement. // @@ -92,7 +92,7 @@ _mutex_release: .type _mutex_acquire, "function" .cfi_startproc _mutex_acquire: - // This uses a "ticket lock". The lock is stored as a 32-bit value: + // This uses a "ticket lock". The lock is stored as a 32-bit value: // - the upper 16-bits record the thread's ticket number ("take a ticket") // - the lower 16-bits record the ticket being served ("now serving") diff --git a/ports_module/cortex_a35/ac6/example_build/sample_threadx/MP_Mutexes.h b/ports_module/cortex_a35/ac6/example_build/sample_threadx/MP_Mutexes.h index ec1a1d28..00e9cd60 100644 --- a/ports_module/cortex_a35/ac6/example_build/sample_threadx/MP_Mutexes.h +++ b/ports_module/cortex_a35/ac6/example_build/sample_threadx/MP_Mutexes.h @@ -3,7 +3,7 @@ * * Copyright (c) 2012-2014 Arm Limited (or its affiliates). All rights reserved. * Use, modification and redistribution of this file is subject to your possession of a - * valid End User License Agreement for the Arm Product of which these examples are part of + * valid End User License Agreement for the Arm Product of which these examples are part of * and your compliance with all applicable terms and conditions of such licence agreement. */ #ifndef MP_MUTEX_H diff --git a/ports_module/cortex_a35/ac6/example_build/sample_threadx/PPM_AEM.h b/ports_module/cortex_a35/ac6/example_build/sample_threadx/PPM_AEM.h index 52c9a0fe..f7501eeb 100644 --- a/ports_module/cortex_a35/ac6/example_build/sample_threadx/PPM_AEM.h +++ b/ports_module/cortex_a35/ac6/example_build/sample_threadx/PPM_AEM.h @@ -3,7 +3,7 @@ // // Copyright (c) 2012-2017 Arm Limited (or its affiliates). All rights reserved. // Use, modification and redistribution of this file is subject to your possession of a -// valid End User License Agreement for the Arm Product of which these examples are part of +// valid End User License Agreement for the Arm Product of which these examples are part of // and your compliance with all applicable terms and conditions of such licence agreement. // diff --git a/ports_module/cortex_a35/ac6/example_build/sample_threadx/sample_threadx.c b/ports_module/cortex_a35/ac6/example_build/sample_threadx/sample_threadx.c index 8898ff39..736722fb 100644 --- a/ports_module/cortex_a35/ac6/example_build/sample_threadx/sample_threadx.c +++ b/ports_module/cortex_a35/ac6/example_build/sample_threadx/sample_threadx.c @@ -1,5 +1,5 @@ /* This is a small demo of the high-performance ThreadX kernel. It includes examples of eight - threads of different priorities, using a message queue, semaphore, mutex, event flags group, + threads of different priorities, using a message queue, semaphore, mutex, event flags group, byte pool, and block pool. */ #include "tx_api.h" @@ -87,42 +87,42 @@ UCHAR *pointer = TX_NULL; tx_byte_allocate(&byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT); /* Create the main thread. */ - tx_thread_create(&thread_0, "thread 0", thread_0_entry, 0, - pointer, DEMO_STACK_SIZE, + tx_thread_create(&thread_0, "thread 0", thread_0_entry, 0, + pointer, DEMO_STACK_SIZE, 1, 1, TX_NO_TIME_SLICE, TX_AUTO_START); /* Allocate the stack for thread 1. */ tx_byte_allocate(&byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT); - /* Create threads 1 and 2. These threads pass information through a ThreadX + /* Create threads 1 and 2. These threads pass information through a ThreadX message queue. It is also interesting to note that these threads have a time slice. */ - tx_thread_create(&thread_1, "thread 1", thread_1_entry, 1, - pointer, DEMO_STACK_SIZE, + tx_thread_create(&thread_1, "thread 1", thread_1_entry, 1, + pointer, DEMO_STACK_SIZE, 16, 16, 4, TX_AUTO_START); /* Allocate the stack for thread 2. */ tx_byte_allocate(&byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT); - tx_thread_create(&thread_2, "thread 2", thread_2_entry, 2, - pointer, DEMO_STACK_SIZE, + tx_thread_create(&thread_2, "thread 2", thread_2_entry, 2, + pointer, DEMO_STACK_SIZE, 16, 16, 4, TX_AUTO_START); /* Allocate the stack for thread 3. */ tx_byte_allocate(&byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT); - /* Create threads 3 and 4. These threads compete for a ThreadX counting semaphore. + /* Create threads 3 and 4. These threads compete for a ThreadX counting semaphore. An interesting thing here is that both threads share the same instruction area. */ - tx_thread_create(&thread_3, "thread 3", thread_3_and_4_entry, 3, - pointer, DEMO_STACK_SIZE, + tx_thread_create(&thread_3, "thread 3", thread_3_and_4_entry, 3, + pointer, DEMO_STACK_SIZE, 8, 8, TX_NO_TIME_SLICE, TX_AUTO_START); /* Allocate the stack for thread 4. */ tx_byte_allocate(&byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT); - tx_thread_create(&thread_4, "thread 4", thread_3_and_4_entry, 4, - pointer, DEMO_STACK_SIZE, + tx_thread_create(&thread_4, "thread 4", thread_3_and_4_entry, 4, + pointer, DEMO_STACK_SIZE, 8, 8, TX_NO_TIME_SLICE, TX_AUTO_START); /* Allocate the stack for thread 5. */ @@ -130,23 +130,23 @@ UCHAR *pointer = TX_NULL; /* Create thread 5. This thread simply pends on an event flag which will be set by thread_0. */ - tx_thread_create(&thread_5, "thread 5", thread_5_entry, 5, - pointer, DEMO_STACK_SIZE, + tx_thread_create(&thread_5, "thread 5", thread_5_entry, 5, + pointer, DEMO_STACK_SIZE, 4, 4, TX_NO_TIME_SLICE, TX_AUTO_START); /* Allocate the stack for thread 6. */ tx_byte_allocate(&byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT); /* Create threads 6 and 7. These threads compete for a ThreadX mutex. */ - tx_thread_create(&thread_6, "thread 6", thread_6_and_7_entry, 6, - pointer, DEMO_STACK_SIZE, + tx_thread_create(&thread_6, "thread 6", thread_6_and_7_entry, 6, + pointer, DEMO_STACK_SIZE, 8, 8, TX_NO_TIME_SLICE, TX_AUTO_START); /* Allocate the stack for thread 7. */ tx_byte_allocate(&byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT); - tx_thread_create(&thread_7, "thread 7", thread_6_and_7_entry, 7, - pointer, DEMO_STACK_SIZE, + tx_thread_create(&thread_7, "thread 7", thread_6_and_7_entry, 7, + pointer, DEMO_STACK_SIZE, 8, 8, TX_NO_TIME_SLICE, TX_AUTO_START); /* Allocate the message queue. */ @@ -250,11 +250,11 @@ UINT status; /* Retrieve a message from the queue. */ status = tx_queue_receive(&queue_0, &received_message, TX_WAIT_FOREVER); - /* Check completion status and make sure the message is what we + /* Check completion status and make sure the message is what we expected. */ if ((status != TX_SUCCESS) || (received_message != thread_2_messages_received)) break; - + /* Otherwise, all is okay. Increment the received message count. */ thread_2_messages_received++; } @@ -313,7 +313,7 @@ ULONG actual_flags; thread_5_counter++; /* Wait for event flag 0. */ - status = tx_event_flags_get(&event_flags_0, 0x1, TX_OR_CLEAR, + status = tx_event_flags_get(&event_flags_0, 0x1, TX_OR_CLEAR, &actual_flags, TX_WAIT_FOREVER); /* Check status. */ @@ -366,7 +366,7 @@ UINT status; if (status != TX_SUCCESS) break; - /* Release the mutex again. This will actually + /* Release the mutex again. This will actually release ownership since it was obtained twice. */ status = tx_mutex_put(&mutex_0); diff --git a/ports_module/cortex_a35/ac6/example_build/sample_threadx/sample_threadx.scat b/ports_module/cortex_a35/ac6/example_build/sample_threadx/sample_threadx.scat index e5783c7c..d8dfde69 100644 --- a/ports_module/cortex_a35/ac6/example_build/sample_threadx/sample_threadx.scat +++ b/ports_module/cortex_a35/ac6/example_build/sample_threadx/sample_threadx.scat @@ -2,7 +2,7 @@ ; Scatter file for Armv8-A Startup code on FVP Base model ; Copyright (c) 2014-2017 Arm Limited (or its affiliates). All rights reserved. ; Use, modification and redistribution of this file is subject to your possession of a -; valid End User License Agreement for the Arm Product of which these examples are part of +; valid End User License Agreement for the Arm Product of which these examples are part of ; and your compliance with all applicable terms and conditions of such licence agreement. ;******************************************************** @@ -25,7 +25,7 @@ LOAD 0x80000000 ; in source code for this to work correctly ; ARM_LIB_HEAP +0 ALIGN 64 EMPTY 0xA0000 {} - + ; ; Handler stacks for all CPUs ; All stacks and heap are aligned to a cache-line boundary diff --git a/ports_module/cortex_a35/ac6/example_build/sample_threadx/sp804_timer.c b/ports_module/cortex_a35/ac6/example_build/sample_threadx/sp804_timer.c index 4dc009b2..c2ce6faa 100644 --- a/ports_module/cortex_a35/ac6/example_build/sample_threadx/sp804_timer.c +++ b/ports_module/cortex_a35/ac6/example_build/sample_threadx/sp804_timer.c @@ -3,7 +3,7 @@ // // Copyright (c) 2009-2017 Arm Limited (or its affiliates). All rights reserved. // Use, modification and redistribution of this file is subject to your possession of a -// valid End User License Agreement for the Arm Product of which these examples are part of +// valid End User License Agreement for the Arm Product of which these examples are part of // and your compliance with all applicable terms and conditions of such licence agreement. // ------------------------------------------------------------ diff --git a/ports_module/cortex_a35/ac6/example_build/sample_threadx/sp804_timer.h b/ports_module/cortex_a35/ac6/example_build/sample_threadx/sp804_timer.h index 777062cc..4d423904 100644 --- a/ports_module/cortex_a35/ac6/example_build/sample_threadx/sp804_timer.h +++ b/ports_module/cortex_a35/ac6/example_build/sample_threadx/sp804_timer.h @@ -4,7 +4,7 @@ // // Copyright (c) 2009-2017 Arm Limited (or its affiliates). All rights reserved. // Use, modification and redistribution of this file is subject to your possession of a -// valid End User License Agreement for the Arm Product of which these examples are part of +// valid End User License Agreement for the Arm Product of which these examples are part of // and your compliance with all applicable terms and conditions of such licence agreement. // ------------------------------------------------------------ diff --git a/ports_module/cortex_a35/ac6/example_build/sample_threadx/startup.S b/ports_module/cortex_a35/ac6/example_build/sample_threadx/startup.S index de100e56..9f0fc211 100644 --- a/ports_module/cortex_a35/ac6/example_build/sample_threadx/startup.S +++ b/ports_module/cortex_a35/ac6/example_build/sample_threadx/startup.S @@ -7,7 +7,7 @@ // // Copyright (c) 2014-2019 Arm Limited (or its affiliates). All rights reserved. // Use, modification and redistribution of this file is subject to your possession of a -// valid End User License Agreement for the Arm Product of which these examples are part of +// valid End User License Agreement for the Arm Product of which these examples are part of // and your compliance with all applicable terms and conditions of such licence agreement. // ------------------------------------------------------------ @@ -328,7 +328,7 @@ el1_entry_aarch64: // // Cortex-A processors automatically invalidate their caches on reset // (unless suppressed with the DBGL1RSTDISABLE or L2RSTDISABLE pins). - // It is therefore not necessary for software to invalidate the caches + // It is therefore not necessary for software to invalidate the caches // on startup, however, this is done here in case of a warm reset. bl InvalidateUDCaches tlbi VMALLE1 diff --git a/ports_module/cortex_a35/ac6/example_build/sample_threadx/tx_initialize_low_level.S b/ports_module/cortex_a35/ac6/example_build/sample_threadx/tx_initialize_low_level.S index 857c2101..135cd934 100644 --- a/ports_module/cortex_a35/ac6/example_build/sample_threadx/tx_initialize_low_level.S +++ b/ports_module/cortex_a35/ac6/example_build/sample_threadx/tx_initialize_low_level.S @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -56,12 +57,6 @@ /* */ /* _tx_initialize_kernel_enter ThreadX entry function */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 12-31-2020 Andres Mlinar Initial Version 6.1.3 */ -/* */ /**************************************************************************/ // VOID _tx_initialize_low_level(VOID) // { diff --git a/ports_module/cortex_a35/ac6/example_build/sample_threadx/v8_aarch64.S b/ports_module/cortex_a35/ac6/example_build/sample_threadx/v8_aarch64.S index f8db3bfe..45445a98 100644 --- a/ports_module/cortex_a35/ac6/example_build/sample_threadx/v8_aarch64.S +++ b/ports_module/cortex_a35/ac6/example_build/sample_threadx/v8_aarch64.S @@ -3,7 +3,7 @@ // // Copyright (c) 2012-2019 Arm Limited (or its affiliates). All rights reserved. // Use, modification and redistribution of this file is subject to your possession of a -// valid End User License Agreement for the Arm Product of which these examples are part of +// valid End User License Agreement for the Arm Product of which these examples are part of // and your compliance with all applicable terms and conditions of such licence agreement. // ------------------------------------------------------------ diff --git a/ports_module/cortex_a35/ac6/example_build/sample_threadx/v8_aarch64.h b/ports_module/cortex_a35/ac6/example_build/sample_threadx/v8_aarch64.h index b09079a4..91ca9653 100644 --- a/ports_module/cortex_a35/ac6/example_build/sample_threadx/v8_aarch64.h +++ b/ports_module/cortex_a35/ac6/example_build/sample_threadx/v8_aarch64.h @@ -4,7 +4,7 @@ * * Copyright (c) 2012-2014 Arm Limited (or its affiliates). All rights reserved. * Use, modification and redistribution of this file is subject to your possession of a - * valid End User License Agreement for the Arm Product of which these examples are part of + * valid End User License Agreement for the Arm Product of which these examples are part of * and your compliance with all applicable terms and conditions of such licence agreement. */ diff --git a/ports_module/cortex_a35/ac6/example_build/sample_threadx/v8_mmu.h b/ports_module/cortex_a35/ac6/example_build/sample_threadx/v8_mmu.h index ee8834fa..d0c51601 100644 --- a/ports_module/cortex_a35/ac6/example_build/sample_threadx/v8_mmu.h +++ b/ports_module/cortex_a35/ac6/example_build/sample_threadx/v8_mmu.h @@ -3,7 +3,7 @@ // // Copyright (c) 2012-2019 Arm Limited (or its affiliates). All rights reserved. // Use, modification and redistribution of this file is subject to your possession of a -// valid End User License Agreement for the Arm Product of which these examples are part of +// valid End User License Agreement for the Arm Product of which these examples are part of // and your compliance with all applicable terms and conditions of such licence agreement. // @@ -101,7 +101,7 @@ #define TT_S1_ATTR_PXN (1 << 53) #define TT_S1_ATTR_UXN (1 << 54) -// PBHA bits[62:59] - If Armv8.2-TTPBHA is implemented, hardware can use these bits +// PBHA bits[62:59] - If Armv8.2-TTPBHA is implemented, hardware can use these bits // for IMPLEMENTATIONDEFINED purposes, otherwise IGNORED #define TT_S1_MAIR_DEV_nGnRnE 0b00000000 diff --git a/ports_module/cortex_a35/ac6/example_build/sample_threadx/v8_system.h b/ports_module/cortex_a35/ac6/example_build/sample_threadx/v8_system.h index ff96deff..a62d2a33 100644 --- a/ports_module/cortex_a35/ac6/example_build/sample_threadx/v8_system.h +++ b/ports_module/cortex_a35/ac6/example_build/sample_threadx/v8_system.h @@ -3,7 +3,7 @@ // // Copyright (c) 2012-2016 Arm Limited (or its affiliates). All rights reserved. // Use, modification and redistribution of this file is subject to your possession of a -// valid End User License Agreement for the Arm Product of which these examples are part of +// valid End User License Agreement for the Arm Product of which these examples are part of // and your compliance with all applicable terms and conditions of such licence agreement. // diff --git a/ports_module/cortex_a35/ac6/example_build/sample_threadx/v8_utils.S b/ports_module/cortex_a35/ac6/example_build/sample_threadx/v8_utils.S index f0fcef26..888892a0 100644 --- a/ports_module/cortex_a35/ac6/example_build/sample_threadx/v8_utils.S +++ b/ports_module/cortex_a35/ac6/example_build/sample_threadx/v8_utils.S @@ -3,7 +3,7 @@ // // Copyright (c) 2013-2017 Arm Limited (or its affiliates). All rights reserved. // Use, modification and redistribution of this file is subject to your possession of a -// valid End User License Agreement for the Arm Product of which these examples are part of +// valid End User License Agreement for the Arm Product of which these examples are part of // and your compliance with all applicable terms and conditions of such licence agreement. // diff --git a/ports_module/cortex_a35/ac6/example_build/sample_threadx/vectors.S b/ports_module/cortex_a35/ac6/example_build/sample_threadx/vectors.S index 9e60e001..7784f98e 100644 --- a/ports_module/cortex_a35/ac6/example_build/sample_threadx/vectors.S +++ b/ports_module/cortex_a35/ac6/example_build/sample_threadx/vectors.S @@ -3,7 +3,7 @@ // // Copyright (c) 2014-2016 Arm Limited (or its affiliates). All rights reserved. // Use, modification and redistribution of this file is subject to your possession of a -// valid End User License Agreement for the Arm Product of which these examples are part of +// valid End User License Agreement for the Arm Product of which these examples are part of // and your compliance with all applicable terms and conditions of such licence agreement. // ------------------------------------------------------------ diff --git a/ports_module/cortex_a35/ac6/example_build/sample_threadx_module/.cproject b/ports_module/cortex_a35/ac6/example_build/sample_threadx_module/.cproject index e75d0d0e..695952e7 100644 --- a/ports_module/cortex_a35/ac6/example_build/sample_threadx_module/.cproject +++ b/ports_module/cortex_a35/ac6/example_build/sample_threadx_module/.cproject @@ -1,220 +1,220 @@ <?xml version="1.0" encoding="UTF-8" standalone="no"?> <?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage"> - + <storageModule moduleId="org.eclipse.cdt.core.settings"> - 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+ <resource resourceType="PROJECT" workspacePath="/sample_threadx_module"/> - + </configuration> - + <configuration configurationName="Release"> - + <resource resourceType="PROJECT" workspacePath="/sample_threadx"/> - + </configuration> - + </storageModule> - + <storageModule moduleId="org.eclipse.cdt.internal.ui.text.commentOwnerProjectMappings"/> - + </cproject> diff --git a/ports_module/cortex_a35/ac6/example_build/sample_threadx_module/sample_threadx_module.c b/ports_module/cortex_a35/ac6/example_build/sample_threadx_module/sample_threadx_module.c index 3a3f8159..3476367e 100644 --- a/ports_module/cortex_a35/ac6/example_build/sample_threadx_module/sample_threadx_module.c +++ b/ports_module/cortex_a35/ac6/example_build/sample_threadx_module/sample_threadx_module.c @@ -1,5 +1,5 @@ -/* This is a small demo of the high-performance ThreadX kernel running as a module. It includes - examples of eight threads of different priorities, using a message queue, semaphore, mutex, +/* This is a small demo of the high-performance ThreadX kernel running as a module. It includes + examples of eight threads of different priorities, using a message queue, semaphore, mutex, event flags group, byte pool, and block pool. */ /* Specify that this is a module! */ @@ -20,7 +20,7 @@ #define DEMO_QUEUE_SIZE 100 -/* Define the pool space in the bss section of the module. ULONG is used to +/* Define the pool space in the bss section of the module. ULONG is used to get the word alignment. */ ULONG demo_module_pool_space[DEMO_BYTE_POOL_SIZE / sizeof(ULONG)]; @@ -103,7 +103,7 @@ CHAR *pointer; /* Allocate all the objects. In MMU mode, modules cannot allocate control blocks within - their own memory area so they cannot corrupt the resident portion of ThreadX by overwriting + their own memory area so they cannot corrupt the resident portion of ThreadX by overwriting the control block(s). */ status = txm_module_object_allocate((void*)&thread_0, sizeof(TX_THREAD)); while (status != TX_SUCCESS); @@ -133,7 +133,7 @@ CHAR *pointer; while (status != TX_SUCCESS); status = txm_module_object_allocate((void*)&block_pool_0, sizeof(TX_BLOCK_POOL)); while (status != TX_SUCCESS); - + /* Create a byte memory pool from which to allocate the thread stacks. */ status = tx_byte_pool_create(byte_pool_0, "module byte pool 0", demo_module_pool_space, DEMO_BYTE_POOL_SIZE); @@ -148,7 +148,7 @@ CHAR *pointer; /* Create the main thread. */ status = tx_thread_create(thread_0, "module thread 0", thread_0_entry, 0, - pointer, DEMO_STACK_SIZE, + pointer, DEMO_STACK_SIZE, 1, 1, TX_NO_TIME_SLICE, TX_AUTO_START); while (status != TX_SUCCESS); @@ -156,11 +156,11 @@ CHAR *pointer; status = tx_byte_allocate(byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT); while (status != TX_SUCCESS); - /* Create threads 1 and 2. These threads pass information through a ThreadX + /* Create threads 1 and 2. These threads pass information through a ThreadX message queue. It is also interesting to note that these threads have a time slice. */ status = tx_thread_create(thread_1, "module thread 1", thread_1_entry, 1, - pointer, DEMO_STACK_SIZE, + pointer, DEMO_STACK_SIZE, 16, 16, 4, TX_AUTO_START); while (status != TX_SUCCESS); @@ -169,7 +169,7 @@ CHAR *pointer; while (status != TX_SUCCESS); status = tx_thread_create(thread_2, "module thread 2", thread_2_entry, 2, - pointer, DEMO_STACK_SIZE, + pointer, DEMO_STACK_SIZE, 16, 16, 4, TX_AUTO_START); while (status != TX_SUCCESS); @@ -177,10 +177,10 @@ CHAR *pointer; status = tx_byte_allocate(byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT); while (status != TX_SUCCESS); - /* Create threads 3 and 4. These threads compete for a ThreadX counting semaphore. + /* Create threads 3 and 4. These threads compete for a ThreadX counting semaphore. An interesting thing here is that both threads share the same instruction area. */ status = tx_thread_create(thread_3, "module thread 3", thread_3_and_4_entry, 3, - pointer, DEMO_STACK_SIZE, + pointer, DEMO_STACK_SIZE, 8, 8, TX_NO_TIME_SLICE, TX_AUTO_START); while (status != TX_SUCCESS); @@ -189,7 +189,7 @@ CHAR *pointer; while (status != TX_SUCCESS); status = tx_thread_create(thread_4, "module thread 4", thread_3_and_4_entry, 4, - pointer, DEMO_STACK_SIZE, + pointer, DEMO_STACK_SIZE, 8, 8, TX_NO_TIME_SLICE, TX_AUTO_START); while (status != TX_SUCCESS); @@ -200,7 +200,7 @@ CHAR *pointer; /* Create thread 5. This thread simply pends on an event flag which will be set by thread_0. */ status = tx_thread_create(thread_5, "module thread 5", thread_5_entry, 5, - pointer, DEMO_STACK_SIZE, + pointer, DEMO_STACK_SIZE, 4, 4, TX_NO_TIME_SLICE, TX_AUTO_START); while (status != TX_SUCCESS); @@ -210,7 +210,7 @@ CHAR *pointer; /* Create threads 6 and 7. These threads compete for a ThreadX mutex. */ status = tx_thread_create(thread_6, "module thread 6", thread_6_and_7_entry, 6, - pointer, DEMO_STACK_SIZE, + pointer, DEMO_STACK_SIZE, 8, 8, TX_NO_TIME_SLICE, TX_AUTO_START); while (status != TX_SUCCESS); @@ -219,7 +219,7 @@ CHAR *pointer; while (status != TX_SUCCESS); status = tx_thread_create(thread_7, "module thread 7", thread_6_and_7_entry, 7, - pointer, DEMO_STACK_SIZE, + pointer, DEMO_STACK_SIZE, 8, 8, TX_NO_TIME_SLICE, TX_AUTO_START); while (status != TX_SUCCESS); @@ -276,7 +276,7 @@ void thread_0_entry(ULONG thread_input) { UINT status; - + /* This thread simply sits in while-forever-sleep loop. */ while(1) { @@ -286,7 +286,7 @@ UINT status; /* Sleep for 10 ticks. */ tx_thread_sleep(10); - + /* Set event flag 0 to wakeup thread 5. */ status = tx_event_flags_set(event_flags_0, 0x1, TX_OR); @@ -338,11 +338,11 @@ UINT status; /* Retrieve a message from the queue. */ status = tx_queue_receive(queue_0, &received_message, TX_WAIT_FOREVER); - /* Check completion status and make sure the message is what we + /* Check completion status and make sure the message is what we expected. */ if ((status != TX_SUCCESS) || (received_message != thread_2_messages_received)) break; - + /* Otherwise, all is okay. Increment the received message count. */ thread_2_messages_received++; } @@ -401,7 +401,7 @@ ULONG actual_flags; thread_5_counter++; /* Wait for event flag 0. */ - status = tx_event_flags_get(event_flags_0, 0x1, TX_OR_CLEAR, + status = tx_event_flags_get(event_flags_0, 0x1, TX_OR_CLEAR, &actual_flags, TX_WAIT_FOREVER); /* Check status. */ @@ -454,7 +454,7 @@ UINT status; if (status != TX_SUCCESS) break; - /* Release the mutex again. This will actually + /* Release the mutex again. This will actually release ownership since it was obtained twice. */ status = tx_mutex_put(mutex_0); diff --git a/ports_module/cortex_a35/ac6/example_build/sample_threadx_module/txm_module_preamble.S b/ports_module/cortex_a35/ac6/example_build/sample_threadx_module/txm_module_preamble.S index f05656c3..ad75e134 100644 --- a/ports_module/cortex_a35/ac6/example_build/sample_threadx_module/txm_module_preamble.S +++ b/ports_module/cortex_a35/ac6/example_build/sample_threadx_module/txm_module_preamble.S @@ -1,7 +1,7 @@ .text .align 4 .section Init - + // External references .global _txm_module_thread_shell_entry .global _txm_module_callback_request_thread_entry diff --git a/ports_module/cortex_a35/ac6/example_build/sample_threadx_module_manager/.cproject b/ports_module/cortex_a35/ac6/example_build/sample_threadx_module_manager/.cproject index 77c12df2..2f54811f 100644 --- a/ports_module/cortex_a35/ac6/example_build/sample_threadx_module_manager/.cproject +++ b/ports_module/cortex_a35/ac6/example_build/sample_threadx_module_manager/.cproject @@ -1,238 +1,238 @@ <?xml version="1.0" encoding="UTF-8" standalone="no"?> <?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage"> - 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+ <tool id="com.arm.tool.c.compiler.v6.base.var.arm_compiler_6-6.1927525577" name="Arm C Compiler 6" superClass="com.arm.tool.c.compiler.v6.base.var.arm_compiler_6-6.114782258"> - + <option defaultValue="com.arm.tool.c.compiler.v6.base.option.optlevel.min" id="com.arm.tool.c.compiler.v6.base.option.optlevel.1304794003" name="Optimization level" superClass="com.arm.tool.c.compiler.v6.base.option.optlevel" valueType="enumerated"/> - + <inputType id="com.arm.tool.c.compiler.v6.base.input.1502156310" superClass="com.arm.tool.c.compiler.v6.base.input"/> - + </tool> - + <tool id="com.arm.tool.cpp.compiler.v6.base.var.arm_compiler_6-6.1573521907" name="Arm C++ Compiler 6" superClass="com.arm.tool.cpp.compiler.v6.base.var.arm_compiler_6-6.924824072"> - + <option defaultValue="com.arm.tool.c.compiler.v6.base.option.optlevel.min" id="com.arm.tool.c.compiler.v6.base.option.optlevel.1807654698" name="Optimization level" superClass="com.arm.tool.c.compiler.v6.base.option.optlevel" valueType="enumerated"/> - + </tool> - + <tool id="com.arm.tool.assembler.v6.base.var.arm_compiler_6-6.1808081220" name="Arm Assembler 6" superClass="com.arm.tool.assembler.v6.base.var.arm_compiler_6-6.1555411179"> - + <inputType id="com.arm.tool.assembler.v6.base.input.579682311" superClass="com.arm.tool.assembler.v6.base.input"/> - + </tool> - + <tool id="com.arm.tool.c.linker.v6.base.var.arm_compiler_6-6.641966454" name="Arm Linker 6" superClass="com.arm.tool.c.linker.v6.base.var.arm_compiler_6-6.88740108"/> - + <tool id="com.arm.tool.librarian.v6.base.var.arm_compiler_6-6.616745103" name="Arm Librarian 6" superClass="com.arm.tool.librarian.v6.base.var.arm_compiler_6-6.1637267746"/> - + </toolChain> - + </folderInfo> - + <sourceEntries> - + <entry excluding="startup_el3.S|startup_el2.S|startup_el1.S|startup_old.S" flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name=""/> - + </sourceEntries> - + </configuration> - + </storageModule> - + <storageModule moduleId="org.eclipse.cdt.core.externalSettings"/> - + </cconfiguration> - + </storageModule> - + <storageModule moduleId="cdtBuildSystem" version="4.0.0"> - + <project id="sample_threadx_module_manager.com.arm.eclipse.build.project.v6.exe.836597981" name="Executable"/> - + </storageModule> - + <storageModule moduleId="scannerConfiguration"> - + <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/> - + </storageModule> - + <storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/> - + <storageModule moduleId="refreshScope" versionNumber="2"> - + <configuration configurationName="Debug"> - + <resource resourceType="PROJECT" workspacePath="/sample_threadx_module_manager"/> - + </configuration> - + <configuration configurationName="Release"> - + <resource resourceType="PROJECT" workspacePath="/sample_threadx"/> - + </configuration> - + </storageModule> - + <storageModule moduleId="org.eclipse.cdt.make.core.buildtargets"/> - + <storageModule moduleId="com.arm.projectSettings" version="6.0.0"/> - + <storageModule moduleId="org.eclipse.cdt.internal.ui.text.commentOwnerProjectMappings"/> - + </cproject> diff --git a/ports_module/cortex_a35/ac6/example_build/sample_threadx_module_manager/GICv3.h b/ports_module/cortex_a35/ac6/example_build/sample_threadx_module_manager/GICv3.h index 23bc7fd8..dfe37586 100644 --- a/ports_module/cortex_a35/ac6/example_build/sample_threadx_module_manager/GICv3.h +++ b/ports_module/cortex_a35/ac6/example_build/sample_threadx_module_manager/GICv3.h @@ -3,7 +3,7 @@ * * Copyright (c) 2014-2017 Arm Limited (or its affiliates). All rights reserved. * Use, modification and redistribution of this file is subject to your possession of a - * valid End User License Agreement for the Arm Product of which these examples are part of + * valid End User License Agreement for the Arm Product of which these examples are part of * and your compliance with all applicable terms and conditions of such licence agreement. */ #ifndef GICV3_h diff --git a/ports_module/cortex_a35/ac6/example_build/sample_threadx_module_manager/GICv3_gicc.h b/ports_module/cortex_a35/ac6/example_build/sample_threadx_module_manager/GICv3_gicc.h index 8e6f0acc..beaa9157 100644 --- a/ports_module/cortex_a35/ac6/example_build/sample_threadx_module_manager/GICv3_gicc.h +++ b/ports_module/cortex_a35/ac6/example_build/sample_threadx_module_manager/GICv3_gicc.h @@ -3,7 +3,7 @@ * * Copyright (c) 2014-2017 Arm Limited (or its affiliates). All rights reserved. * Use, modification and redistribution of this file is subject to your possession of a - * valid End User License Agreement for the Arm Product of which these examples are part of + * valid End User License Agreement for the Arm Product of which these examples are part of * and your compliance with all applicable terms and conditions of such licence agreement. */ #ifndef GICV3_gicc_h diff --git a/ports_module/cortex_a35/ac6/example_build/sample_threadx_module_manager/GICv3_gicd.c b/ports_module/cortex_a35/ac6/example_build/sample_threadx_module_manager/GICv3_gicd.c index 3bfb4a93..2cf1553b 100644 --- a/ports_module/cortex_a35/ac6/example_build/sample_threadx_module_manager/GICv3_gicd.c +++ b/ports_module/cortex_a35/ac6/example_build/sample_threadx_module_manager/GICv3_gicd.c @@ -3,7 +3,7 @@ * * Copyright (c) 2014-2017 Arm Limited (or its affiliates). All rights reserved. * Use, modification and redistribution of this file is subject to your possession of a - * valid End User License Agreement for the Arm Product of which these examples are part of + * valid End User License Agreement for the Arm Product of which these examples are part of * and your compliance with all applicable terms and conditions of such licence agreement. */ #include <stdint.h> diff --git a/ports_module/cortex_a35/ac6/example_build/sample_threadx_module_manager/GICv3_gicr.c b/ports_module/cortex_a35/ac6/example_build/sample_threadx_module_manager/GICv3_gicr.c index 7b437b18..912ab2e4 100644 --- a/ports_module/cortex_a35/ac6/example_build/sample_threadx_module_manager/GICv3_gicr.c +++ b/ports_module/cortex_a35/ac6/example_build/sample_threadx_module_manager/GICv3_gicr.c @@ -3,7 +3,7 @@ * * Copyright (c) 2014-2019 Arm Limited (or its affiliates). All rights reserved. * Use, modification and redistribution of this file is subject to your possession of a - * valid End User License Agreement for the Arm Product of which these examples are part of + * valid End User License Agreement for the Arm Product of which these examples are part of * and your compliance with all applicable terms and conditions of such licence agreement. */ #include "GICv3.h" diff --git a/ports_module/cortex_a35/ac6/example_build/sample_threadx_module_manager/MP_Mutexes.S b/ports_module/cortex_a35/ac6/example_build/sample_threadx_module_manager/MP_Mutexes.S index e7f95aa7..e8a87f0b 100644 --- a/ports_module/cortex_a35/ac6/example_build/sample_threadx_module_manager/MP_Mutexes.S +++ b/ports_module/cortex_a35/ac6/example_build/sample_threadx_module_manager/MP_Mutexes.S @@ -4,7 +4,7 @@ // // Copyright (c) 2012-2019 Arm Limited (or its affiliates). All rights reserved. // Use, modification and redistribution of this file is subject to your possession of a -// valid End User License Agreement for the Arm Product of which these examples are part of +// valid End User License Agreement for the Arm Product of which these examples are part of // and your compliance with all applicable terms and conditions of such licence agreement. // @@ -92,7 +92,7 @@ _mutex_release: .type _mutex_acquire, "function" .cfi_startproc _mutex_acquire: - // This uses a "ticket lock". The lock is stored as a 32-bit value: + // This uses a "ticket lock". The lock is stored as a 32-bit value: // - the upper 16-bits record the thread's ticket number ("take a ticket") // - the lower 16-bits record the ticket being served ("now serving") diff --git a/ports_module/cortex_a35/ac6/example_build/sample_threadx_module_manager/MP_Mutexes.h b/ports_module/cortex_a35/ac6/example_build/sample_threadx_module_manager/MP_Mutexes.h index ec1a1d28..00e9cd60 100644 --- a/ports_module/cortex_a35/ac6/example_build/sample_threadx_module_manager/MP_Mutexes.h +++ b/ports_module/cortex_a35/ac6/example_build/sample_threadx_module_manager/MP_Mutexes.h @@ -3,7 +3,7 @@ * * Copyright (c) 2012-2014 Arm Limited (or its affiliates). All rights reserved. * Use, modification and redistribution of this file is subject to your possession of a - * valid End User License Agreement for the Arm Product of which these examples are part of + * valid End User License Agreement for the Arm Product of which these examples are part of * and your compliance with all applicable terms and conditions of such licence agreement. */ #ifndef MP_MUTEX_H diff --git a/ports_module/cortex_a35/ac6/example_build/sample_threadx_module_manager/PPM_AEM.h b/ports_module/cortex_a35/ac6/example_build/sample_threadx_module_manager/PPM_AEM.h index 52c9a0fe..f7501eeb 100644 --- a/ports_module/cortex_a35/ac6/example_build/sample_threadx_module_manager/PPM_AEM.h +++ b/ports_module/cortex_a35/ac6/example_build/sample_threadx_module_manager/PPM_AEM.h @@ -3,7 +3,7 @@ // // Copyright (c) 2012-2017 Arm Limited (or its affiliates). All rights reserved. // Use, modification and redistribution of this file is subject to your possession of a -// valid End User License Agreement for the Arm Product of which these examples are part of +// valid End User License Agreement for the Arm Product of which these examples are part of // and your compliance with all applicable terms and conditions of such licence agreement. // diff --git a/ports_module/cortex_a35/ac6/example_build/sample_threadx_module_manager/sample_threadx.scat b/ports_module/cortex_a35/ac6/example_build/sample_threadx_module_manager/sample_threadx.scat index deb16ebe..54e58dba 100644 --- a/ports_module/cortex_a35/ac6/example_build/sample_threadx_module_manager/sample_threadx.scat +++ b/ports_module/cortex_a35/ac6/example_build/sample_threadx_module_manager/sample_threadx.scat @@ -2,7 +2,7 @@ ; Scatter file for Armv8-A Startup code on FVP Base model ; Copyright (c) 2014-2017 Arm Limited (or its affiliates). All rights reserved. ; Use, modification and redistribution of this file is subject to your possession of a -; valid End User License Agreement for the Arm Product of which these examples are part of +; valid End User License Agreement for the Arm Product of which these examples are part of ; and your compliance with all applicable terms and conditions of such licence agreement. ;******************************************************** @@ -25,7 +25,7 @@ LOAD 0x80000000 ; in source code for this to work correctly ; ARM_LIB_HEAP +0 ALIGN 64 EMPTY 0xA0000 {} - + ; ; Handler stacks for all CPUs ; All stacks and heap are aligned to a cache-line boundary diff --git a/ports_module/cortex_a35/ac6/example_build/sample_threadx_module_manager/sample_threadx_module_manager.c b/ports_module/cortex_a35/ac6/example_build/sample_threadx_module_manager/sample_threadx_module_manager.c index c7296646..c0772002 100644 --- a/ports_module/cortex_a35/ac6/example_build/sample_threadx_module_manager/sample_threadx_module_manager.c +++ b/ports_module/cortex_a35/ac6/example_build/sample_threadx_module_manager/sample_threadx_module_manager.c @@ -115,7 +115,7 @@ void module_manager_entry(ULONG thread_input) /* Load the module with absolute address linkage, in this example it is placed there by the multiple image download. */ txm_module_manager_absolute_load(&my_module, "my module", (void *) MODULE_CODE); - + /* Start the module. */ txm_module_manager_start(&my_module); @@ -127,10 +127,10 @@ void module_manager_entry(ULONG thread_input) tx_thread_sleep(10); } } - + /* Stop the module. */ txm_module_manager_stop(&my_module); - + /* Unload the module. */ txm_module_manager_unload(&my_module); @@ -139,11 +139,11 @@ void module_manager_entry(ULONG thread_input) /* Start the module again. */ txm_module_manager_start(&my_module); - + /* Now just spin... */ while(1) { - + tx_thread_sleep(10); } } diff --git a/ports_module/cortex_a35/ac6/example_build/sample_threadx_module_manager/sp804_timer.c b/ports_module/cortex_a35/ac6/example_build/sample_threadx_module_manager/sp804_timer.c index 4dc009b2..c2ce6faa 100644 --- a/ports_module/cortex_a35/ac6/example_build/sample_threadx_module_manager/sp804_timer.c +++ b/ports_module/cortex_a35/ac6/example_build/sample_threadx_module_manager/sp804_timer.c @@ -3,7 +3,7 @@ // // Copyright (c) 2009-2017 Arm Limited (or its affiliates). All rights reserved. // Use, modification and redistribution of this file is subject to your possession of a -// valid End User License Agreement for the Arm Product of which these examples are part of +// valid End User License Agreement for the Arm Product of which these examples are part of // and your compliance with all applicable terms and conditions of such licence agreement. // ------------------------------------------------------------ diff --git a/ports_module/cortex_a35/ac6/example_build/sample_threadx_module_manager/sp804_timer.h b/ports_module/cortex_a35/ac6/example_build/sample_threadx_module_manager/sp804_timer.h index 777062cc..4d423904 100644 --- a/ports_module/cortex_a35/ac6/example_build/sample_threadx_module_manager/sp804_timer.h +++ b/ports_module/cortex_a35/ac6/example_build/sample_threadx_module_manager/sp804_timer.h @@ -4,7 +4,7 @@ // // Copyright (c) 2009-2017 Arm Limited (or its affiliates). All rights reserved. // Use, modification and redistribution of this file is subject to your possession of a -// valid End User License Agreement for the Arm Product of which these examples are part of +// valid End User License Agreement for the Arm Product of which these examples are part of // and your compliance with all applicable terms and conditions of such licence agreement. // ------------------------------------------------------------ diff --git a/ports_module/cortex_a35/ac6/example_build/sample_threadx_module_manager/startup.S b/ports_module/cortex_a35/ac6/example_build/sample_threadx_module_manager/startup.S index de100e56..9f0fc211 100644 --- a/ports_module/cortex_a35/ac6/example_build/sample_threadx_module_manager/startup.S +++ b/ports_module/cortex_a35/ac6/example_build/sample_threadx_module_manager/startup.S @@ -7,7 +7,7 @@ // // Copyright (c) 2014-2019 Arm Limited (or its affiliates). All rights reserved. // Use, modification and redistribution of this file is subject to your possession of a -// valid End User License Agreement for the Arm Product of which these examples are part of +// valid End User License Agreement for the Arm Product of which these examples are part of // and your compliance with all applicable terms and conditions of such licence agreement. // ------------------------------------------------------------ @@ -328,7 +328,7 @@ el1_entry_aarch64: // // Cortex-A processors automatically invalidate their caches on reset // (unless suppressed with the DBGL1RSTDISABLE or L2RSTDISABLE pins). - // It is therefore not necessary for software to invalidate the caches + // It is therefore not necessary for software to invalidate the caches // on startup, however, this is done here in case of a warm reset. bl InvalidateUDCaches tlbi VMALLE1 diff --git a/ports_module/cortex_a35/ac6/example_build/sample_threadx_module_manager/tx_initialize_low_level.S b/ports_module/cortex_a35/ac6/example_build/sample_threadx_module_manager/tx_initialize_low_level.S index ebbc5ce3..47bd46e8 100644 --- a/ports_module/cortex_a35/ac6/example_build/sample_threadx_module_manager/tx_initialize_low_level.S +++ b/ports_module/cortex_a35/ac6/example_build/sample_threadx_module_manager/tx_initialize_low_level.S @@ -1,18 +1,19 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ /**************************************************************************/ /**************************************************************************/ -/** */ -/** ThreadX Component */ +/** */ +/** ThreadX Component */ /** */ /** Initialize */ /** */ @@ -21,45 +22,39 @@ .text .align 3 -/**************************************************************************/ -/* */ -/* FUNCTION RELEASE */ -/* */ -/* _tx_initialize_low_level Cortex-A35/AC6 */ +/**************************************************************************/ +/* */ +/* FUNCTION RELEASE */ +/* */ +/* _tx_initialize_low_level Cortex-A35/AC6 */ /* 6.1 */ /* AUTHOR */ /* */ /* William E. Lamie, Microsoft Corporation */ /* */ /* DESCRIPTION */ -/* */ -/* This function is responsible for any low-level processor */ -/* initialization, including setting up interrupt vectors, setting */ -/* up a periodic timer interrupt source, saving the system stack */ -/* pointer for use in ISR processing later, and finding the first */ -/* available RAM memory address for tx_application_define. */ -/* */ -/* INPUT */ -/* */ -/* None */ -/* */ -/* OUTPUT */ -/* */ -/* None */ -/* */ -/* CALLS */ -/* */ -/* None */ -/* */ -/* CALLED BY */ -/* */ -/* _tx_initialize_kernel_enter ThreadX entry function */ -/* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ /* */ -/* 09-30-2020 William E. Lamie Initial Version 6.1 */ +/* This function is responsible for any low-level processor */ +/* initialization, including setting up interrupt vectors, setting */ +/* up a periodic timer interrupt source, saving the system stack */ +/* pointer for use in ISR processing later, and finding the first */ +/* available RAM memory address for tx_application_define. */ +/* */ +/* INPUT */ +/* */ +/* None */ +/* */ +/* OUTPUT */ +/* */ +/* None */ +/* */ +/* CALLS */ +/* */ +/* None */ +/* */ +/* CALLED BY */ +/* */ +/* _tx_initialize_kernel_enter ThreadX entry function */ /* */ /**************************************************************************/ /* VOID _tx_initialize_low_level(VOID) diff --git a/ports_module/cortex_a35/ac6/example_build/sample_threadx_module_manager/v8_aarch64.S b/ports_module/cortex_a35/ac6/example_build/sample_threadx_module_manager/v8_aarch64.S index f8db3bfe..45445a98 100644 --- a/ports_module/cortex_a35/ac6/example_build/sample_threadx_module_manager/v8_aarch64.S +++ b/ports_module/cortex_a35/ac6/example_build/sample_threadx_module_manager/v8_aarch64.S @@ -3,7 +3,7 @@ // // Copyright (c) 2012-2019 Arm Limited (or its affiliates). All rights reserved. // Use, modification and redistribution of this file is subject to your possession of a -// valid End User License Agreement for the Arm Product of which these examples are part of +// valid End User License Agreement for the Arm Product of which these examples are part of // and your compliance with all applicable terms and conditions of such licence agreement. // ------------------------------------------------------------ diff --git a/ports_module/cortex_a35/ac6/example_build/sample_threadx_module_manager/v8_aarch64.h b/ports_module/cortex_a35/ac6/example_build/sample_threadx_module_manager/v8_aarch64.h index b09079a4..91ca9653 100644 --- a/ports_module/cortex_a35/ac6/example_build/sample_threadx_module_manager/v8_aarch64.h +++ b/ports_module/cortex_a35/ac6/example_build/sample_threadx_module_manager/v8_aarch64.h @@ -4,7 +4,7 @@ * * Copyright (c) 2012-2014 Arm Limited (or its affiliates). All rights reserved. * Use, modification and redistribution of this file is subject to your possession of a - * valid End User License Agreement for the Arm Product of which these examples are part of + * valid End User License Agreement for the Arm Product of which these examples are part of * and your compliance with all applicable terms and conditions of such licence agreement. */ diff --git a/ports_module/cortex_a35/ac6/example_build/sample_threadx_module_manager/v8_mmu.h b/ports_module/cortex_a35/ac6/example_build/sample_threadx_module_manager/v8_mmu.h index ee8834fa..d0c51601 100644 --- a/ports_module/cortex_a35/ac6/example_build/sample_threadx_module_manager/v8_mmu.h +++ b/ports_module/cortex_a35/ac6/example_build/sample_threadx_module_manager/v8_mmu.h @@ -3,7 +3,7 @@ // // Copyright (c) 2012-2019 Arm Limited (or its affiliates). All rights reserved. // Use, modification and redistribution of this file is subject to your possession of a -// valid End User License Agreement for the Arm Product of which these examples are part of +// valid End User License Agreement for the Arm Product of which these examples are part of // and your compliance with all applicable terms and conditions of such licence agreement. // @@ -101,7 +101,7 @@ #define TT_S1_ATTR_PXN (1 << 53) #define TT_S1_ATTR_UXN (1 << 54) -// PBHA bits[62:59] - If Armv8.2-TTPBHA is implemented, hardware can use these bits +// PBHA bits[62:59] - If Armv8.2-TTPBHA is implemented, hardware can use these bits // for IMPLEMENTATIONDEFINED purposes, otherwise IGNORED #define TT_S1_MAIR_DEV_nGnRnE 0b00000000 diff --git a/ports_module/cortex_a35/ac6/example_build/sample_threadx_module_manager/v8_system.h b/ports_module/cortex_a35/ac6/example_build/sample_threadx_module_manager/v8_system.h index ff96deff..a62d2a33 100644 --- a/ports_module/cortex_a35/ac6/example_build/sample_threadx_module_manager/v8_system.h +++ b/ports_module/cortex_a35/ac6/example_build/sample_threadx_module_manager/v8_system.h @@ -3,7 +3,7 @@ // // Copyright (c) 2012-2016 Arm Limited (or its affiliates). All rights reserved. // Use, modification and redistribution of this file is subject to your possession of a -// valid End User License Agreement for the Arm Product of which these examples are part of +// valid End User License Agreement for the Arm Product of which these examples are part of // and your compliance with all applicable terms and conditions of such licence agreement. // diff --git a/ports_module/cortex_a35/ac6/example_build/sample_threadx_module_manager/v8_utils.S b/ports_module/cortex_a35/ac6/example_build/sample_threadx_module_manager/v8_utils.S index f0fcef26..888892a0 100644 --- a/ports_module/cortex_a35/ac6/example_build/sample_threadx_module_manager/v8_utils.S +++ b/ports_module/cortex_a35/ac6/example_build/sample_threadx_module_manager/v8_utils.S @@ -3,7 +3,7 @@ // // Copyright (c) 2013-2017 Arm Limited (or its affiliates). All rights reserved. // Use, modification and redistribution of this file is subject to your possession of a -// valid End User License Agreement for the Arm Product of which these examples are part of +// valid End User License Agreement for the Arm Product of which these examples are part of // and your compliance with all applicable terms and conditions of such licence agreement. // diff --git a/ports_module/cortex_a35/ac6/example_build/sample_threadx_module_manager/vectors.S b/ports_module/cortex_a35/ac6/example_build/sample_threadx_module_manager/vectors.S index 9e60e001..7784f98e 100644 --- a/ports_module/cortex_a35/ac6/example_build/sample_threadx_module_manager/vectors.S +++ b/ports_module/cortex_a35/ac6/example_build/sample_threadx_module_manager/vectors.S @@ -3,7 +3,7 @@ // // Copyright (c) 2014-2016 Arm Limited (or its affiliates). All rights reserved. // Use, modification and redistribution of this file is subject to your possession of a -// valid End User License Agreement for the Arm Product of which these examples are part of +// valid End User License Agreement for the Arm Product of which these examples are part of // and your compliance with all applicable terms and conditions of such licence agreement. // ------------------------------------------------------------ diff --git a/ports_module/cortex_a35/ac6/example_build/tx/.cproject b/ports_module/cortex_a35/ac6/example_build/tx/.cproject index 51f626a6..be84e260 100644 --- a/ports_module/cortex_a35/ac6/example_build/tx/.cproject +++ b/ports_module/cortex_a35/ac6/example_build/tx/.cproject @@ -1,172 +1,172 @@ <?xml version="1.0" encoding="UTF-8" standalone="no"?> <?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage"> - + <storageModule moduleId="org.eclipse.cdt.core.settings"> - + <cconfiguration id="com.arm.eclipse.build.config.v6.lib.debug.base.332565915"> - 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+ <folderInfo id="com.arm.eclipse.build.config.v6.lib.debug.base.332565915." name="/" resourcePath=""> - + <toolChain id="com.arm.toolchain.v6.lib.debug.base.var.arm_compiler_6-6.174366982" name="Arm Compiler 6" superClass="com.arm.toolchain.v6.lib.debug.base.var.arm_compiler_6-6"> - + <option id="com.arm.toolchain.v6.base.options.target.cpu_fpu.319260876" superClass="com.arm.toolchain.v6.base.options.target.cpu_fpu" useByScannerDiscovery="false" value="Cortex-A35.AArch64.ARMv8.Neon.Crypto" valueType="string"/> - + <option id="com.arm.toolchain.v6.base.options.debug.level.287044124" name="Debug Level" superClass="com.arm.toolchain.v6.base.options.debug.level" useByScannerDiscovery="false" value="com.arm.tool.c.compiler.v6.base.options.debug.level.std" valueType="enumerated"/> - + <targetPlatform id="com.arm.toolchain.v6.lib.debug.base.var.arm_compiler_6-6.174366982.1434986226" name=""/> - + <builder autoBuildTarget="all" buildPath="${workspace_loc:/tx}/Debug" cleanBuildTarget="clean" enableAutoBuild="false" enableCleanBuild="true" enabledIncrementalBuild="true" id="com.arm.toolchain.v6.builder.2017005160" incrementalBuildTarget="all" keepEnvironmentInBuildfile="false" managedBuildOn="true" name="Gnu Make Builder" parallelBuildOn="true" parallelizationNumber="8" superClass="com.arm.toolchain.v6.builder"/> - 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+ </tool> - + <tool id="com.arm.tool.c.linker.v6.base.var.arm_compiler_6-6.302832878" name="Arm Linker 6" superClass="com.arm.tool.c.linker.v6.base.var.arm_compiler_6-6"/> - + <tool id="com.arm.tool.librarian.v6.base.var.arm_compiler_6-6.1893346540" name="Arm Librarian 6" superClass="com.arm.tool.librarian.v6.base.var.arm_compiler_6-6"/> - + </toolChain> - + </folderInfo> - + <sourceEntries> - + <entry excluding="src_generic/tx_misra.c" flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name=""/> - + </sourceEntries> - + </configuration> - + </storageModule> - + <storageModule moduleId="org.eclipse.cdt.core.externalSettings"/> - + </cconfiguration> - + </storageModule> - + <storageModule moduleId="cdtBuildSystem" version="4.0.0"> - + <project id="tx.com.arm.eclipse.build.project.v6.lib.1209080418" name="Static Library"/> - + </storageModule> - + <storageModule moduleId="scannerConfiguration"> - + <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/> - + </storageModule> - + <storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/> - + <storageModule moduleId="refreshScope" versionNumber="2"> - + <configuration configurationName="Debug"> - + <resource resourceType="PROJECT" workspacePath="/tx"/> - + </configuration> - + <configuration configurationName="Release"> - + <resource resourceType="PROJECT" workspacePath="/tx"/> - + </configuration> - + </storageModule> - + <storageModule moduleId="org.eclipse.cdt.make.core.buildtargets"/> - + <storageModule moduleId="com.arm.projectSettings" version="6.0.0"/> - + </cproject> diff --git a/ports_module/cortex_a35/ac6/example_build/txm/.cproject b/ports_module/cortex_a35/ac6/example_build/txm/.cproject index dddf4382..b1d86a47 100644 --- a/ports_module/cortex_a35/ac6/example_build/txm/.cproject +++ b/ports_module/cortex_a35/ac6/example_build/txm/.cproject @@ -1,172 +1,172 @@ <?xml version="1.0" encoding="UTF-8" standalone="no"?> <?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage"> - + <storageModule moduleId="org.eclipse.cdt.core.settings"> - + <cconfiguration id="com.arm.eclipse.build.config.v6.lib.debug.base.1507005551"> - + <storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.arm.eclipse.build.config.v6.lib.debug.base.1507005551" moduleId="org.eclipse.cdt.core.settings" name="Debug"> - + <externalSettings> - + <externalSetting> - + <entry flags="VALUE_WORKSPACE_PATH" kind="includePath" name="/tx"/> - + <entry flags="VALUE_WORKSPACE_PATH" kind="includePath" name="/txm"/> - + <entry flags="VALUE_WORKSPACE_PATH" kind="libraryPath" name="/tx/Debug"/> - + <entry flags="VALUE_WORKSPACE_PATH" kind="libraryPath" name="/txm/Debug"/> - + <entry flags="RESOLVED" kind="libraryFile" name="tx" srcPrefixMapping="" srcRootPath=""/> - + <entry flags="RESOLVED" kind="libraryFile" name="txm" srcPrefixMapping="" srcRootPath=""/> - + </externalSetting> - + </externalSettings> - + <extensions> - + <extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/> - + <extension id="com.arm.eclipse.builder.armcc.error" point="org.eclipse.cdt.core.ErrorParser"/> - + <extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/> - + </extensions> - + </storageModule> - + <storageModule moduleId="cdtBuildSystem" version="4.0.0"> - + <configuration artifactExtension="a" artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.staticLib" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.staticLib,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.debug" cleanCommand="clean" description="" id="com.arm.eclipse.build.config.v6.lib.debug.base.1507005551" name="Debug" parent="com.arm.eclipse.build.config.v6.lib.debug.base"> - + <folderInfo id="com.arm.eclipse.build.config.v6.lib.debug.base.1507005551." name="/" resourcePath=""> - + <toolChain id="com.arm.toolchain.v6.lib.debug.base.var.arm_compiler_6-6.1022814766" name="Arm Compiler 6" superClass="com.arm.toolchain.v6.lib.debug.base.var.arm_compiler_6-6"> - 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+ <listOptionValue builtIn="false" value=""${workspace_loc:/${ProjName}/inc_generic}""/> - + <listOptionValue builtIn="false" value=""${workspace_loc:/${ProjName}/inc_port}""/> - + <listOptionValue builtIn="false" value=""${workspace_loc:/${ProjName}/inc_generic_modules}""/> - + <listOptionValue builtIn="false" value=""${workspace_loc:/${ProjName}/inc_generic_module_manager}""/> - + </option> - + <option id="com.arm.tool.c.compiler.v6.base.options.debug.level.536480260" name="Debug Level" superClass="com.arm.tool.c.compiler.v6.base.options.debug.level" useByScannerDiscovery="true" value="com.arm.tool.c.compiler.v6.base.options.debug.level.std" valueType="enumerated"/> - + <option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="true" id="com.arm.tool.c.compiler.v6.base.option.flags.292072134" name="Other flags" superClass="com.arm.tool.c.compiler.v6.base.option.flags" useByScannerDiscovery="true" valueType="stringList"/> - + <inputType id="com.arm.tool.c.compiler.v6.base.input.1961882835" superClass="com.arm.tool.c.compiler.v6.base.input"/> - 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+ <option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="true" id="com.arm.tool.assembler.v6.base.option.flags.1542396439" name="Other flags" superClass="com.arm.tool.assembler.v6.base.option.flags" useByScannerDiscovery="true" valueType="stringList"/> - + <inputType id="com.arm.tool.assembler.v6.base.input.1847017761" superClass="com.arm.tool.assembler.v6.base.input"/> - + </tool> - + <tool id="com.arm.tool.c.linker.v6.base.var.arm_compiler_6-6.1124663047" name="Arm Linker 6" superClass="com.arm.tool.c.linker.v6.base.var.arm_compiler_6-6"/> - + <tool id="com.arm.tool.librarian.v6.base.var.arm_compiler_6-6.1439633481" name="Arm Librarian 6" superClass="com.arm.tool.librarian.v6.base.var.arm_compiler_6-6"/> - + </toolChain> - + </folderInfo> - + </configuration> - + </storageModule> - + <storageModule moduleId="org.eclipse.cdt.core.externalSettings"/> - + </cconfiguration> - + </storageModule> - + <storageModule moduleId="cdtBuildSystem" version="4.0.0"> - + <project id="tx.com.arm.eclipse.build.project.v6.lib.1408735755" name="Static Library"/> - + </storageModule> - + <storageModule moduleId="scannerConfiguration"> - + <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/> - + </storageModule> - + <storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/> - + <storageModule moduleId="refreshScope" versionNumber="2"> - + <configuration configurationName="Debug"> - + <resource resourceType="PROJECT" workspacePath="/txm"/> - + </configuration> - + <configuration configurationName="Release"> - + <resource resourceType="PROJECT" workspacePath="/tx"/> - + </configuration> - + </storageModule> - + <storageModule moduleId="com.arm.projectSettings" version="6.0.0"/> - + <storageModule moduleId="org.eclipse.cdt.make.core.buildtargets"/> - + </cproject> diff --git a/ports_module/cortex_a35/ac6/inc/tx_port.h b/ports_module/cortex_a35/ac6/inc/tx_port.h index 92dc14f3..657ad451 100644 --- a/ports_module/cortex_a35/ac6/inc/tx_port.h +++ b/ports_module/cortex_a35/ac6/inc/tx_port.h @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -42,12 +43,6 @@ /* own special types that can be mapped to actual data types by this */ /* file to guarantee consistency in the interface and functionality. */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 12-31-2020 Andres Mlinar Initial Version 6.1.3 */ -/* */ /**************************************************************************/ #ifndef TX_PORT_H @@ -59,7 +54,7 @@ #ifdef TX_INCLUDE_USER_DEFINE_FILE -/* Yes, include the user defines in tx_user.h. The defines in this file may +/* Yes, include the user defines in tx_user.h. The defines in this file may alternately be defined on the command line. */ #include "tx_user.h" @@ -119,19 +114,19 @@ typedef unsigned long long ALIGN_TYPE; #define TX_TIMER_THREAD_STACK_SIZE 4096 /* Default timer thread stack size */ #endif -#ifndef TX_TIMER_THREAD_PRIORITY +#ifndef TX_TIMER_THREAD_PRIORITY #define TX_TIMER_THREAD_PRIORITY 0 /* Default timer thread priority */ #endif -/* Define various constants for the ThreadX Cortex ARMv8 port. */ +/* Define various constants for the ThreadX Cortex ARMv8 port. */ #define TX_INT_DISABLE 0xC0 /* Disable IRQ & FIQ interrupts */ #define TX_INT_ENABLE 0x00 /* Enable IRQ & FIQ interrupts */ -/* Define the clock source for trace event entry time stamp. The following two item are port specific. - For example, if the time source is at the address 0x0a800024 and is 16-bits in size, the clock +/* Define the clock source for trace event entry time stamp. The following two item are port specific. + For example, if the time source is at the address 0x0a800024 and is 16-bits in size, the clock source constants would be: #define TX_TRACE_TIME_SOURCE *((ULONG *) 0x0a800024) @@ -189,7 +184,7 @@ ULONG _tx_misra_time_stamp_get(VOID); #endif -/* Determine whether or not stack checking is enabled. By default, ThreadX stack checking is +/* Determine whether or not stack checking is enabled. By default, ThreadX stack checking is disabled. When the following is defined, ThreadX thread stack checking is enabled. If stack checking is enabled (TX_ENABLE_STACK_CHECKING is defined), the TX_DISABLE_STACK_FILLING define is negated, thereby forcing the stack fill which is necessary for the stack checking @@ -203,7 +198,7 @@ ULONG _tx_misra_time_stamp_get(VOID); /* Define the TX_THREAD control block extensions for this port. The main reason - for the multiple macros is so that backward compatibility can be maintained with + for the multiple macros is so that backward compatibility can be maintained with existing ThreadX kernel awareness modules. */ #define TX_THREAD_EXTENSION_0 @@ -243,11 +238,11 @@ ULONG _tx_misra_time_stamp_get(VOID); VOID (*tx_timer_module_expiration_function)(ULONG id); -/* Define the user extension field of the thread control block. Nothing +/* Define the user extension field of the thread control block. Nothing additional is needed for this port so it is defined as white space. */ #ifndef TX_THREAD_USER_EXTENSION -#define TX_THREAD_USER_EXTENSION +#define TX_THREAD_USER_EXTENSION #endif @@ -255,8 +250,8 @@ ULONG _tx_misra_time_stamp_get(VOID); tx_thread_shell_entry, and tx_thread_terminate. */ -#define TX_THREAD_CREATE_EXTENSION(thread_ptr) -#define TX_THREAD_DELETE_EXTENSION(thread_ptr) +#define TX_THREAD_CREATE_EXTENSION(thread_ptr) +#define TX_THREAD_DELETE_EXTENSION(thread_ptr) #define TX_THREAD_COMPLETED_EXTENSION(thread_ptr) #define TX_THREAD_TERMINATED_EXTENSION(thread_ptr) @@ -283,8 +278,8 @@ ULONG _tx_misra_time_stamp_get(VOID); #define TX_TIMER_DELETE_EXTENSION(timer_ptr) -/* Determine if the ARM architecture has the CLZ instruction. This is available on - architectures v5 and above. If available, redefine the macro for calculating the +/* Determine if the ARM architecture has the CLZ instruction. This is available on + architectures v5 and above. If available, redefine the macro for calculating the lowest bit set. */ #ifndef TX_DISABLE_INLINE @@ -296,7 +291,7 @@ ULONG _tx_misra_time_stamp_get(VOID); /* Define the internal timer extension to also hold the thread pointer such that _tx_thread_timeout can figure out what thread timeout to process. */ - + #define TX_TIMER_INTERNAL_EXTENSION VOID *tx_timer_internal_thread_timeout_ptr; @@ -312,9 +307,9 @@ ULONG _tx_misra_time_stamp_get(VOID); #define TX_THREAD_TIMEOUT_POINTER_SETUP(t) (t) = (TX_THREAD *) _tx_timer_expired_timer_ptr -> tx_timer_internal_thread_timeout_ptr; -/* Define ThreadX interrupt lockout and restore macros for protection on - access of critical kernel information. The restore interrupt macro must - restore the interrupt posture of the running thread prior to the value +/* Define ThreadX interrupt lockout and restore macros for protection on + access of critical kernel information. The restore interrupt macro must + restore the interrupt posture of the running thread prior to the value present prior to the disable macro. In most cases, the save area macro is used to define a local function save area for the disable and restore macros. */ @@ -385,8 +380,8 @@ VOID tx_thread_fp_disable(VOID); /* Define the version ID of ThreadX. This may be utilized by the application. */ #ifdef TX_THREAD_INIT -CHAR _tx_version_id[] = - "Copyright (c) 2024 Microsoft Corporation. * ThreadX Modules Cortex-A35/AC6 Version 6.4.2 *"; +CHAR _tx_version_id[] = + "(c) 2024 Microsoft Corp. (c) 2026-present Eclipse ThreadX contributors. * ThreadX Modules Cortex-A35/AC6 Version 6.5.0.202601 *"; #else extern CHAR _tx_version_id[]; #endif diff --git a/ports_module/cortex_a35/ac6/inc/txm_module_port.h b/ports_module/cortex_a35/ac6/inc/txm_module_port.h index 44009c55..cbe6b8e3 100644 --- a/ports_module/cortex_a35/ac6/inc/txm_module_port.h +++ b/ports_module/cortex_a35/ac6/inc/txm_module_port.h @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -35,12 +36,6 @@ /* This file defines the basic module constants, interface structures, */ /* and function prototypes. */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 12-31-2020 Andres Mlinar Initial Version 6.1.3 */ -/* */ /**************************************************************************/ #ifndef TXM_MODULE_PORT_H @@ -278,6 +273,6 @@ ALIGN_TYPE _txm_module_manager_port_dispatch(TXM_MODULE_INSTANCE *module_instanc #define TXM_MODULE_MANAGER_VERSION_ID \ CHAR _txm_module_manager_version_id[] = \ - "Copyright (c) 2024 Microsoft Corporation. * ThreadX Module Cortex-A35/AC6 Version 6.4.2 *"; + "Copyright (c) 2024 Microsoft Corporation. * ThreadX Module Cortex-A35/AC6 Version 6.5.0.202601 *"; #endif diff --git a/ports_module/cortex_a35/ac6/module_lib/src/txm_module_initialize.S b/ports_module/cortex_a35/ac6/module_lib/src/txm_module_initialize.S index c98ad715..2a04ce86 100644 --- a/ports_module/cortex_a35/ac6/module_lib/src/txm_module_initialize.S +++ b/ports_module/cortex_a35/ac6/module_lib/src/txm_module_initialize.S @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ diff --git a/ports_module/cortex_a35/ac6/module_lib/src/txm_module_thread_shell_entry.c b/ports_module/cortex_a35/ac6/module_lib/src/txm_module_thread_shell_entry.c index e24e27be..adf4163f 100644 --- a/ports_module/cortex_a35/ac6/module_lib/src/txm_module_thread_shell_entry.c +++ b/ports_module/cortex_a35/ac6/module_lib/src/txm_module_thread_shell_entry.c @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -80,12 +81,6 @@ ALIGN_TYPE (*_txm_module_kernel_call_dispatcher)(ULONG type /* */ /* Initial thread stack frame */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 12-31-2020 Andres Mlinar Initial Version 6.1.3 */ -/* */ /**************************************************************************/ VOID _txm_module_thread_shell_entry(TX_THREAD *thread_ptr, TXM_MODULE_THREAD_ENTRY_INFO *thread_info) { @@ -122,7 +117,7 @@ VOID (*entry_exit_notify)(TX_THREAD *notify_thread_ptr, UINT type); An error here typically indicates the resident portion of _tx_thread_schedule is not supporting the trap to obtain the function pointer. */ } - + /* Resume the module's callback thread, already created in the manager. */ _txe_thread_resume(thread_info -> txm_module_thread_entry_info_callback_request_thread); } diff --git a/ports_module/cortex_a35/ac6/module_manager/src/tx_thread_context_restore.S b/ports_module/cortex_a35/ac6/module_manager/src/tx_thread_context_restore.S index 655674de..93c46c88 100644 --- a/ports_module/cortex_a35/ac6/module_manager/src/tx_thread_context_restore.S +++ b/ports_module/cortex_a35/ac6/module_manager/src/tx_thread_context_restore.S @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -55,12 +56,6 @@ /* */ /* ISRs Interrupt Service Routines */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 12-31-2020 Andres Mlinar Initial Version 6.1.3 */ -/* */ /**************************************************************************/ // VOID _tx_thread_context_restore(VOID) // { @@ -86,13 +81,13 @@ _tx_thread_context_restore: LDR x3, =_tx_thread_system_state // Pickup address of system state var LDR w2, [x3, #0] // Pickup system state SUB w2, w2, #1 // Decrement the counter - STR w2, [x3, #0] // Store the counter + STR w2, [x3, #0] // Store the counter CMP w2, #0 // Was this the first interrupt? BEQ __tx_thread_not_nested_restore // If so, not a nested restore /* Interrupts are nested. */ - /* Just recover the saved registers and return to the point of + /* Just recover the saved registers and return to the point of interrupt. */ LDP x4, x5, [sp], #16 // Pickup saved SPSR/DAIF and ELR_EL diff --git a/ports_module/cortex_a35/ac6/module_manager/src/tx_thread_context_save.S b/ports_module/cortex_a35/ac6/module_manager/src/tx_thread_context_save.S index ce4fec26..b2d8af34 100644 --- a/ports_module/cortex_a35/ac6/module_manager/src/tx_thread_context_save.S +++ b/ports_module/cortex_a35/ac6/module_manager/src/tx_thread_context_save.S @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -54,12 +55,6 @@ /* */ /* ISRs */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 12-31-2020 Andres Mlinar Initial Version 6.1.3 */ -/* */ /**************************************************************************/ // VOID _tx_thread_context_save(VOID) // { @@ -68,7 +63,7 @@ _tx_thread_context_save: /* Upon entry to this routine, it is assumed that IRQ/FIQ interrupts are locked - out, x29 (frame pointer), x30 (link register) are saved, we are in EL1, + out, x29 (frame pointer), x30 (link register) are saved, we are in EL1, and all other registers are intact. */ /* Check for a nested interrupt condition. */ @@ -137,7 +132,7 @@ __tx_thread_not_nested_save: LDR x1, =_tx_thread_current_ptr // Pickup address of current thread ptr LDR x0, [x1, #0] // Pickup current thread pointer CMP x0, #0 // Is it NULL? - BEQ __tx_thread_idle_system_save // If so, interrupt occurred in + BEQ __tx_thread_idle_system_save // If so, interrupt occurred in // scheduling loop - nothing needs saving! /* Save minimal context of interrupted thread. */ @@ -196,7 +191,7 @@ __tx_thread_idle_system_save: /* Interrupt occurred in the scheduling loop. */ - /* Not much to do here, just adjust the stack pointer, and return to IRQ + /* Not much to do here, just adjust the stack pointer, and return to IRQ processing. */ #ifdef TX_ENABLE_EXECUTION_CHANGE_NOTIFY @@ -209,8 +204,8 @@ __tx_thread_idle_system_save: #endif ADD sp, sp, #48 // Recover saved registers - RET // Continue IRQ processing + RET // Continue IRQ processing // } -// } +// } diff --git a/ports_module/cortex_a35/ac6/module_manager/src/tx_thread_fp_disable.c b/ports_module/cortex_a35/ac6/module_manager/src/tx_thread_fp_disable.c index b045bdab..aa96ffb0 100644 --- a/ports_module/cortex_a35/ac6/module_manager/src/tx_thread_fp_disable.c +++ b/ports_module/cortex_a35/ac6/module_manager/src/tx_thread_fp_disable.c @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -58,12 +59,6 @@ /* */ /* Application Code */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 12-31-2020 Andres Mlinar Initial Version 6.1.3 */ -/* */ /**************************************************************************/ VOID _tx_thread_fp_disable(VOID) { @@ -81,11 +76,11 @@ ULONG system_state; /* Make sure it is not NULL. */ if (thread_ptr != TX_NULL) { - + /* Thread is running... make sure the call is from the thread context. */ if (system_state == 0) { - + /* Yes, now set the FP enable flag to false in the TX_THREAD structure. */ thread_ptr -> tx_thread_fp_enable = TX_FALSE; } diff --git a/ports_module/cortex_a35/ac6/module_manager/src/tx_thread_fp_enable.c b/ports_module/cortex_a35/ac6/module_manager/src/tx_thread_fp_enable.c index 80ef1e7e..2cf3ba17 100644 --- a/ports_module/cortex_a35/ac6/module_manager/src/tx_thread_fp_enable.c +++ b/ports_module/cortex_a35/ac6/module_manager/src/tx_thread_fp_enable.c @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -58,12 +59,6 @@ /* */ /* Application Code */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 12-31-2020 Andres Mlinar Initial Version 6.1.3 */ -/* */ /**************************************************************************/ VOID _tx_thread_fp_enable(VOID) { @@ -81,11 +76,11 @@ ULONG system_state; /* Make sure it is not NULL. */ if (thread_ptr != TX_NULL) { - + /* Thread is running... make sure the call is from the thread context. */ if (system_state == 0) { - + /* Yes, now setup the FP enable flag in the TX_THREAD structure. */ thread_ptr -> tx_thread_fp_enable = TX_TRUE; } diff --git a/ports_module/cortex_a35/ac6/module_manager/src/tx_thread_interrupt_control.S b/ports_module/cortex_a35/ac6/module_manager/src/tx_thread_interrupt_control.S index 0bb03ed4..60cf4982 100644 --- a/ports_module/cortex_a35/ac6/module_manager/src/tx_thread_interrupt_control.S +++ b/ports_module/cortex_a35/ac6/module_manager/src/tx_thread_interrupt_control.S @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -53,12 +54,6 @@ /* */ /* Application Code */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 12-31-2020 Andres Mlinar Initial Version 6.1.3 */ -/* */ /**************************************************************************/ // UINT _tx_thread_interrupt_control(UINT new_posture) // { diff --git a/ports_module/cortex_a35/ac6/module_manager/src/tx_thread_interrupt_disable.S b/ports_module/cortex_a35/ac6/module_manager/src/tx_thread_interrupt_disable.S index f5ee54a2..72742e7a 100644 --- a/ports_module/cortex_a35/ac6/module_manager/src/tx_thread_interrupt_disable.S +++ b/ports_module/cortex_a35/ac6/module_manager/src/tx_thread_interrupt_disable.S @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -52,12 +53,6 @@ /* */ /* Application Code */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 12-31-2020 Andres Mlinar Initial Version 6.1.3 */ -/* */ /**************************************************************************/ // UINT _tx_thread_interrupt_disable(void) // { diff --git a/ports_module/cortex_a35/ac6/module_manager/src/tx_thread_interrupt_restore.S b/ports_module/cortex_a35/ac6/module_manager/src/tx_thread_interrupt_restore.S index 5ed509d8..42643576 100644 --- a/ports_module/cortex_a35/ac6/module_manager/src/tx_thread_interrupt_restore.S +++ b/ports_module/cortex_a35/ac6/module_manager/src/tx_thread_interrupt_restore.S @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -53,12 +54,6 @@ /* */ /* Application Code */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 12-31-2020 Andres Mlinar Initial Version 6.1.3 */ -/* */ /**************************************************************************/ // UINT _tx_thread_interrupt_restore(UINT old_posture) // { diff --git a/ports_module/cortex_a35/ac6/module_manager/src/tx_thread_schedule.S b/ports_module/cortex_a35/ac6/module_manager/src/tx_thread_schedule.S index 1193fdca..f86f4212 100644 --- a/ports_module/cortex_a35/ac6/module_manager/src/tx_thread_schedule.S +++ b/ports_module/cortex_a35/ac6/module_manager/src/tx_thread_schedule.S @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -56,12 +57,6 @@ /* _tx_thread_system_return Return to system from thread */ /* _tx_thread_context_restore Restore thread's context */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 12-31-2020 Andres Mlinar Initial Version 6.1.3 */ -/* */ /**************************************************************************/ // VOID _tx_thread_schedule(VOID) // { @@ -76,15 +71,15 @@ _tx_thread_schedule: // Wait for a thread to execute. */ // do // { - + LDR x1, =_tx_thread_execute_ptr // Address of thread execute ptr #ifdef TX_ENABLE_WFI __tx_thread_schedule_loop: LDR x0, [x1, #0] // Pickup next thread to execute CMP x0, #0 // Is it NULL? - BNE _tx_thread_schedule_thread // - WFI // + BNE _tx_thread_schedule_thread // + WFI // B __tx_thread_schedule_loop // Keep looking for a thread _tx_thread_schedule_thread: #else @@ -96,7 +91,7 @@ __tx_thread_schedule_loop: // } // while(_tx_thread_execute_ptr == TX_NULL); - + /* Yes! We have a thread to execute. Lockout interrupts and transfer control to it. */ @@ -105,7 +100,7 @@ __tx_thread_schedule_loop: /* Setup the current thread pointer. */ // _tx_thread_current_ptr = _tx_thread_execute_ptr; - LDR x1, =_tx_thread_current_ptr // Pickup address of current thread + LDR x1, =_tx_thread_current_ptr // Pickup address of current thread STR x0, [x1, #0] // Setup current thread pointer /* Increment the run count for this thread. */ @@ -119,7 +114,7 @@ __tx_thread_schedule_loop: /* Setup time-slice, if present. */ // _tx_timer_time_slice = _tx_thread_current_ptr -> tx_thread_time_slice; - LDR x2, =_tx_timer_time_slice // Pickup address of time slice + LDR x2, =_tx_timer_time_slice // Pickup address of time slice // variable LDR x4, [x0, #8] // Switch stack pointers MOV sp, x4 // diff --git a/ports_module/cortex_a35/ac6/module_manager/src/tx_thread_stack_build.S b/ports_module/cortex_a35/ac6/module_manager/src/tx_thread_stack_build.S index 37c22e90..bacd87eb 100644 --- a/ports_module/cortex_a35/ac6/module_manager/src/tx_thread_stack_build.S +++ b/ports_module/cortex_a35/ac6/module_manager/src/tx_thread_stack_build.S @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -55,12 +56,6 @@ /* */ /* _tx_thread_create Create thread service */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 12-31-2020 Andres Mlinar Initial Version 6.1.3 */ -/* */ /**************************************************************************/ // VOID _tx_thread_stack_build(TX_THREAD *thread_ptr, VOID (*function_ptr)(VOID)) // { diff --git a/ports_module/cortex_a35/ac6/module_manager/src/tx_thread_system_return.S b/ports_module/cortex_a35/ac6/module_manager/src/tx_thread_system_return.S index 4c5af0dc..e4cebb03 100644 --- a/ports_module/cortex_a35/ac6/module_manager/src/tx_thread_system_return.S +++ b/ports_module/cortex_a35/ac6/module_manager/src/tx_thread_system_return.S @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -55,12 +56,6 @@ /* */ /* ThreadX components */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 12-31-2020 Andres Mlinar Initial Version 6.1.3 */ -/* */ /**************************************************************************/ // VOID _tx_thread_system_return(VOID) // { diff --git a/ports_module/cortex_a35/ac6/module_manager/src/tx_timer_interrupt.S b/ports_module/cortex_a35/ac6/module_manager/src/tx_timer_interrupt.S index 895b5a7d..bad45ccd 100644 --- a/ports_module/cortex_a35/ac6/module_manager/src/tx_timer_interrupt.S +++ b/ports_module/cortex_a35/ac6/module_manager/src/tx_timer_interrupt.S @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -57,12 +58,6 @@ /* */ /* interrupt vector */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 12-31-2020 Andres Mlinar Initial Version 6.1.3 */ -/* */ /**************************************************************************/ // VOID _tx_timer_interrupt(VOID) // { @@ -86,7 +81,7 @@ _tx_timer_interrupt: // if (_tx_timer_time_slice) // { - LDR x3, =_tx_timer_time_slice // Pickup address of time-slice + LDR x3, =_tx_timer_time_slice // Pickup address of time-slice LDR w2, [x3, #0] // Pickup time-slice CMP w2, #0 // Is it non-active? BEQ __tx_timer_no_time_slice // Yes, skip time-slice processing @@ -203,7 +198,7 @@ __tx_timer_dont_activate: // if (_tx_timer_expired_time_slice) // { - LDR x3, =_tx_timer_expired_time_slice // Pickup addr of time-slice expired + LDR x3, =_tx_timer_expired_time_slice // Pickup addr of time-slice expired LDR w2, [x3, #0] // Pickup the actual flag CMP w2, #0 // See if the flag is set BEQ __tx_timer_not_ts_expiration // No, skip time-slice processing diff --git a/ports_module/cortex_a35/ac6/module_manager/src/txm_module_manager_port_dispatch.c b/ports_module/cortex_a35/ac6/module_manager/src/txm_module_manager_port_dispatch.c index 2a399a17..5cd9edd6 100644 --- a/ports_module/cortex_a35/ac6/module_manager/src/txm_module_manager_port_dispatch.c +++ b/ports_module/cortex_a35/ac6/module_manager/src/txm_module_manager_port_dispatch.c @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -59,12 +60,6 @@ /* */ /* _txm_module_manager_kernel_dispatch */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 12-31-2020 Andres Mlinar Initial Version 6.1.3 */ -/* */ /**************************************************************************/ ALIGN_TYPE _txm_module_manager_port_dispatch(TXM_MODULE_INSTANCE *module_instance, ULONG kernel_request, ALIGN_TYPE param_0, ALIGN_TYPE param_1, ALIGN_TYPE param_2) { @@ -79,6 +74,6 @@ ALIGN_TYPE return_value = TX_NOT_AVAILABLE; break; } } - + return(return_value); } diff --git a/ports_module/cortex_a35/ac6/module_manager/src/txm_module_manager_thread_stack_build.S b/ports_module/cortex_a35/ac6/module_manager/src/txm_module_manager_thread_stack_build.S index de09130c..8ecb5044 100644 --- a/ports_module/cortex_a35/ac6/module_manager/src/txm_module_manager_thread_stack_build.S +++ b/ports_module/cortex_a35/ac6/module_manager/src/txm_module_manager_thread_stack_build.S @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -55,12 +56,6 @@ /* */ /* _tx_thread_create Create thread service */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 12-31-2020 Andres Mlinar Initial Version 6.1.3 */ -/* */ /**************************************************************************/ // VOID _txm_module_manager_thread_stack_build(TX_THREAD *thread_ptr, VOID (*function_ptr)(TX_THREAD *, TXM_MODULE_INSTANCE *)) // { diff --git a/ports_module/cortex_a35/ac6/readme_threadx.txt b/ports_module/cortex_a35/ac6/readme_threadx.txt index e8c6ce96..3c522c31 100644 --- a/ports_module/cortex_a35/ac6/readme_threadx.txt +++ b/ports_module/cortex_a35/ac6/readme_threadx.txt @@ -1,20 +1,20 @@ - Microsoft's Azure RTOS ThreadX Modules for Cortex-A35 + Microsoft's Azure RTOS ThreadX Modules for Cortex-A35 Using the ARM Compiler 6 & DS 1. Import the ThreadX Modules Projects -In order to build the ThreadX library and the ThreadX demonstration, first import +In order to build the ThreadX library and the ThreadX demonstration, first import the 'tx', 'txm', 'sample_threadx', 'sample_threadx_module' and -'sample_thread_module_manager' projects (located in the "example_build" directory) +'sample_thread_module_manager' projects (located in the "example_build" directory) into your DS workspace. 2. Building the ThreadX run-time Library -Building the ThreadX library is easy; simply select the Eclipse project file -"tx" and then select the build button. You should now observe the compilation -and assembly of the ThreadX library. This project build produces the ThreadX +Building the ThreadX library is easy; simply select the Eclipse project file +"tx" and then select the build button. You should now observe the compilation +and assembly of the ThreadX library. This project build produces the ThreadX library file tx.a. To bild the ThreadX Module library select the project "txm" and select the build button to produce the file txm.a. @@ -36,8 +36,8 @@ First build the ThreadX sample module project sample_thread_module by selecting clicking the build button. Next built the ThreadX Module Manager sample by selecting sample_threadx_module_manager and clicking the build button. -To run the ThreadX Module Manager demo in the sample_threadx_module_manager project, -right-click on the sample_threadx_module_manager.launch file and select 'Debug As -> sample_threadx'. +To run the ThreadX Module Manager demo in the sample_threadx_module_manager project, +right-click on the sample_threadx_module_manager.launch file and select 'Debug As -> sample_threadx'. The debugger is setup for the Cortex-A35 FVP, so selecting "Debug" will launch the FVP, load the sample_threadx.axf ELF file and run to the entry point. You are now ready to execute the ThreadX demonstration. @@ -45,29 +45,29 @@ the ThreadX demonstration. 4. System Initialization -The entry point in ThreadX for the Cortex-A35 using AC6 tools is at label -"start64". This is defined within the AC6 compiler's startup code. In addition, -this is where all static and global pre-set C variable initialization processing +The entry point in ThreadX for the Cortex-A35 using AC6 tools is at label +"start64". This is defined within the AC6 compiler's startup code. In addition, +this is where all static and global pre-set C variable initialization processing takes place. -The ThreadX tx_initialize_low_level.s file is responsible for determining the -first available RAM address for use by the application, which is supplied as the +The ThreadX tx_initialize_low_level.s file is responsible for determining the +first available RAM address for use by the application, which is supplied as the sole input parameter to your application definition function, tx_application_define. 5. Register Usage and Stack Frames -The 64-bit AC6 compiler assumes that registers x0-x18 are scratch registers -for each function. All other registers used by a C function must be preserved -by the function. ThreadX takes advantage of this in situations where a context -switch happens as a result of making a ThreadX service call (which is itself a -C function). In such cases, the saved context of a thread is only the +The 64-bit AC6 compiler assumes that registers x0-x18 are scratch registers +for each function. All other registers used by a C function must be preserved +by the function. ThreadX takes advantage of this in situations where a context +switch happens as a result of making a ThreadX service call (which is itself a +C function). In such cases, the saved context of a thread is only the non-scratch registers. The following defines the saved context stack frames for context switches that occur as a result of interrupt handling or from thread-level API calls. All suspended threads have one of these two types of stack frames. The top -of the suspended thread's stack is pointed to by tx_thread_stack_ptr in the +of the suspended thread's stack is pointed to by tx_thread_stack_ptr in the associated thread control block TX_THREAD. @@ -108,7 +108,7 @@ FP not enabled and TX_THREAD.tx_thread_fp_enable == 0: 0x0F0 x0 0x0F8 x1 0x100 x29 - 0x108 x30 + 0x108 x30 FP enabled and TX_THREAD.tx_thread_fp_enable == 1: @@ -194,14 +194,14 @@ FP enabled and TX_THREAD.tx_thread_fp_enable == 1: 6. Improving Performance -The distribution version of ThreadX is built without any compiler optimizations. -This makes it easy to debug because you can trace or set breakpoints inside of -ThreadX itself. Of course, this costs some performance. To make it run faster, +The distribution version of ThreadX is built without any compiler optimizations. +This makes it easy to debug because you can trace or set breakpoints inside of +ThreadX itself. Of course, this costs some performance. To make it run faster, you can change the project settings to the desired compiler optimization level. -In addition, you can eliminate the ThreadX basic API error checking by -compiling your application code with the symbol TX_DISABLE_ERROR_CHECKING -defined. +In addition, you can eliminate the ThreadX basic API error checking by +compiling your application code with the symbol TX_DISABLE_ERROR_CHECKING +defined. 7. Interrupt Handling @@ -221,22 +221,22 @@ irq_handler: B _tx_thread_context_restore -By default, ThreadX assumes EL3 level of execution. Running and taking exceptions in EL1 +By default, ThreadX assumes EL3 level of execution. Running and taking exceptions in EL1 and EL2 can be done by simply building the ThreadX library with either EL1 or EL2 defined. 8. ThreadX Timer Interrupt -ThreadX requires a periodic interrupt source to manage all time-slicing, thread sleeps, -timeouts, and application timers. Without such a timer interrupt source, these services -are not functional. However, all other ThreadX services are operational without a +ThreadX requires a periodic interrupt source to manage all time-slicing, thread sleeps, +timeouts, and application timers. Without such a timer interrupt source, these services +are not functional. However, all other ThreadX services are operational without a periodic timer source. 9. ARM FP Support By default, FP support is disabled for each thread. If saving the context of the FP registers -is needed, the following API call must be made from the context of the application thread - before +is needed, the following API call must be made from the context of the application thread - before the FP usage: void tx_thread_fp_enable(void); diff --git a/ports_module/cortex_a35/gnu/example_build/sample_threadx/.cproject b/ports_module/cortex_a35/gnu/example_build/sample_threadx/.cproject index 7eb75c64..0bcc75f1 100644 --- a/ports_module/cortex_a35/gnu/example_build/sample_threadx/.cproject +++ b/ports_module/cortex_a35/gnu/example_build/sample_threadx/.cproject @@ -1,252 +1,252 @@ <?xml version="1.0" encoding="UTF-8" standalone="no"?> <?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage"> - + <storageModule moduleId="org.eclipse.cdt.core.settings"> - + <cconfiguration id="com.arm.eclipse.build.config.v6.exe.debug.base.515451048"> - + <storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.arm.eclipse.build.config.v6.exe.debug.base.515451048" moduleId="org.eclipse.cdt.core.settings" name="Debug"> - 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+ </storageModule> - + <storageModule moduleId="cdtBuildSystem" version="4.0.0"> - + <configuration artifactExtension="axf" artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.release" cleanCommand="clean" description="" id="com.arm.eclipse.build.config.v6.exe.release.base.262471578" name="Release" parent="com.arm.eclipse.build.config.v6.exe.release.base"> - + <folderInfo id="com.arm.eclipse.build.config.v6.exe.release.base.262471578." name="/" resourcePath=""> - + <toolChain id="com.arm.toolchain.v6.exe.release.base.var.arm_compiler_6-6.2039978271" name="Arm Compiler 6" superClass="com.arm.toolchain.v6.exe.release.base.var.arm_compiler_6-6"> - + <targetPlatform id="com.arm.toolchain.v6.exe.release.base.var.arm_compiler_6-6.2039978271.1401365679" name=""/> - + <builder autoBuildTarget="all" buildPath="${workspace_loc:/sample_threadx}/Release" cleanBuildTarget="clean" enableAutoBuild="false" enableCleanBuild="true" enabledIncrementalBuild="true" id="com.arm.toolchain.v6.builder.152908166" incrementalBuildTarget="all" keepEnvironmentInBuildfile="false" managedBuildOn="true" name="Gnu Make Builder" parallelBuildOn="false" superClass="com.arm.toolchain.v6.builder"/> - + <tool id="com.arm.tool.c.compiler.v6.base.var.arm_compiler_6-6.2113724202" name="Arm C Compiler 6" superClass="com.arm.tool.c.compiler.v6.base.var.arm_compiler_6-6"> - + <option id="com.arm.tool.c.compiler.v6.base.option.optlevel.1064912621" name="Optimization level" superClass="com.arm.tool.c.compiler.v6.base.option.optlevel" useByScannerDiscovery="true" value="com.arm.tool.c.compiler.v6.base.option.optlevel.high" valueType="enumerated"/> - + <inputType id="com.arm.tool.c.compiler.v6.base.input.274442412" superClass="com.arm.tool.c.compiler.v6.base.input"/> - + </tool> - + <tool id="com.arm.tool.cpp.compiler.v6.base.var.arm_compiler_6-6.857388488" name="Arm C++ Compiler 6" superClass="com.arm.tool.cpp.compiler.v6.base.var.arm_compiler_6-6"> - + <option id="com.arm.tool.c.compiler.v6.base.option.optlevel.703057645" name="Optimization level" superClass="com.arm.tool.c.compiler.v6.base.option.optlevel" useByScannerDiscovery="true" value="com.arm.tool.c.compiler.v6.base.option.optlevel.high" valueType="enumerated"/> - + </tool> - + <tool id="com.arm.tool.assembler.v6.base.var.arm_compiler_6-6.494258017" name="Arm Assembler 6" superClass="com.arm.tool.assembler.v6.base.var.arm_compiler_6-6"> - + <inputType id="com.arm.tool.assembler.v6.base.input.2016749997" superClass="com.arm.tool.assembler.v6.base.input"/> - + </tool> - + <tool id="com.arm.tool.c.linker.v6.base.var.arm_compiler_6-6.1332640632" name="Arm Linker 6" superClass="com.arm.tool.c.linker.v6.base.var.arm_compiler_6-6"/> - + <tool id="com.arm.tool.librarian.v6.base.var.arm_compiler_6-6.1069857726" name="Arm Librarian 6" superClass="com.arm.tool.librarian.v6.base.var.arm_compiler_6-6"/> - + </toolChain> - + </folderInfo> - + <sourceEntries> - + <entry excluding="startup_el3.S|startup_el2.S|startup_el1.S|startup_old.S" flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name=""/> - + </sourceEntries> - + </configuration> - + </storageModule> - + <storageModule moduleId="org.eclipse.cdt.core.externalSettings"/> - + </cconfiguration> - + </storageModule> - + <storageModule moduleId="cdtBuildSystem" version="4.0.0"> - + <project id="sample_threadx.com.arm.eclipse.build.project.v6.exe.1027551600" name="Executable"/> - + </storageModule> - + <storageModule moduleId="scannerConfiguration"> - + <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/> - + </storageModule> - + <storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/> - + <storageModule moduleId="refreshScope" versionNumber="2"> - + <configuration configurationName="Debug"> - + <resource resourceType="PROJECT" workspacePath="/sample_threadx"/> - + </configuration> - + <configuration configurationName="Release"> - + <resource resourceType="PROJECT" workspacePath="/sample_threadx"/> - + </configuration> - + </storageModule> - + <storageModule moduleId="org.eclipse.cdt.make.core.buildtargets"/> - + <storageModule moduleId="com.arm.projectSettings" version="6.0.0"/> - + </cproject> diff --git a/ports_module/cortex_a35/gnu/example_build/sample_threadx/GICv3.h b/ports_module/cortex_a35/gnu/example_build/sample_threadx/GICv3.h index 23bc7fd8..dfe37586 100644 --- a/ports_module/cortex_a35/gnu/example_build/sample_threadx/GICv3.h +++ b/ports_module/cortex_a35/gnu/example_build/sample_threadx/GICv3.h @@ -3,7 +3,7 @@ * * Copyright (c) 2014-2017 Arm Limited (or its affiliates). All rights reserved. * Use, modification and redistribution of this file is subject to your possession of a - * valid End User License Agreement for the Arm Product of which these examples are part of + * valid End User License Agreement for the Arm Product of which these examples are part of * and your compliance with all applicable terms and conditions of such licence agreement. */ #ifndef GICV3_h diff --git a/ports_module/cortex_a35/gnu/example_build/sample_threadx/GICv3_aliases.h b/ports_module/cortex_a35/gnu/example_build/sample_threadx/GICv3_aliases.h index 0928d14c..826ba973 100644 --- a/ports_module/cortex_a35/gnu/example_build/sample_threadx/GICv3_aliases.h +++ b/ports_module/cortex_a35/gnu/example_build/sample_threadx/GICv3_aliases.h @@ -3,7 +3,7 @@ // // Copyright (c) 2016-2017 Arm Limited (or its affiliates). All rights reserved. // Use, modification and redistribution of this file is subject to your possession of a -// valid End User License Agreement for the Arm Product of which these examples are part of +// valid End User License Agreement for the Arm Product of which these examples are part of // and your compliance with all applicable terms and conditions of such licence agreement. // diff --git a/ports_module/cortex_a35/gnu/example_build/sample_threadx/GICv3_gicc.h b/ports_module/cortex_a35/gnu/example_build/sample_threadx/GICv3_gicc.h index 2b8a2d3e..998d92b5 100644 --- a/ports_module/cortex_a35/gnu/example_build/sample_threadx/GICv3_gicc.h +++ b/ports_module/cortex_a35/gnu/example_build/sample_threadx/GICv3_gicc.h @@ -3,7 +3,7 @@ * * Copyright (c) 2014-2017 Arm Limited (or its affiliates). All rights reserved. * Use, modification and redistribution of this file is subject to your possession of a - * valid End User License Agreement for the Arm Product of which these examples are part of + * valid End User License Agreement for the Arm Product of which these examples are part of * and your compliance with all applicable terms and conditions of such licence agreement. */ #ifndef GICV3_gicc_h diff --git a/ports_module/cortex_a35/gnu/example_build/sample_threadx/GICv3_gicd.c b/ports_module/cortex_a35/gnu/example_build/sample_threadx/GICv3_gicd.c index 2cf9e843..464ecced 100644 --- a/ports_module/cortex_a35/gnu/example_build/sample_threadx/GICv3_gicd.c +++ b/ports_module/cortex_a35/gnu/example_build/sample_threadx/GICv3_gicd.c @@ -3,7 +3,7 @@ * * Copyright (c) 2014-2017 Arm Limited (or its affiliates). All rights reserved. * Use, modification and redistribution of this file is subject to your possession of a - * valid End User License Agreement for the Arm Product of which these examples are part of + * valid End User License Agreement for the Arm Product of which these examples are part of * and your compliance with all applicable terms and conditions of such licence agreement. */ #include <stdint.h> diff --git a/ports_module/cortex_a35/gnu/example_build/sample_threadx/GICv3_gicr.c b/ports_module/cortex_a35/gnu/example_build/sample_threadx/GICv3_gicr.c index b0d22c40..61addaef 100644 --- a/ports_module/cortex_a35/gnu/example_build/sample_threadx/GICv3_gicr.c +++ b/ports_module/cortex_a35/gnu/example_build/sample_threadx/GICv3_gicr.c @@ -3,7 +3,7 @@ * * Copyright (c) 2014-2019 Arm Limited (or its affiliates). All rights reserved. * Use, modification and redistribution of this file is subject to your possession of a - * valid End User License Agreement for the Arm Product of which these examples are part of + * valid End User License Agreement for the Arm Product of which these examples are part of * and your compliance with all applicable terms and conditions of such licence agreement. */ #include "GICv3.h" diff --git a/ports_module/cortex_a35/gnu/example_build/sample_threadx/MP_Mutexes.S b/ports_module/cortex_a35/gnu/example_build/sample_threadx/MP_Mutexes.S index e7f95aa7..e8a87f0b 100644 --- a/ports_module/cortex_a35/gnu/example_build/sample_threadx/MP_Mutexes.S +++ b/ports_module/cortex_a35/gnu/example_build/sample_threadx/MP_Mutexes.S @@ -4,7 +4,7 @@ // // Copyright (c) 2012-2019 Arm Limited (or its affiliates). All rights reserved. // Use, modification and redistribution of this file is subject to your possession of a -// valid End User License Agreement for the Arm Product of which these examples are part of +// valid End User License Agreement for the Arm Product of which these examples are part of // and your compliance with all applicable terms and conditions of such licence agreement. // @@ -92,7 +92,7 @@ _mutex_release: .type _mutex_acquire, "function" .cfi_startproc _mutex_acquire: - // This uses a "ticket lock". The lock is stored as a 32-bit value: + // This uses a "ticket lock". The lock is stored as a 32-bit value: // - the upper 16-bits record the thread's ticket number ("take a ticket") // - the lower 16-bits record the ticket being served ("now serving") diff --git a/ports_module/cortex_a35/gnu/example_build/sample_threadx/MP_Mutexes.h b/ports_module/cortex_a35/gnu/example_build/sample_threadx/MP_Mutexes.h index ec1a1d28..00e9cd60 100644 --- a/ports_module/cortex_a35/gnu/example_build/sample_threadx/MP_Mutexes.h +++ b/ports_module/cortex_a35/gnu/example_build/sample_threadx/MP_Mutexes.h @@ -3,7 +3,7 @@ * * Copyright (c) 2012-2014 Arm Limited (or its affiliates). All rights reserved. * Use, modification and redistribution of this file is subject to your possession of a - * valid End User License Agreement for the Arm Product of which these examples are part of + * valid End User License Agreement for the Arm Product of which these examples are part of * and your compliance with all applicable terms and conditions of such licence agreement. */ #ifndef MP_MUTEX_H diff --git a/ports_module/cortex_a35/gnu/example_build/sample_threadx/PPM_AEM.h b/ports_module/cortex_a35/gnu/example_build/sample_threadx/PPM_AEM.h index 52c9a0fe..f7501eeb 100644 --- a/ports_module/cortex_a35/gnu/example_build/sample_threadx/PPM_AEM.h +++ b/ports_module/cortex_a35/gnu/example_build/sample_threadx/PPM_AEM.h @@ -3,7 +3,7 @@ // // Copyright (c) 2012-2017 Arm Limited (or its affiliates). All rights reserved. // Use, modification and redistribution of this file is subject to your possession of a -// valid End User License Agreement for the Arm Product of which these examples are part of +// valid End User License Agreement for the Arm Product of which these examples are part of // and your compliance with all applicable terms and conditions of such licence agreement. // diff --git a/ports_module/cortex_a35/gnu/example_build/sample_threadx/sample_threadx.c b/ports_module/cortex_a35/gnu/example_build/sample_threadx/sample_threadx.c index 8898ff39..736722fb 100644 --- a/ports_module/cortex_a35/gnu/example_build/sample_threadx/sample_threadx.c +++ b/ports_module/cortex_a35/gnu/example_build/sample_threadx/sample_threadx.c @@ -1,5 +1,5 @@ /* This is a small demo of the high-performance ThreadX kernel. It includes examples of eight - threads of different priorities, using a message queue, semaphore, mutex, event flags group, + threads of different priorities, using a message queue, semaphore, mutex, event flags group, byte pool, and block pool. */ #include "tx_api.h" @@ -87,42 +87,42 @@ UCHAR *pointer = TX_NULL; tx_byte_allocate(&byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT); /* Create the main thread. */ - tx_thread_create(&thread_0, "thread 0", thread_0_entry, 0, - pointer, DEMO_STACK_SIZE, + tx_thread_create(&thread_0, "thread 0", thread_0_entry, 0, + pointer, DEMO_STACK_SIZE, 1, 1, TX_NO_TIME_SLICE, TX_AUTO_START); /* Allocate the stack for thread 1. */ tx_byte_allocate(&byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT); - /* Create threads 1 and 2. These threads pass information through a ThreadX + /* Create threads 1 and 2. These threads pass information through a ThreadX message queue. It is also interesting to note that these threads have a time slice. */ - tx_thread_create(&thread_1, "thread 1", thread_1_entry, 1, - pointer, DEMO_STACK_SIZE, + tx_thread_create(&thread_1, "thread 1", thread_1_entry, 1, + pointer, DEMO_STACK_SIZE, 16, 16, 4, TX_AUTO_START); /* Allocate the stack for thread 2. */ tx_byte_allocate(&byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT); - tx_thread_create(&thread_2, "thread 2", thread_2_entry, 2, - pointer, DEMO_STACK_SIZE, + tx_thread_create(&thread_2, "thread 2", thread_2_entry, 2, + pointer, DEMO_STACK_SIZE, 16, 16, 4, TX_AUTO_START); /* Allocate the stack for thread 3. */ tx_byte_allocate(&byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT); - /* Create threads 3 and 4. These threads compete for a ThreadX counting semaphore. + /* Create threads 3 and 4. These threads compete for a ThreadX counting semaphore. An interesting thing here is that both threads share the same instruction area. */ - tx_thread_create(&thread_3, "thread 3", thread_3_and_4_entry, 3, - pointer, DEMO_STACK_SIZE, + tx_thread_create(&thread_3, "thread 3", thread_3_and_4_entry, 3, + pointer, DEMO_STACK_SIZE, 8, 8, TX_NO_TIME_SLICE, TX_AUTO_START); /* Allocate the stack for thread 4. */ tx_byte_allocate(&byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT); - tx_thread_create(&thread_4, "thread 4", thread_3_and_4_entry, 4, - pointer, DEMO_STACK_SIZE, + tx_thread_create(&thread_4, "thread 4", thread_3_and_4_entry, 4, + pointer, DEMO_STACK_SIZE, 8, 8, TX_NO_TIME_SLICE, TX_AUTO_START); /* Allocate the stack for thread 5. */ @@ -130,23 +130,23 @@ UCHAR *pointer = TX_NULL; /* Create thread 5. This thread simply pends on an event flag which will be set by thread_0. */ - tx_thread_create(&thread_5, "thread 5", thread_5_entry, 5, - pointer, DEMO_STACK_SIZE, + tx_thread_create(&thread_5, "thread 5", thread_5_entry, 5, + pointer, DEMO_STACK_SIZE, 4, 4, TX_NO_TIME_SLICE, TX_AUTO_START); /* Allocate the stack for thread 6. */ tx_byte_allocate(&byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT); /* Create threads 6 and 7. These threads compete for a ThreadX mutex. */ - tx_thread_create(&thread_6, "thread 6", thread_6_and_7_entry, 6, - pointer, DEMO_STACK_SIZE, + tx_thread_create(&thread_6, "thread 6", thread_6_and_7_entry, 6, + pointer, DEMO_STACK_SIZE, 8, 8, TX_NO_TIME_SLICE, TX_AUTO_START); /* Allocate the stack for thread 7. */ tx_byte_allocate(&byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT); - tx_thread_create(&thread_7, "thread 7", thread_6_and_7_entry, 7, - pointer, DEMO_STACK_SIZE, + tx_thread_create(&thread_7, "thread 7", thread_6_and_7_entry, 7, + pointer, DEMO_STACK_SIZE, 8, 8, TX_NO_TIME_SLICE, TX_AUTO_START); /* Allocate the message queue. */ @@ -250,11 +250,11 @@ UINT status; /* Retrieve a message from the queue. */ status = tx_queue_receive(&queue_0, &received_message, TX_WAIT_FOREVER); - /* Check completion status and make sure the message is what we + /* Check completion status and make sure the message is what we expected. */ if ((status != TX_SUCCESS) || (received_message != thread_2_messages_received)) break; - + /* Otherwise, all is okay. Increment the received message count. */ thread_2_messages_received++; } @@ -313,7 +313,7 @@ ULONG actual_flags; thread_5_counter++; /* Wait for event flag 0. */ - status = tx_event_flags_get(&event_flags_0, 0x1, TX_OR_CLEAR, + status = tx_event_flags_get(&event_flags_0, 0x1, TX_OR_CLEAR, &actual_flags, TX_WAIT_FOREVER); /* Check status. */ @@ -366,7 +366,7 @@ UINT status; if (status != TX_SUCCESS) break; - /* Release the mutex again. This will actually + /* Release the mutex again. This will actually release ownership since it was obtained twice. */ status = tx_mutex_put(&mutex_0); diff --git a/ports_module/cortex_a35/gnu/example_build/sample_threadx/sample_threadx.ld b/ports_module/cortex_a35/gnu/example_build/sample_threadx/sample_threadx.ld index eec8f12b..3bf47736 100644 --- a/ports_module/cortex_a35/gnu/example_build/sample_threadx/sample_threadx.ld +++ b/ports_module/cortex_a35/gnu/example_build/sample_threadx/sample_threadx.ld @@ -1,7 +1,7 @@ /* Linker script to place sections and symbol values. * It references following symbols, which must be defined in code: * start64 : Entry point - * + * * It defines following symbols, which code can use without definition: * __cs3_peripherals * __code_start diff --git a/ports_module/cortex_a35/gnu/example_build/sample_threadx/sp804_timer.c b/ports_module/cortex_a35/gnu/example_build/sample_threadx/sp804_timer.c index 4dc009b2..c2ce6faa 100644 --- a/ports_module/cortex_a35/gnu/example_build/sample_threadx/sp804_timer.c +++ b/ports_module/cortex_a35/gnu/example_build/sample_threadx/sp804_timer.c @@ -3,7 +3,7 @@ // // Copyright (c) 2009-2017 Arm Limited (or its affiliates). All rights reserved. // Use, modification and redistribution of this file is subject to your possession of a -// valid End User License Agreement for the Arm Product of which these examples are part of +// valid End User License Agreement for the Arm Product of which these examples are part of // and your compliance with all applicable terms and conditions of such licence agreement. // ------------------------------------------------------------ diff --git a/ports_module/cortex_a35/gnu/example_build/sample_threadx/sp804_timer.h b/ports_module/cortex_a35/gnu/example_build/sample_threadx/sp804_timer.h index 777062cc..4d423904 100644 --- a/ports_module/cortex_a35/gnu/example_build/sample_threadx/sp804_timer.h +++ b/ports_module/cortex_a35/gnu/example_build/sample_threadx/sp804_timer.h @@ -4,7 +4,7 @@ // // Copyright (c) 2009-2017 Arm Limited (or its affiliates). All rights reserved. // Use, modification and redistribution of this file is subject to your possession of a -// valid End User License Agreement for the Arm Product of which these examples are part of +// valid End User License Agreement for the Arm Product of which these examples are part of // and your compliance with all applicable terms and conditions of such licence agreement. // ------------------------------------------------------------ diff --git a/ports_module/cortex_a35/gnu/example_build/sample_threadx/startup.S b/ports_module/cortex_a35/gnu/example_build/sample_threadx/startup.S index 67dd8a6a..b44806fe 100644 --- a/ports_module/cortex_a35/gnu/example_build/sample_threadx/startup.S +++ b/ports_module/cortex_a35/gnu/example_build/sample_threadx/startup.S @@ -7,7 +7,7 @@ // // Copyright (c) 2014-2019 Arm Limited (or its affiliates). All rights reserved. // Use, modification and redistribution of this file is subject to your possession of a -// valid End User License Agreement for the Arm Product of which these examples are part of +// valid End User License Agreement for the Arm Product of which these examples are part of // and your compliance with all applicable terms and conditions of such licence agreement. // ------------------------------------------------------------ @@ -328,7 +328,7 @@ el1_entry_aarch64: // // Cortex-A processors automatically invalidate their caches on reset // (unless suppressed with the DBGL1RSTDISABLE or L2RSTDISABLE pins). - // It is therefore not necessary for software to invalidate the caches + // It is therefore not necessary for software to invalidate the caches // on startup, however, this is done here in case of a warm reset. bl InvalidateUDCaches tlbi VMALLE1 diff --git a/ports_module/cortex_a35/gnu/example_build/sample_threadx/tx_initialize_low_level.S b/ports_module/cortex_a35/gnu/example_build/sample_threadx/tx_initialize_low_level.S index f4e6ea0a..55ec0f9f 100644 --- a/ports_module/cortex_a35/gnu/example_build/sample_threadx/tx_initialize_low_level.S +++ b/ports_module/cortex_a35/gnu/example_build/sample_threadx/tx_initialize_low_level.S @@ -1,18 +1,19 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ /**************************************************************************/ /**************************************************************************/ -/** */ -/** ThreadX Component */ +/** */ +/** ThreadX Component */ /** */ /** Initialize */ /** */ @@ -21,45 +22,39 @@ .text .align 3 -/**************************************************************************/ -/* */ -/* FUNCTION RELEASE */ -/* */ -/* _tx_initialize_low_level Cortex-A35/GNU */ +/**************************************************************************/ +/* */ +/* FUNCTION RELEASE */ +/* */ +/* _tx_initialize_low_level Cortex-A35/GNU */ /* 6.1 */ /* AUTHOR */ /* */ /* William E. Lamie, Microsoft Corporation */ /* */ /* DESCRIPTION */ -/* */ -/* This function is responsible for any low-level processor */ -/* initialization, including setting up interrupt vectors, setting */ -/* up a periodic timer interrupt source, saving the system stack */ -/* pointer for use in ISR processing later, and finding the first */ -/* available RAM memory address for tx_application_define. */ -/* */ -/* INPUT */ -/* */ -/* None */ -/* */ -/* OUTPUT */ -/* */ -/* None */ -/* */ -/* CALLS */ -/* */ -/* None */ -/* */ -/* CALLED BY */ -/* */ -/* _tx_initialize_kernel_enter ThreadX entry function */ -/* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ /* */ -/* 09-30-2020 William E. Lamie Initial Version 6.1 */ +/* This function is responsible for any low-level processor */ +/* initialization, including setting up interrupt vectors, setting */ +/* up a periodic timer interrupt source, saving the system stack */ +/* pointer for use in ISR processing later, and finding the first */ +/* available RAM memory address for tx_application_define. */ +/* */ +/* INPUT */ +/* */ +/* None */ +/* */ +/* OUTPUT */ +/* */ +/* None */ +/* */ +/* CALLS */ +/* */ +/* None */ +/* */ +/* CALLED BY */ +/* */ +/* _tx_initialize_kernel_enter ThreadX entry function */ /* */ /**************************************************************************/ /* VOID _tx_initialize_low_level(VOID) diff --git a/ports_module/cortex_a35/gnu/example_build/sample_threadx/v8_aarch64.S b/ports_module/cortex_a35/gnu/example_build/sample_threadx/v8_aarch64.S index f8db3bfe..45445a98 100644 --- a/ports_module/cortex_a35/gnu/example_build/sample_threadx/v8_aarch64.S +++ b/ports_module/cortex_a35/gnu/example_build/sample_threadx/v8_aarch64.S @@ -3,7 +3,7 @@ // // Copyright (c) 2012-2019 Arm Limited (or its affiliates). All rights reserved. // Use, modification and redistribution of this file is subject to your possession of a -// valid End User License Agreement for the Arm Product of which these examples are part of +// valid End User License Agreement for the Arm Product of which these examples are part of // and your compliance with all applicable terms and conditions of such licence agreement. // ------------------------------------------------------------ diff --git a/ports_module/cortex_a35/gnu/example_build/sample_threadx/v8_aarch64.h b/ports_module/cortex_a35/gnu/example_build/sample_threadx/v8_aarch64.h index b09079a4..91ca9653 100644 --- a/ports_module/cortex_a35/gnu/example_build/sample_threadx/v8_aarch64.h +++ b/ports_module/cortex_a35/gnu/example_build/sample_threadx/v8_aarch64.h @@ -4,7 +4,7 @@ * * Copyright (c) 2012-2014 Arm Limited (or its affiliates). All rights reserved. * Use, modification and redistribution of this file is subject to your possession of a - * valid End User License Agreement for the Arm Product of which these examples are part of + * valid End User License Agreement for the Arm Product of which these examples are part of * and your compliance with all applicable terms and conditions of such licence agreement. */ diff --git a/ports_module/cortex_a35/gnu/example_build/sample_threadx/v8_mmu.h b/ports_module/cortex_a35/gnu/example_build/sample_threadx/v8_mmu.h index ee8834fa..d0c51601 100644 --- a/ports_module/cortex_a35/gnu/example_build/sample_threadx/v8_mmu.h +++ b/ports_module/cortex_a35/gnu/example_build/sample_threadx/v8_mmu.h @@ -3,7 +3,7 @@ // // Copyright (c) 2012-2019 Arm Limited (or its affiliates). All rights reserved. // Use, modification and redistribution of this file is subject to your possession of a -// valid End User License Agreement for the Arm Product of which these examples are part of +// valid End User License Agreement for the Arm Product of which these examples are part of // and your compliance with all applicable terms and conditions of such licence agreement. // @@ -101,7 +101,7 @@ #define TT_S1_ATTR_PXN (1 << 53) #define TT_S1_ATTR_UXN (1 << 54) -// PBHA bits[62:59] - If Armv8.2-TTPBHA is implemented, hardware can use these bits +// PBHA bits[62:59] - If Armv8.2-TTPBHA is implemented, hardware can use these bits // for IMPLEMENTATIONDEFINED purposes, otherwise IGNORED #define TT_S1_MAIR_DEV_nGnRnE 0b00000000 diff --git a/ports_module/cortex_a35/gnu/example_build/sample_threadx/v8_system.h b/ports_module/cortex_a35/gnu/example_build/sample_threadx/v8_system.h index ff96deff..a62d2a33 100644 --- a/ports_module/cortex_a35/gnu/example_build/sample_threadx/v8_system.h +++ b/ports_module/cortex_a35/gnu/example_build/sample_threadx/v8_system.h @@ -3,7 +3,7 @@ // // Copyright (c) 2012-2016 Arm Limited (or its affiliates). All rights reserved. // Use, modification and redistribution of this file is subject to your possession of a -// valid End User License Agreement for the Arm Product of which these examples are part of +// valid End User License Agreement for the Arm Product of which these examples are part of // and your compliance with all applicable terms and conditions of such licence agreement. // diff --git a/ports_module/cortex_a35/gnu/example_build/sample_threadx/v8_utils.S b/ports_module/cortex_a35/gnu/example_build/sample_threadx/v8_utils.S index f0fcef26..888892a0 100644 --- a/ports_module/cortex_a35/gnu/example_build/sample_threadx/v8_utils.S +++ b/ports_module/cortex_a35/gnu/example_build/sample_threadx/v8_utils.S @@ -3,7 +3,7 @@ // // Copyright (c) 2013-2017 Arm Limited (or its affiliates). All rights reserved. // Use, modification and redistribution of this file is subject to your possession of a -// valid End User License Agreement for the Arm Product of which these examples are part of +// valid End User License Agreement for the Arm Product of which these examples are part of // and your compliance with all applicable terms and conditions of such licence agreement. // diff --git a/ports_module/cortex_a35/gnu/example_build/sample_threadx/vectors.S b/ports_module/cortex_a35/gnu/example_build/sample_threadx/vectors.S index 9e60e001..7784f98e 100644 --- a/ports_module/cortex_a35/gnu/example_build/sample_threadx/vectors.S +++ b/ports_module/cortex_a35/gnu/example_build/sample_threadx/vectors.S @@ -3,7 +3,7 @@ // // Copyright (c) 2014-2016 Arm Limited (or its affiliates). All rights reserved. // Use, modification and redistribution of this file is subject to your possession of a -// valid End User License Agreement for the Arm Product of which these examples are part of +// valid End User License Agreement for the Arm Product of which these examples are part of // and your compliance with all applicable terms and conditions of such licence agreement. // ------------------------------------------------------------ diff --git a/ports_module/cortex_a35/gnu/example_build/sample_threadx_module/.cproject b/ports_module/cortex_a35/gnu/example_build/sample_threadx_module/.cproject index 296685a7..50726e80 100644 --- a/ports_module/cortex_a35/gnu/example_build/sample_threadx_module/.cproject +++ b/ports_module/cortex_a35/gnu/example_build/sample_threadx_module/.cproject @@ -1,184 +1,184 @@ <?xml version="1.0" encoding="UTF-8" standalone="no"?> <?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage"> - + <storageModule moduleId="org.eclipse.cdt.core.settings"> - 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+ </cconfiguration> - + </storageModule> - + <storageModule moduleId="cdtBuildSystem" version="4.0.0"> - + <project id="sample_threadx.com.arm.eclipse.build.project.v6.exe.836597981" name="Executable"/> - + </storageModule> - + <storageModule moduleId="scannerConfiguration"> - + <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/> - + </storageModule> - + <storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/> - + <storageModule moduleId="com.arm.projectSettings" version="6.0.0"/> - + <storageModule moduleId="org.eclipse.cdt.make.core.buildtargets"/> - + <storageModule moduleId="refreshScope" versionNumber="2"> - + <configuration configurationName="Debug"> - + <resource resourceType="PROJECT" workspacePath="/sample_threadx_module"/> - + </configuration> - + <configuration configurationName="Release"> - + <resource resourceType="PROJECT" workspacePath="/sample_threadx"/> - + </configuration> - + </storageModule> - + <storageModule moduleId="org.eclipse.cdt.internal.ui.text.commentOwnerProjectMappings"/> - + </cproject> diff --git a/ports_module/cortex_a35/gnu/example_build/sample_threadx_module/gcc_setup.s b/ports_module/cortex_a35/gnu/example_build/sample_threadx_module/gcc_setup.s index 7c454996..e0569f71 100644 --- a/ports_module/cortex_a35/gnu/example_build/sample_threadx_module/gcc_setup.s +++ b/ports_module/cortex_a35/gnu/example_build/sample_threadx_module/gcc_setup.s @@ -17,7 +17,7 @@ _gcc_setup: ldr x9, =__RAM_segment_start__ /* Copy GOT table. */ - + ldr x0, =__got_load_start__ sub x0 ,x0, x3 add x0, x0, x5 @@ -51,7 +51,7 @@ got_setup_done: /* Copy initialised sections into RAM if required. */ - + ldr x0, =__data_load_start__ sub x0, x0, x3 add x0, x0, x5 @@ -62,9 +62,9 @@ got_setup_done: sub x2, x2, x4 add x2, x2, x9 bl crt0_memory_copy - + /* Zero bss. */ - + ldr x0, =__bss_start__ sub x0, x0, x4 add x0, x0, x9 @@ -88,12 +88,12 @@ got_setup_done: str x2, [x0] add x0, x0, #4 str x1, [x0] - + ldr x30, [sp] // Restore other preserved registers add sp, sp, 16 ret // Return to caller - + /* Startup helper functions. */ @@ -126,4 +126,4 @@ memory_set_done: /* Setup attibutes of heap section so it doesn't take up room in the elf file */ .section .heap, "wa", %nobits - + diff --git a/ports_module/cortex_a35/gnu/example_build/sample_threadx_module/sample_threadx_module.c b/ports_module/cortex_a35/gnu/example_build/sample_threadx_module/sample_threadx_module.c index 3a3f8159..3476367e 100644 --- a/ports_module/cortex_a35/gnu/example_build/sample_threadx_module/sample_threadx_module.c +++ b/ports_module/cortex_a35/gnu/example_build/sample_threadx_module/sample_threadx_module.c @@ -1,5 +1,5 @@ -/* This is a small demo of the high-performance ThreadX kernel running as a module. It includes - examples of eight threads of different priorities, using a message queue, semaphore, mutex, +/* This is a small demo of the high-performance ThreadX kernel running as a module. It includes + examples of eight threads of different priorities, using a message queue, semaphore, mutex, event flags group, byte pool, and block pool. */ /* Specify that this is a module! */ @@ -20,7 +20,7 @@ #define DEMO_QUEUE_SIZE 100 -/* Define the pool space in the bss section of the module. ULONG is used to +/* Define the pool space in the bss section of the module. ULONG is used to get the word alignment. */ ULONG demo_module_pool_space[DEMO_BYTE_POOL_SIZE / sizeof(ULONG)]; @@ -103,7 +103,7 @@ CHAR *pointer; /* Allocate all the objects. In MMU mode, modules cannot allocate control blocks within - their own memory area so they cannot corrupt the resident portion of ThreadX by overwriting + their own memory area so they cannot corrupt the resident portion of ThreadX by overwriting the control block(s). */ status = txm_module_object_allocate((void*)&thread_0, sizeof(TX_THREAD)); while (status != TX_SUCCESS); @@ -133,7 +133,7 @@ CHAR *pointer; while (status != TX_SUCCESS); status = txm_module_object_allocate((void*)&block_pool_0, sizeof(TX_BLOCK_POOL)); while (status != TX_SUCCESS); - + /* Create a byte memory pool from which to allocate the thread stacks. */ status = tx_byte_pool_create(byte_pool_0, "module byte pool 0", demo_module_pool_space, DEMO_BYTE_POOL_SIZE); @@ -148,7 +148,7 @@ CHAR *pointer; /* Create the main thread. */ status = tx_thread_create(thread_0, "module thread 0", thread_0_entry, 0, - pointer, DEMO_STACK_SIZE, + pointer, DEMO_STACK_SIZE, 1, 1, TX_NO_TIME_SLICE, TX_AUTO_START); while (status != TX_SUCCESS); @@ -156,11 +156,11 @@ CHAR *pointer; status = tx_byte_allocate(byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT); while (status != TX_SUCCESS); - /* Create threads 1 and 2. These threads pass information through a ThreadX + /* Create threads 1 and 2. These threads pass information through a ThreadX message queue. It is also interesting to note that these threads have a time slice. */ status = tx_thread_create(thread_1, "module thread 1", thread_1_entry, 1, - pointer, DEMO_STACK_SIZE, + pointer, DEMO_STACK_SIZE, 16, 16, 4, TX_AUTO_START); while (status != TX_SUCCESS); @@ -169,7 +169,7 @@ CHAR *pointer; while (status != TX_SUCCESS); status = tx_thread_create(thread_2, "module thread 2", thread_2_entry, 2, - pointer, DEMO_STACK_SIZE, + pointer, DEMO_STACK_SIZE, 16, 16, 4, TX_AUTO_START); while (status != TX_SUCCESS); @@ -177,10 +177,10 @@ CHAR *pointer; status = tx_byte_allocate(byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT); while (status != TX_SUCCESS); - /* Create threads 3 and 4. These threads compete for a ThreadX counting semaphore. + /* Create threads 3 and 4. These threads compete for a ThreadX counting semaphore. An interesting thing here is that both threads share the same instruction area. */ status = tx_thread_create(thread_3, "module thread 3", thread_3_and_4_entry, 3, - pointer, DEMO_STACK_SIZE, + pointer, DEMO_STACK_SIZE, 8, 8, TX_NO_TIME_SLICE, TX_AUTO_START); while (status != TX_SUCCESS); @@ -189,7 +189,7 @@ CHAR *pointer; while (status != TX_SUCCESS); status = tx_thread_create(thread_4, "module thread 4", thread_3_and_4_entry, 4, - pointer, DEMO_STACK_SIZE, + pointer, DEMO_STACK_SIZE, 8, 8, TX_NO_TIME_SLICE, TX_AUTO_START); while (status != TX_SUCCESS); @@ -200,7 +200,7 @@ CHAR *pointer; /* Create thread 5. This thread simply pends on an event flag which will be set by thread_0. */ status = tx_thread_create(thread_5, "module thread 5", thread_5_entry, 5, - pointer, DEMO_STACK_SIZE, + pointer, DEMO_STACK_SIZE, 4, 4, TX_NO_TIME_SLICE, TX_AUTO_START); while (status != TX_SUCCESS); @@ -210,7 +210,7 @@ CHAR *pointer; /* Create threads 6 and 7. These threads compete for a ThreadX mutex. */ status = tx_thread_create(thread_6, "module thread 6", thread_6_and_7_entry, 6, - pointer, DEMO_STACK_SIZE, + pointer, DEMO_STACK_SIZE, 8, 8, TX_NO_TIME_SLICE, TX_AUTO_START); while (status != TX_SUCCESS); @@ -219,7 +219,7 @@ CHAR *pointer; while (status != TX_SUCCESS); status = tx_thread_create(thread_7, "module thread 7", thread_6_and_7_entry, 7, - pointer, DEMO_STACK_SIZE, + pointer, DEMO_STACK_SIZE, 8, 8, TX_NO_TIME_SLICE, TX_AUTO_START); while (status != TX_SUCCESS); @@ -276,7 +276,7 @@ void thread_0_entry(ULONG thread_input) { UINT status; - + /* This thread simply sits in while-forever-sleep loop. */ while(1) { @@ -286,7 +286,7 @@ UINT status; /* Sleep for 10 ticks. */ tx_thread_sleep(10); - + /* Set event flag 0 to wakeup thread 5. */ status = tx_event_flags_set(event_flags_0, 0x1, TX_OR); @@ -338,11 +338,11 @@ UINT status; /* Retrieve a message from the queue. */ status = tx_queue_receive(queue_0, &received_message, TX_WAIT_FOREVER); - /* Check completion status and make sure the message is what we + /* Check completion status and make sure the message is what we expected. */ if ((status != TX_SUCCESS) || (received_message != thread_2_messages_received)) break; - + /* Otherwise, all is okay. Increment the received message count. */ thread_2_messages_received++; } @@ -401,7 +401,7 @@ ULONG actual_flags; thread_5_counter++; /* Wait for event flag 0. */ - status = tx_event_flags_get(event_flags_0, 0x1, TX_OR_CLEAR, + status = tx_event_flags_get(event_flags_0, 0x1, TX_OR_CLEAR, &actual_flags, TX_WAIT_FOREVER); /* Check status. */ @@ -454,7 +454,7 @@ UINT status; if (status != TX_SUCCESS) break; - /* Release the mutex again. This will actually + /* Release the mutex again. This will actually release ownership since it was obtained twice. */ status = tx_mutex_put(mutex_0); diff --git a/ports_module/cortex_a35/gnu/example_build/sample_threadx_module/sample_threadx_module.ld b/ports_module/cortex_a35/gnu/example_build/sample_threadx_module/sample_threadx_module.ld index 042b59bf..d117a5df 100644 --- a/ports_module/cortex_a35/gnu/example_build/sample_threadx_module/sample_threadx_module.ld +++ b/ports_module/cortex_a35/gnu/example_build/sample_threadx_module/sample_threadx_module.ld @@ -110,7 +110,7 @@ SECTIONS KEEP (*(.got*)) . = ALIGN(4); _egot = .; - } + } __got_end__ = __got_load_start__ + SIZEOF(.got); __rodata_load_start__ = ALIGN(__got_end__ , 4); @@ -120,7 +120,7 @@ SECTIONS *(.rodata .rodata.* .gnu.linkonce.r.*) } __rodata_end__ = __rodata_start__ + SIZEOF(.rodata); - + __code_size__ = __rodata_end__ - __FLASH_segment_start__; __fast_load_start__ = ALIGN(__rodata_end__ , 4); diff --git a/ports_module/cortex_a35/gnu/example_build/sample_threadx_module/txm_module_preamble.S b/ports_module/cortex_a35/gnu/example_build/sample_threadx_module/txm_module_preamble.S index cce29ef8..bb0acb6f 100644 --- a/ports_module/cortex_a35/gnu/example_build/sample_threadx_module/txm_module_preamble.S +++ b/ports_module/cortex_a35/gnu/example_build/sample_threadx_module/txm_module_preamble.S @@ -1,6 +1,6 @@ - .section .txm_module_preamble + .section .txm_module_preamble, "ax" .align 4 - + // External references .global _txm_module_thread_shell_entry .global _txm_module_callback_request_thread_entry diff --git a/ports_module/cortex_a35/gnu/example_build/sample_threadx_module_manager/.cproject b/ports_module/cortex_a35/gnu/example_build/sample_threadx_module_manager/.cproject index 79e120b4..b1950eb6 100644 --- a/ports_module/cortex_a35/gnu/example_build/sample_threadx_module_manager/.cproject +++ b/ports_module/cortex_a35/gnu/example_build/sample_threadx_module_manager/.cproject @@ -1,264 +1,264 @@ <?xml version="1.0" encoding="UTF-8" standalone="no"?> <?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage"> - + <storageModule moduleId="org.eclipse.cdt.core.settings"> - + <cconfiguration id="com.arm.eclipse.build.config.v6.exe.debug.base.515451048"> - + <storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.arm.eclipse.build.config.v6.exe.debug.base.515451048" moduleId="org.eclipse.cdt.core.settings" name="Debug"> - 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+ </storageModule> - + <storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/> - + <storageModule moduleId="refreshScope" versionNumber="2"> - + <configuration configurationName="Debug"> - + <resource resourceType="PROJECT" workspacePath="/sample_threadx_module_manager"/> - + </configuration> - + <configuration configurationName="Release"> - + <resource resourceType="PROJECT" workspacePath="/sample_threadx_module_manager"/> - + </configuration> - + </storageModule> - + <storageModule moduleId="org.eclipse.cdt.make.core.buildtargets"/> - + <storageModule moduleId="com.arm.projectSettings" version="6.0.0"/> - + <storageModule moduleId="scannerConfiguration"> - + <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/> - + <scannerConfigBuildInfo instanceId="com.arm.eclipse.build.config.v6.exe.debug.base.515451048;com.arm.eclipse.build.config.v6.exe.debug.base.515451048.;com.arm.eclipse.cdt.managedbuild.ds5.gcc.baremetal.tool.c.compiler.var.gcc-8.3.0-aarch64-elf.1331565505;com.arm.eclipse.cdt.managedbuild.ds5.gcc.baremetal.tool.c.compiler.input.301538030"> - + <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/> - + </scannerConfigBuildInfo> - + </storageModule> - + </cproject> diff --git a/ports_module/cortex_a35/gnu/example_build/sample_threadx_module_manager/GICv3.h b/ports_module/cortex_a35/gnu/example_build/sample_threadx_module_manager/GICv3.h index 23bc7fd8..dfe37586 100644 --- a/ports_module/cortex_a35/gnu/example_build/sample_threadx_module_manager/GICv3.h +++ b/ports_module/cortex_a35/gnu/example_build/sample_threadx_module_manager/GICv3.h @@ -3,7 +3,7 @@ * * Copyright (c) 2014-2017 Arm Limited (or its affiliates). All rights reserved. * Use, modification and redistribution of this file is subject to your possession of a - * valid End User License Agreement for the Arm Product of which these examples are part of + * valid End User License Agreement for the Arm Product of which these examples are part of * and your compliance with all applicable terms and conditions of such licence agreement. */ #ifndef GICV3_h diff --git a/ports_module/cortex_a35/gnu/example_build/sample_threadx_module_manager/GICv3_aliases.h b/ports_module/cortex_a35/gnu/example_build/sample_threadx_module_manager/GICv3_aliases.h index 0928d14c..826ba973 100644 --- a/ports_module/cortex_a35/gnu/example_build/sample_threadx_module_manager/GICv3_aliases.h +++ b/ports_module/cortex_a35/gnu/example_build/sample_threadx_module_manager/GICv3_aliases.h @@ -3,7 +3,7 @@ // // Copyright (c) 2016-2017 Arm Limited (or its affiliates). All rights reserved. // Use, modification and redistribution of this file is subject to your possession of a -// valid End User License Agreement for the Arm Product of which these examples are part of +// valid End User License Agreement for the Arm Product of which these examples are part of // and your compliance with all applicable terms and conditions of such licence agreement. // diff --git a/ports_module/cortex_a35/gnu/example_build/sample_threadx_module_manager/GICv3_gicc.h b/ports_module/cortex_a35/gnu/example_build/sample_threadx_module_manager/GICv3_gicc.h index 2b8a2d3e..998d92b5 100644 --- a/ports_module/cortex_a35/gnu/example_build/sample_threadx_module_manager/GICv3_gicc.h +++ b/ports_module/cortex_a35/gnu/example_build/sample_threadx_module_manager/GICv3_gicc.h @@ -3,7 +3,7 @@ * * Copyright (c) 2014-2017 Arm Limited (or its affiliates). All rights reserved. * Use, modification and redistribution of this file is subject to your possession of a - * valid End User License Agreement for the Arm Product of which these examples are part of + * valid End User License Agreement for the Arm Product of which these examples are part of * and your compliance with all applicable terms and conditions of such licence agreement. */ #ifndef GICV3_gicc_h diff --git a/ports_module/cortex_a35/gnu/example_build/sample_threadx_module_manager/GICv3_gicd.c b/ports_module/cortex_a35/gnu/example_build/sample_threadx_module_manager/GICv3_gicd.c index 2cf9e843..464ecced 100644 --- a/ports_module/cortex_a35/gnu/example_build/sample_threadx_module_manager/GICv3_gicd.c +++ b/ports_module/cortex_a35/gnu/example_build/sample_threadx_module_manager/GICv3_gicd.c @@ -3,7 +3,7 @@ * * Copyright (c) 2014-2017 Arm Limited (or its affiliates). All rights reserved. * Use, modification and redistribution of this file is subject to your possession of a - * valid End User License Agreement for the Arm Product of which these examples are part of + * valid End User License Agreement for the Arm Product of which these examples are part of * and your compliance with all applicable terms and conditions of such licence agreement. */ #include <stdint.h> diff --git a/ports_module/cortex_a35/gnu/example_build/sample_threadx_module_manager/GICv3_gicr.c b/ports_module/cortex_a35/gnu/example_build/sample_threadx_module_manager/GICv3_gicr.c index b0d22c40..61addaef 100644 --- a/ports_module/cortex_a35/gnu/example_build/sample_threadx_module_manager/GICv3_gicr.c +++ b/ports_module/cortex_a35/gnu/example_build/sample_threadx_module_manager/GICv3_gicr.c @@ -3,7 +3,7 @@ * * Copyright (c) 2014-2019 Arm Limited (or its affiliates). All rights reserved. * Use, modification and redistribution of this file is subject to your possession of a - * valid End User License Agreement for the Arm Product of which these examples are part of + * valid End User License Agreement for the Arm Product of which these examples are part of * and your compliance with all applicable terms and conditions of such licence agreement. */ #include "GICv3.h" diff --git a/ports_module/cortex_a35/gnu/example_build/sample_threadx_module_manager/MP_Mutexes.S b/ports_module/cortex_a35/gnu/example_build/sample_threadx_module_manager/MP_Mutexes.S index e7f95aa7..e8a87f0b 100644 --- a/ports_module/cortex_a35/gnu/example_build/sample_threadx_module_manager/MP_Mutexes.S +++ b/ports_module/cortex_a35/gnu/example_build/sample_threadx_module_manager/MP_Mutexes.S @@ -4,7 +4,7 @@ // // Copyright (c) 2012-2019 Arm Limited (or its affiliates). All rights reserved. // Use, modification and redistribution of this file is subject to your possession of a -// valid End User License Agreement for the Arm Product of which these examples are part of +// valid End User License Agreement for the Arm Product of which these examples are part of // and your compliance with all applicable terms and conditions of such licence agreement. // @@ -92,7 +92,7 @@ _mutex_release: .type _mutex_acquire, "function" .cfi_startproc _mutex_acquire: - // This uses a "ticket lock". The lock is stored as a 32-bit value: + // This uses a "ticket lock". The lock is stored as a 32-bit value: // - the upper 16-bits record the thread's ticket number ("take a ticket") // - the lower 16-bits record the ticket being served ("now serving") diff --git a/ports_module/cortex_a35/gnu/example_build/sample_threadx_module_manager/MP_Mutexes.h b/ports_module/cortex_a35/gnu/example_build/sample_threadx_module_manager/MP_Mutexes.h index ec1a1d28..00e9cd60 100644 --- a/ports_module/cortex_a35/gnu/example_build/sample_threadx_module_manager/MP_Mutexes.h +++ b/ports_module/cortex_a35/gnu/example_build/sample_threadx_module_manager/MP_Mutexes.h @@ -3,7 +3,7 @@ * * Copyright (c) 2012-2014 Arm Limited (or its affiliates). All rights reserved. * Use, modification and redistribution of this file is subject to your possession of a - * valid End User License Agreement for the Arm Product of which these examples are part of + * valid End User License Agreement for the Arm Product of which these examples are part of * and your compliance with all applicable terms and conditions of such licence agreement. */ #ifndef MP_MUTEX_H diff --git a/ports_module/cortex_a35/gnu/example_build/sample_threadx_module_manager/PPM_AEM.h b/ports_module/cortex_a35/gnu/example_build/sample_threadx_module_manager/PPM_AEM.h index 52c9a0fe..f7501eeb 100644 --- a/ports_module/cortex_a35/gnu/example_build/sample_threadx_module_manager/PPM_AEM.h +++ b/ports_module/cortex_a35/gnu/example_build/sample_threadx_module_manager/PPM_AEM.h @@ -3,7 +3,7 @@ // // Copyright (c) 2012-2017 Arm Limited (or its affiliates). All rights reserved. // Use, modification and redistribution of this file is subject to your possession of a -// valid End User License Agreement for the Arm Product of which these examples are part of +// valid End User License Agreement for the Arm Product of which these examples are part of // and your compliance with all applicable terms and conditions of such licence agreement. // diff --git a/ports_module/cortex_a35/gnu/example_build/sample_threadx_module_manager/sample_threadx_module_manager.c b/ports_module/cortex_a35/gnu/example_build/sample_threadx_module_manager/sample_threadx_module_manager.c index c7296646..c0772002 100644 --- a/ports_module/cortex_a35/gnu/example_build/sample_threadx_module_manager/sample_threadx_module_manager.c +++ b/ports_module/cortex_a35/gnu/example_build/sample_threadx_module_manager/sample_threadx_module_manager.c @@ -115,7 +115,7 @@ void module_manager_entry(ULONG thread_input) /* Load the module with absolute address linkage, in this example it is placed there by the multiple image download. */ txm_module_manager_absolute_load(&my_module, "my module", (void *) MODULE_CODE); - + /* Start the module. */ txm_module_manager_start(&my_module); @@ -127,10 +127,10 @@ void module_manager_entry(ULONG thread_input) tx_thread_sleep(10); } } - + /* Stop the module. */ txm_module_manager_stop(&my_module); - + /* Unload the module. */ txm_module_manager_unload(&my_module); @@ -139,11 +139,11 @@ void module_manager_entry(ULONG thread_input) /* Start the module again. */ txm_module_manager_start(&my_module); - + /* Now just spin... */ while(1) { - + tx_thread_sleep(10); } } diff --git a/ports_module/cortex_a35/gnu/example_build/sample_threadx_module_manager/sample_threadx_module_manager.ld b/ports_module/cortex_a35/gnu/example_build/sample_threadx_module_manager/sample_threadx_module_manager.ld index eec8f12b..3bf47736 100644 --- a/ports_module/cortex_a35/gnu/example_build/sample_threadx_module_manager/sample_threadx_module_manager.ld +++ b/ports_module/cortex_a35/gnu/example_build/sample_threadx_module_manager/sample_threadx_module_manager.ld @@ -1,7 +1,7 @@ /* Linker script to place sections and symbol values. * It references following symbols, which must be defined in code: * start64 : Entry point - * + * * It defines following symbols, which code can use without definition: * __cs3_peripherals * __code_start diff --git a/ports_module/cortex_a35/gnu/example_build/sample_threadx_module_manager/sp804_timer.c b/ports_module/cortex_a35/gnu/example_build/sample_threadx_module_manager/sp804_timer.c index 4dc009b2..c2ce6faa 100644 --- a/ports_module/cortex_a35/gnu/example_build/sample_threadx_module_manager/sp804_timer.c +++ b/ports_module/cortex_a35/gnu/example_build/sample_threadx_module_manager/sp804_timer.c @@ -3,7 +3,7 @@ // // Copyright (c) 2009-2017 Arm Limited (or its affiliates). All rights reserved. // Use, modification and redistribution of this file is subject to your possession of a -// valid End User License Agreement for the Arm Product of which these examples are part of +// valid End User License Agreement for the Arm Product of which these examples are part of // and your compliance with all applicable terms and conditions of such licence agreement. // ------------------------------------------------------------ diff --git a/ports_module/cortex_a35/gnu/example_build/sample_threadx_module_manager/sp804_timer.h b/ports_module/cortex_a35/gnu/example_build/sample_threadx_module_manager/sp804_timer.h index 777062cc..4d423904 100644 --- a/ports_module/cortex_a35/gnu/example_build/sample_threadx_module_manager/sp804_timer.h +++ b/ports_module/cortex_a35/gnu/example_build/sample_threadx_module_manager/sp804_timer.h @@ -4,7 +4,7 @@ // // Copyright (c) 2009-2017 Arm Limited (or its affiliates). All rights reserved. // Use, modification and redistribution of this file is subject to your possession of a -// valid End User License Agreement for the Arm Product of which these examples are part of +// valid End User License Agreement for the Arm Product of which these examples are part of // and your compliance with all applicable terms and conditions of such licence agreement. // ------------------------------------------------------------ diff --git a/ports_module/cortex_a35/gnu/example_build/sample_threadx_module_manager/startup.S b/ports_module/cortex_a35/gnu/example_build/sample_threadx_module_manager/startup.S index 67dd8a6a..b44806fe 100644 --- a/ports_module/cortex_a35/gnu/example_build/sample_threadx_module_manager/startup.S +++ b/ports_module/cortex_a35/gnu/example_build/sample_threadx_module_manager/startup.S @@ -7,7 +7,7 @@ // // Copyright (c) 2014-2019 Arm Limited (or its affiliates). All rights reserved. // Use, modification and redistribution of this file is subject to your possession of a -// valid End User License Agreement for the Arm Product of which these examples are part of +// valid End User License Agreement for the Arm Product of which these examples are part of // and your compliance with all applicable terms and conditions of such licence agreement. // ------------------------------------------------------------ @@ -328,7 +328,7 @@ el1_entry_aarch64: // // Cortex-A processors automatically invalidate their caches on reset // (unless suppressed with the DBGL1RSTDISABLE or L2RSTDISABLE pins). - // It is therefore not necessary for software to invalidate the caches + // It is therefore not necessary for software to invalidate the caches // on startup, however, this is done here in case of a warm reset. bl InvalidateUDCaches tlbi VMALLE1 diff --git a/ports_module/cortex_a35/gnu/example_build/sample_threadx_module_manager/tx_initialize_low_level.S b/ports_module/cortex_a35/gnu/example_build/sample_threadx_module_manager/tx_initialize_low_level.S index f4e6ea0a..55ec0f9f 100644 --- a/ports_module/cortex_a35/gnu/example_build/sample_threadx_module_manager/tx_initialize_low_level.S +++ b/ports_module/cortex_a35/gnu/example_build/sample_threadx_module_manager/tx_initialize_low_level.S @@ -1,18 +1,19 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ /**************************************************************************/ /**************************************************************************/ -/** */ -/** ThreadX Component */ +/** */ +/** ThreadX Component */ /** */ /** Initialize */ /** */ @@ -21,45 +22,39 @@ .text .align 3 -/**************************************************************************/ -/* */ -/* FUNCTION RELEASE */ -/* */ -/* _tx_initialize_low_level Cortex-A35/GNU */ +/**************************************************************************/ +/* */ +/* FUNCTION RELEASE */ +/* */ +/* _tx_initialize_low_level Cortex-A35/GNU */ /* 6.1 */ /* AUTHOR */ /* */ /* William E. Lamie, Microsoft Corporation */ /* */ /* DESCRIPTION */ -/* */ -/* This function is responsible for any low-level processor */ -/* initialization, including setting up interrupt vectors, setting */ -/* up a periodic timer interrupt source, saving the system stack */ -/* pointer for use in ISR processing later, and finding the first */ -/* available RAM memory address for tx_application_define. */ -/* */ -/* INPUT */ -/* */ -/* None */ -/* */ -/* OUTPUT */ -/* */ -/* None */ -/* */ -/* CALLS */ -/* */ -/* None */ -/* */ -/* CALLED BY */ -/* */ -/* _tx_initialize_kernel_enter ThreadX entry function */ -/* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ /* */ -/* 09-30-2020 William E. Lamie Initial Version 6.1 */ +/* This function is responsible for any low-level processor */ +/* initialization, including setting up interrupt vectors, setting */ +/* up a periodic timer interrupt source, saving the system stack */ +/* pointer for use in ISR processing later, and finding the first */ +/* available RAM memory address for tx_application_define. */ +/* */ +/* INPUT */ +/* */ +/* None */ +/* */ +/* OUTPUT */ +/* */ +/* None */ +/* */ +/* CALLS */ +/* */ +/* None */ +/* */ +/* CALLED BY */ +/* */ +/* _tx_initialize_kernel_enter ThreadX entry function */ /* */ /**************************************************************************/ /* VOID _tx_initialize_low_level(VOID) diff --git a/ports_module/cortex_a35/gnu/example_build/sample_threadx_module_manager/v8_aarch64.S b/ports_module/cortex_a35/gnu/example_build/sample_threadx_module_manager/v8_aarch64.S index f8db3bfe..45445a98 100644 --- a/ports_module/cortex_a35/gnu/example_build/sample_threadx_module_manager/v8_aarch64.S +++ b/ports_module/cortex_a35/gnu/example_build/sample_threadx_module_manager/v8_aarch64.S @@ -3,7 +3,7 @@ // // Copyright (c) 2012-2019 Arm Limited (or its affiliates). All rights reserved. // Use, modification and redistribution of this file is subject to your possession of a -// valid End User License Agreement for the Arm Product of which these examples are part of +// valid End User License Agreement for the Arm Product of which these examples are part of // and your compliance with all applicable terms and conditions of such licence agreement. // ------------------------------------------------------------ diff --git a/ports_module/cortex_a35/gnu/example_build/sample_threadx_module_manager/v8_aarch64.h b/ports_module/cortex_a35/gnu/example_build/sample_threadx_module_manager/v8_aarch64.h index b09079a4..91ca9653 100644 --- a/ports_module/cortex_a35/gnu/example_build/sample_threadx_module_manager/v8_aarch64.h +++ b/ports_module/cortex_a35/gnu/example_build/sample_threadx_module_manager/v8_aarch64.h @@ -4,7 +4,7 @@ * * Copyright (c) 2012-2014 Arm Limited (or its affiliates). All rights reserved. * Use, modification and redistribution of this file is subject to your possession of a - * valid End User License Agreement for the Arm Product of which these examples are part of + * valid End User License Agreement for the Arm Product of which these examples are part of * and your compliance with all applicable terms and conditions of such licence agreement. */ diff --git a/ports_module/cortex_a35/gnu/example_build/sample_threadx_module_manager/v8_mmu.h b/ports_module/cortex_a35/gnu/example_build/sample_threadx_module_manager/v8_mmu.h index ee8834fa..d0c51601 100644 --- a/ports_module/cortex_a35/gnu/example_build/sample_threadx_module_manager/v8_mmu.h +++ b/ports_module/cortex_a35/gnu/example_build/sample_threadx_module_manager/v8_mmu.h @@ -3,7 +3,7 @@ // // Copyright (c) 2012-2019 Arm Limited (or its affiliates). All rights reserved. // Use, modification and redistribution of this file is subject to your possession of a -// valid End User License Agreement for the Arm Product of which these examples are part of +// valid End User License Agreement for the Arm Product of which these examples are part of // and your compliance with all applicable terms and conditions of such licence agreement. // @@ -101,7 +101,7 @@ #define TT_S1_ATTR_PXN (1 << 53) #define TT_S1_ATTR_UXN (1 << 54) -// PBHA bits[62:59] - If Armv8.2-TTPBHA is implemented, hardware can use these bits +// PBHA bits[62:59] - If Armv8.2-TTPBHA is implemented, hardware can use these bits // for IMPLEMENTATIONDEFINED purposes, otherwise IGNORED #define TT_S1_MAIR_DEV_nGnRnE 0b00000000 diff --git a/ports_module/cortex_a35/gnu/example_build/sample_threadx_module_manager/v8_system.h b/ports_module/cortex_a35/gnu/example_build/sample_threadx_module_manager/v8_system.h index ff96deff..a62d2a33 100644 --- a/ports_module/cortex_a35/gnu/example_build/sample_threadx_module_manager/v8_system.h +++ b/ports_module/cortex_a35/gnu/example_build/sample_threadx_module_manager/v8_system.h @@ -3,7 +3,7 @@ // // Copyright (c) 2012-2016 Arm Limited (or its affiliates). All rights reserved. // Use, modification and redistribution of this file is subject to your possession of a -// valid End User License Agreement for the Arm Product of which these examples are part of +// valid End User License Agreement for the Arm Product of which these examples are part of // and your compliance with all applicable terms and conditions of such licence agreement. // diff --git a/ports_module/cortex_a35/gnu/example_build/sample_threadx_module_manager/v8_utils.S b/ports_module/cortex_a35/gnu/example_build/sample_threadx_module_manager/v8_utils.S index f0fcef26..888892a0 100644 --- a/ports_module/cortex_a35/gnu/example_build/sample_threadx_module_manager/v8_utils.S +++ b/ports_module/cortex_a35/gnu/example_build/sample_threadx_module_manager/v8_utils.S @@ -3,7 +3,7 @@ // // Copyright (c) 2013-2017 Arm Limited (or its affiliates). All rights reserved. // Use, modification and redistribution of this file is subject to your possession of a -// valid End User License Agreement for the Arm Product of which these examples are part of +// valid End User License Agreement for the Arm Product of which these examples are part of // and your compliance with all applicable terms and conditions of such licence agreement. // diff --git a/ports_module/cortex_a35/gnu/example_build/sample_threadx_module_manager/vectors.S b/ports_module/cortex_a35/gnu/example_build/sample_threadx_module_manager/vectors.S index 9e60e001..7784f98e 100644 --- a/ports_module/cortex_a35/gnu/example_build/sample_threadx_module_manager/vectors.S +++ b/ports_module/cortex_a35/gnu/example_build/sample_threadx_module_manager/vectors.S @@ -3,7 +3,7 @@ // // Copyright (c) 2014-2016 Arm Limited (or its affiliates). All rights reserved. // Use, modification and redistribution of this file is subject to your possession of a -// valid End User License Agreement for the Arm Product of which these examples are part of +// valid End User License Agreement for the Arm Product of which these examples are part of // and your compliance with all applicable terms and conditions of such licence agreement. // ------------------------------------------------------------ diff --git a/ports_module/cortex_a35/gnu/example_build/tx/.cproject b/ports_module/cortex_a35/gnu/example_build/tx/.cproject index e3b8bf79..ce420cbc 100644 --- a/ports_module/cortex_a35/gnu/example_build/tx/.cproject +++ b/ports_module/cortex_a35/gnu/example_build/tx/.cproject @@ -1,258 +1,258 @@ <?xml version="1.0" encoding="UTF-8" standalone="no"?> <?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage"> - + <storageModule moduleId="org.eclipse.cdt.core.settings"> - + <cconfiguration id="com.arm.eclipse.build.config.v6.lib.debug.base.332565915"> - + <storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.arm.eclipse.build.config.v6.lib.debug.base.332565915" moduleId="org.eclipse.cdt.core.settings" name="Debug"> - + <externalSettings/> - + <extensions> - + <extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/> - + <extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/> - + <extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/> - + <extension id="org.eclipse.cdt.core.GLDErrorParser" point="org.eclipse.cdt.core.ErrorParser"/> - + <extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/> - + </extensions> - + </storageModule> - + <storageModule moduleId="cdtBuildSystem" version="4.0.0"> - + <configuration artifactExtension="a" artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.staticLib" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.staticLib,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.debug" cleanCommand="clean" description="" id="com.arm.eclipse.build.config.v6.lib.debug.base.332565915" name="Debug" parent="com.arm.eclipse.build.config.v6.lib.debug.base"> - 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+ <scannerConfigBuildInfo instanceId="com.arm.eclipse.build.config.v6.lib.debug.base.1507005551;com.arm.eclipse.build.config.v6.lib.debug.base.1507005551.;com.arm.eclipse.cdt.managedbuild.ds5.gcc.baremetal.tool.c.compiler.var.gcc-8.3.0-aarch64-elf.948279352;com.arm.eclipse.cdt.managedbuild.ds5.gcc.baremetal.tool.c.compiler.input.846815502"> - + <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/> - + </scannerConfigBuildInfo> - + </storageModule> - + </cproject> diff --git a/ports_module/cortex_a35/gnu/inc/tx_port.h b/ports_module/cortex_a35/gnu/inc/tx_port.h index 55007b04..edf3ad66 100644 --- a/ports_module/cortex_a35/gnu/inc/tx_port.h +++ b/ports_module/cortex_a35/gnu/inc/tx_port.h @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -42,12 +43,6 @@ /* own special types that can be mapped to actual data types by this */ /* file to guarantee consistency in the interface and functionality. */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 12-31-2020 Andres Mlinar Initial Version 6.1.3 */ -/* */ /**************************************************************************/ #ifndef TX_PORT_H @@ -59,7 +54,7 @@ #ifdef TX_INCLUDE_USER_DEFINE_FILE -/* Yes, include the user defines in tx_user.h. The defines in this file may +/* Yes, include the user defines in tx_user.h. The defines in this file may alternately be defined on the command line. */ #include "tx_user.h" @@ -119,19 +114,19 @@ typedef unsigned long long ALIGN_TYPE; #define TX_TIMER_THREAD_STACK_SIZE 4096 /* Default timer thread stack size */ #endif -#ifndef TX_TIMER_THREAD_PRIORITY +#ifndef TX_TIMER_THREAD_PRIORITY #define TX_TIMER_THREAD_PRIORITY 0 /* Default timer thread priority */ #endif -/* Define various constants for the ThreadX Cortex ARMv8 port. */ +/* Define various constants for the ThreadX Cortex ARMv8 port. */ #define TX_INT_DISABLE 0xC0 /* Disable IRQ & FIQ interrupts */ #define TX_INT_ENABLE 0x00 /* Enable IRQ & FIQ interrupts */ -/* Define the clock source for trace event entry time stamp. The following two item are port specific. - For example, if the time source is at the address 0x0a800024 and is 16-bits in size, the clock +/* Define the clock source for trace event entry time stamp. The following two item are port specific. + For example, if the time source is at the address 0x0a800024 and is 16-bits in size, the clock source constants would be: #define TX_TRACE_TIME_SOURCE *((ULONG *) 0x0a800024) @@ -189,7 +184,7 @@ ULONG _tx_misra_time_stamp_get(VOID); #endif -/* Determine whether or not stack checking is enabled. By default, ThreadX stack checking is +/* Determine whether or not stack checking is enabled. By default, ThreadX stack checking is disabled. When the following is defined, ThreadX thread stack checking is enabled. If stack checking is enabled (TX_ENABLE_STACK_CHECKING is defined), the TX_DISABLE_STACK_FILLING define is negated, thereby forcing the stack fill which is necessary for the stack checking @@ -203,7 +198,7 @@ ULONG _tx_misra_time_stamp_get(VOID); /* Define the TX_THREAD control block extensions for this port. The main reason - for the multiple macros is so that backward compatibility can be maintained with + for the multiple macros is so that backward compatibility can be maintained with existing ThreadX kernel awareness modules. */ #define TX_THREAD_EXTENSION_0 @@ -243,11 +238,11 @@ ULONG _tx_misra_time_stamp_get(VOID); VOID (*tx_timer_module_expiration_function)(ULONG id); -/* Define the user extension field of the thread control block. Nothing +/* Define the user extension field of the thread control block. Nothing additional is needed for this port so it is defined as white space. */ #ifndef TX_THREAD_USER_EXTENSION -#define TX_THREAD_USER_EXTENSION +#define TX_THREAD_USER_EXTENSION #endif @@ -255,8 +250,8 @@ ULONG _tx_misra_time_stamp_get(VOID); tx_thread_shell_entry, and tx_thread_terminate. */ -#define TX_THREAD_CREATE_EXTENSION(thread_ptr) -#define TX_THREAD_DELETE_EXTENSION(thread_ptr) +#define TX_THREAD_CREATE_EXTENSION(thread_ptr) +#define TX_THREAD_DELETE_EXTENSION(thread_ptr) #define TX_THREAD_COMPLETED_EXTENSION(thread_ptr) #define TX_THREAD_TERMINATED_EXTENSION(thread_ptr) @@ -283,8 +278,8 @@ ULONG _tx_misra_time_stamp_get(VOID); #define TX_TIMER_DELETE_EXTENSION(timer_ptr) -/* Determine if the ARM architecture has the CLZ instruction. This is available on - architectures v5 and above. If available, redefine the macro for calculating the +/* Determine if the ARM architecture has the CLZ instruction. This is available on + architectures v5 and above. If available, redefine the macro for calculating the lowest bit set. */ #ifndef TX_DISABLE_INLINE @@ -296,7 +291,7 @@ ULONG _tx_misra_time_stamp_get(VOID); /* Define the internal timer extension to also hold the thread pointer such that _tx_thread_timeout can figure out what thread timeout to process. */ - + #define TX_TIMER_INTERNAL_EXTENSION VOID *tx_timer_internal_thread_timeout_ptr; @@ -312,9 +307,9 @@ ULONG _tx_misra_time_stamp_get(VOID); #define TX_THREAD_TIMEOUT_POINTER_SETUP(t) (t) = (TX_THREAD *) _tx_timer_expired_timer_ptr -> tx_timer_internal_thread_timeout_ptr; -/* Define ThreadX interrupt lockout and restore macros for protection on - access of critical kernel information. The restore interrupt macro must - restore the interrupt posture of the running thread prior to the value +/* Define ThreadX interrupt lockout and restore macros for protection on + access of critical kernel information. The restore interrupt macro must + restore the interrupt posture of the running thread prior to the value present prior to the disable macro. In most cases, the save area macro is used to define a local function save area for the disable and restore macros. */ @@ -385,8 +380,8 @@ VOID tx_thread_fp_disable(VOID); /* Define the version ID of ThreadX. This may be utilized by the application. */ #ifdef TX_THREAD_INIT -CHAR _tx_version_id[] = - "Copyright (c) 2024 Microsoft Corporation. * ThreadX Modules Cortex-A35/GNU Version 6.4.2 *"; +CHAR _tx_version_id[] = + "(c) 2024 Microsoft Corp. (c) 2026-present Eclipse ThreadX contributors. * ThreadX Modules Cortex-A35/GNU Version 6.5.0.202601 *"; #else extern CHAR _tx_version_id[]; #endif diff --git a/ports_module/cortex_a35/gnu/inc/txm_module_port.h b/ports_module/cortex_a35/gnu/inc/txm_module_port.h index 847f35c5..e5654cde 100644 --- a/ports_module/cortex_a35/gnu/inc/txm_module_port.h +++ b/ports_module/cortex_a35/gnu/inc/txm_module_port.h @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -35,12 +36,6 @@ /* This file defines the basic module constants, interface structures, */ /* and function prototypes. */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 12-31-2020 Andres Mlinar Initial Version 6.1.3 */ -/* */ /**************************************************************************/ #ifndef TXM_MODULE_PORT_H @@ -278,6 +273,6 @@ ALIGN_TYPE _txm_module_manager_port_dispatch(TXM_MODULE_INSTANCE *module_instanc #define TXM_MODULE_MANAGER_VERSION_ID \ CHAR _txm_module_manager_version_id[] = \ - "Copyright (c) 2024 Microsoft Corporation. * ThreadX Module Cortex-A35/GNU Version 6.4.2 *"; + "Copyright (c) 2024 Microsoft Corporation. * ThreadX Module Cortex-A35/GNU Version 6.5.0.202601 *"; #endif diff --git a/ports_module/cortex_a35/gnu/module_lib/src/txm_module_thread_shell_entry.c b/ports_module/cortex_a35/gnu/module_lib/src/txm_module_thread_shell_entry.c index 8ac207f0..922b9306 100644 --- a/ports_module/cortex_a35/gnu/module_lib/src/txm_module_thread_shell_entry.c +++ b/ports_module/cortex_a35/gnu/module_lib/src/txm_module_thread_shell_entry.c @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -80,12 +81,6 @@ ALIGN_TYPE (*_txm_module_kernel_call_dispatcher)(ULONG type /* */ /* Initial thread stack frame */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 12-31-2020 Andres Mlinar Initial Version 6.1.3 */ -/* */ /**************************************************************************/ VOID _txm_module_thread_shell_entry(TX_THREAD *thread_ptr, TXM_MODULE_THREAD_ENTRY_INFO *thread_info) { @@ -122,7 +117,7 @@ VOID (*entry_exit_notify)(TX_THREAD *notify_thread_ptr, UINT type); An error here typically indicates the resident portion of _tx_thread_schedule is not supporting the trap to obtain the function pointer. */ } - + /* Resume the module's callback thread, already created in the manager. */ _txe_thread_resume(thread_info -> txm_module_thread_entry_info_callback_request_thread); } diff --git a/ports_module/cortex_a35/gnu/module_manager/src/tx_thread_context_restore.S b/ports_module/cortex_a35/gnu/module_manager/src/tx_thread_context_restore.S index 34b0db92..d1ef83ca 100644 --- a/ports_module/cortex_a35/gnu/module_manager/src/tx_thread_context_restore.S +++ b/ports_module/cortex_a35/gnu/module_manager/src/tx_thread_context_restore.S @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -56,12 +57,6 @@ /* */ /* ISRs Interrupt Service Routines */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 12-31-2020 Andres Mlinar Initial Version 6.1.3 */ -/* */ /**************************************************************************/ // VOID _tx_thread_context_restore(VOID) // { @@ -87,13 +82,13 @@ _tx_thread_context_restore: LDR x3, =_tx_thread_system_state // Pickup address of system state var LDR w2, [x3, #0] // Pickup system state SUB w2, w2, #1 // Decrement the counter - STR w2, [x3, #0] // Store the counter + STR w2, [x3, #0] // Store the counter CMP w2, #0 // Was this the first interrupt? BEQ __tx_thread_not_nested_restore // If so, not a nested restore /* Interrupts are nested. */ - /* Just recover the saved registers and return to the point of + /* Just recover the saved registers and return to the point of interrupt. */ LDP x4, x5, [sp], #16 // Pickup saved SPSR/DAIF and ELR_EL diff --git a/ports_module/cortex_a35/gnu/module_manager/src/tx_thread_context_save.S b/ports_module/cortex_a35/gnu/module_manager/src/tx_thread_context_save.S index 349f04f3..c8b3312f 100644 --- a/ports_module/cortex_a35/gnu/module_manager/src/tx_thread_context_save.S +++ b/ports_module/cortex_a35/gnu/module_manager/src/tx_thread_context_save.S @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -54,12 +55,6 @@ /* */ /* ISRs */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 12-31-2020 Andres Mlinar Initial Version 6.1.3 */ -/* */ /**************************************************************************/ // VOID _tx_thread_context_save(VOID) // { @@ -68,7 +63,7 @@ _tx_thread_context_save: /* Upon entry to this routine, it is assumed that IRQ/FIQ interrupts are locked - out, x29 (frame pointer), x30 (link register) are saved, we are in EL1, + out, x29 (frame pointer), x30 (link register) are saved, we are in EL1, and all other registers are intact. */ /* Check for a nested interrupt condition. */ @@ -137,7 +132,7 @@ __tx_thread_not_nested_save: LDR x1, =_tx_thread_current_ptr // Pickup address of current thread ptr LDR x0, [x1, #0] // Pickup current thread pointer CMP x0, #0 // Is it NULL? - BEQ __tx_thread_idle_system_save // If so, interrupt occurred in + BEQ __tx_thread_idle_system_save // If so, interrupt occurred in // scheduling loop - nothing needs saving! /* Save minimal context of interrupted thread. */ @@ -196,7 +191,7 @@ __tx_thread_idle_system_save: /* Interrupt occurred in the scheduling loop. */ - /* Not much to do here, just adjust the stack pointer, and return to IRQ + /* Not much to do here, just adjust the stack pointer, and return to IRQ processing. */ #ifdef TX_ENABLE_EXECUTION_CHANGE_NOTIFY @@ -209,8 +204,8 @@ __tx_thread_idle_system_save: #endif ADD sp, sp, #48 // Recover saved registers - RET // Continue IRQ processing + RET // Continue IRQ processing // } -// } +// } diff --git a/ports_module/cortex_a35/gnu/module_manager/src/tx_thread_fp_disable.c b/ports_module/cortex_a35/gnu/module_manager/src/tx_thread_fp_disable.c index 1bf9d364..d586d241 100644 --- a/ports_module/cortex_a35/gnu/module_manager/src/tx_thread_fp_disable.c +++ b/ports_module/cortex_a35/gnu/module_manager/src/tx_thread_fp_disable.c @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -58,12 +59,6 @@ /* */ /* Application Code */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 12-31-2020 Andres Mlinar Initial Version 6.1.3 */ -/* */ /**************************************************************************/ VOID _tx_thread_fp_disable(VOID) { @@ -81,11 +76,11 @@ ULONG system_state; /* Make sure it is not NULL. */ if (thread_ptr != TX_NULL) { - + /* Thread is running... make sure the call is from the thread context. */ if (system_state == 0) { - + /* Yes, now set the FP enable flag to false in the TX_THREAD structure. */ thread_ptr -> tx_thread_fp_enable = TX_FALSE; } diff --git a/ports_module/cortex_a35/gnu/module_manager/src/tx_thread_fp_enable.c b/ports_module/cortex_a35/gnu/module_manager/src/tx_thread_fp_enable.c index 76516b23..ead0c528 100644 --- a/ports_module/cortex_a35/gnu/module_manager/src/tx_thread_fp_enable.c +++ b/ports_module/cortex_a35/gnu/module_manager/src/tx_thread_fp_enable.c @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -58,12 +59,6 @@ /* */ /* Application Code */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 12-31-2020 Andres Mlinar Initial Version 6.1.3 */ -/* */ /**************************************************************************/ VOID _tx_thread_fp_enable(VOID) { @@ -81,11 +76,11 @@ ULONG system_state; /* Make sure it is not NULL. */ if (thread_ptr != TX_NULL) { - + /* Thread is running... make sure the call is from the thread context. */ if (system_state == 0) { - + /* Yes, now setup the FP enable flag in the TX_THREAD structure. */ thread_ptr -> tx_thread_fp_enable = TX_TRUE; } diff --git a/ports_module/cortex_a35/gnu/module_manager/src/tx_thread_interrupt_control.S b/ports_module/cortex_a35/gnu/module_manager/src/tx_thread_interrupt_control.S index f271084c..fe702a39 100644 --- a/ports_module/cortex_a35/gnu/module_manager/src/tx_thread_interrupt_control.S +++ b/ports_module/cortex_a35/gnu/module_manager/src/tx_thread_interrupt_control.S @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -53,12 +54,6 @@ /* */ /* Application Code */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 12-31-2020 Andres Mlinar Initial Version 6.1.3 */ -/* */ /**************************************************************************/ // UINT _tx_thread_interrupt_control(UINT new_posture) // { diff --git a/ports_module/cortex_a35/gnu/module_manager/src/tx_thread_interrupt_disable.S b/ports_module/cortex_a35/gnu/module_manager/src/tx_thread_interrupt_disable.S index 6c781d55..0add0b6f 100644 --- a/ports_module/cortex_a35/gnu/module_manager/src/tx_thread_interrupt_disable.S +++ b/ports_module/cortex_a35/gnu/module_manager/src/tx_thread_interrupt_disable.S @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -52,12 +53,6 @@ /* */ /* Application Code */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 12-31-2020 Andres Mlinar Initial Version 6.1.3 */ -/* */ /**************************************************************************/ // UINT _tx_thread_interrupt_disable(void) // { diff --git a/ports_module/cortex_a35/gnu/module_manager/src/tx_thread_interrupt_restore.S b/ports_module/cortex_a35/gnu/module_manager/src/tx_thread_interrupt_restore.S index 0ab1b0e3..74cc9266 100644 --- a/ports_module/cortex_a35/gnu/module_manager/src/tx_thread_interrupt_restore.S +++ b/ports_module/cortex_a35/gnu/module_manager/src/tx_thread_interrupt_restore.S @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -53,12 +54,6 @@ /* */ /* Application Code */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 12-31-2020 Andres Mlinar Initial Version 6.1.3 */ -/* */ /**************************************************************************/ // UINT _tx_thread_interrupt_restore(UINT old_posture) // { diff --git a/ports_module/cortex_a35/gnu/module_manager/src/tx_thread_schedule.S b/ports_module/cortex_a35/gnu/module_manager/src/tx_thread_schedule.S index f39d341b..a94a70ef 100644 --- a/ports_module/cortex_a35/gnu/module_manager/src/tx_thread_schedule.S +++ b/ports_module/cortex_a35/gnu/module_manager/src/tx_thread_schedule.S @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -56,12 +57,6 @@ /* _tx_thread_system_return Return to system from thread */ /* _tx_thread_context_restore Restore thread's context */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 12-31-2020 Andres Mlinar Initial Version 6.1.3 */ -/* */ /**************************************************************************/ // VOID _tx_thread_schedule(VOID) // { @@ -76,15 +71,15 @@ _tx_thread_schedule: // Wait for a thread to execute. */ // do // { - + LDR x1, =_tx_thread_execute_ptr // Address of thread execute ptr #ifdef TX_ENABLE_WFI __tx_thread_schedule_loop: LDR x0, [x1, #0] // Pickup next thread to execute CMP x0, #0 // Is it NULL? - BNE _tx_thread_schedule_thread // - WFI // + BNE _tx_thread_schedule_thread // + WFI // B __tx_thread_schedule_loop // Keep looking for a thread _tx_thread_schedule_thread: #else @@ -96,7 +91,7 @@ __tx_thread_schedule_loop: // } // while(_tx_thread_execute_ptr == TX_NULL); - + /* Yes! We have a thread to execute. Lockout interrupts and transfer control to it. */ @@ -105,7 +100,7 @@ __tx_thread_schedule_loop: /* Setup the current thread pointer. */ // _tx_thread_current_ptr = _tx_thread_execute_ptr; - LDR x1, =_tx_thread_current_ptr // Pickup address of current thread + LDR x1, =_tx_thread_current_ptr // Pickup address of current thread STR x0, [x1, #0] // Setup current thread pointer /* Increment the run count for this thread. */ @@ -119,7 +114,7 @@ __tx_thread_schedule_loop: /* Setup time-slice, if present. */ // _tx_timer_time_slice = _tx_thread_current_ptr -> tx_thread_time_slice; - LDR x2, =_tx_timer_time_slice // Pickup address of time slice + LDR x2, =_tx_timer_time_slice // Pickup address of time slice // variable LDR x4, [x0, #8] // Switch stack pointers MOV sp, x4 // diff --git a/ports_module/cortex_a35/gnu/module_manager/src/tx_thread_stack_build.S b/ports_module/cortex_a35/gnu/module_manager/src/tx_thread_stack_build.S index d5febaad..2c1c8f5f 100644 --- a/ports_module/cortex_a35/gnu/module_manager/src/tx_thread_stack_build.S +++ b/ports_module/cortex_a35/gnu/module_manager/src/tx_thread_stack_build.S @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -55,12 +56,6 @@ /* */ /* _tx_thread_create Create thread service */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 12-31-2020 Andres Mlinar Initial Version 6.1.3 */ -/* */ /**************************************************************************/ // VOID _tx_thread_stack_build(TX_THREAD *thread_ptr, VOID (*function_ptr)(VOID)) // { diff --git a/ports_module/cortex_a35/gnu/module_manager/src/tx_thread_system_return.S b/ports_module/cortex_a35/gnu/module_manager/src/tx_thread_system_return.S index bd00e697..7e43ba48 100644 --- a/ports_module/cortex_a35/gnu/module_manager/src/tx_thread_system_return.S +++ b/ports_module/cortex_a35/gnu/module_manager/src/tx_thread_system_return.S @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -55,12 +56,6 @@ /* */ /* ThreadX components */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 12-31-2020 Andres Mlinar Initial Version 6.1.3 */ -/* */ /**************************************************************************/ // VOID _tx_thread_system_return(VOID) // { diff --git a/ports_module/cortex_a35/gnu/module_manager/src/tx_timer_interrupt.S b/ports_module/cortex_a35/gnu/module_manager/src/tx_timer_interrupt.S index a0007548..a1eb57bd 100644 --- a/ports_module/cortex_a35/gnu/module_manager/src/tx_timer_interrupt.S +++ b/ports_module/cortex_a35/gnu/module_manager/src/tx_timer_interrupt.S @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -57,12 +58,6 @@ /* */ /* interrupt vector */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 12-31-2020 Andres Mlinar Initial Version 6.1.3 */ -/* */ /**************************************************************************/ // VOID _tx_timer_interrupt(VOID) // { @@ -86,7 +81,7 @@ _tx_timer_interrupt: // if (_tx_timer_time_slice) // { - LDR x3, =_tx_timer_time_slice // Pickup address of time-slice + LDR x3, =_tx_timer_time_slice // Pickup address of time-slice LDR w2, [x3, #0] // Pickup time-slice CMP w2, #0 // Is it non-active? BEQ __tx_timer_no_time_slice // Yes, skip time-slice processing @@ -203,7 +198,7 @@ __tx_timer_dont_activate: // if (_tx_timer_expired_time_slice) // { - LDR x3, =_tx_timer_expired_time_slice // Pickup addr of time-slice expired + LDR x3, =_tx_timer_expired_time_slice // Pickup addr of time-slice expired LDR w2, [x3, #0] // Pickup the actual flag CMP w2, #0 // See if the flag is set BEQ __tx_timer_not_ts_expiration // No, skip time-slice processing diff --git a/ports_module/cortex_a35/gnu/module_manager/src/txm_module_manager_port_dispatch.c b/ports_module/cortex_a35/gnu/module_manager/src/txm_module_manager_port_dispatch.c index cc3296cf..903b30f7 100644 --- a/ports_module/cortex_a35/gnu/module_manager/src/txm_module_manager_port_dispatch.c +++ b/ports_module/cortex_a35/gnu/module_manager/src/txm_module_manager_port_dispatch.c @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -59,12 +60,6 @@ /* */ /* _txm_module_manager_kernel_dispatch */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 12-31-2020 Andres Mlinar Initial Version 6.1.3 */ -/* */ /**************************************************************************/ ALIGN_TYPE _txm_module_manager_port_dispatch(TXM_MODULE_INSTANCE *module_instance, ULONG kernel_request, ALIGN_TYPE param_0, ALIGN_TYPE param_1, ALIGN_TYPE param_2) { @@ -79,6 +74,6 @@ ALIGN_TYPE return_value = TX_NOT_AVAILABLE; break; } } - + return(return_value); } diff --git a/ports_module/cortex_a35/gnu/module_manager/src/txm_module_manager_thread_stack_build.S b/ports_module/cortex_a35/gnu/module_manager/src/txm_module_manager_thread_stack_build.S index 983bd2a7..a9a50ec9 100644 --- a/ports_module/cortex_a35/gnu/module_manager/src/txm_module_manager_thread_stack_build.S +++ b/ports_module/cortex_a35/gnu/module_manager/src/txm_module_manager_thread_stack_build.S @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -55,12 +56,6 @@ /* */ /* _tx_thread_create Create thread service */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 12-31-2020 Andres Mlinar Initial Version 6.1.3 */ -/* */ /**************************************************************************/ // VOID _txm_module_manager_thread_stack_build(TX_THREAD *thread_ptr, VOID (*function_ptr)(TX_THREAD *, TXM_MODULE_INSTANCE *)) // { diff --git a/ports_module/cortex_a35/gnu/readme_threadx.txt b/ports_module/cortex_a35/gnu/readme_threadx.txt index 13c2c9c0..c318db76 100644 --- a/ports_module/cortex_a35/gnu/readme_threadx.txt +++ b/ports_module/cortex_a35/gnu/readme_threadx.txt @@ -1,20 +1,20 @@ - Microsoft's Azure RTOS ThreadX Modules for Cortex-A35 + Microsoft's Azure RTOS ThreadX Modules for Cortex-A35 Using the ARM GNU Compiler & DS 1. Import the ThreadX Modules Projects -In order to build the ThreadX library and the ThreadX demonstration, first import +In order to build the ThreadX library and the ThreadX demonstration, first import the 'tx', 'txm', 'sample_threadx', 'sample_threadx_module' and -'sample_thread_module_manager' projects (located in the "example_build" directory) +'sample_thread_module_manager' projects (located in the "example_build" directory) into your DS workspace. 2. Building the ThreadX run-time Library -Building the ThreadX library is easy; simply select the Eclipse project file -"tx" and then select the build button. You should now observe the compilation -and assembly of the ThreadX library. This project build produces the ThreadX +Building the ThreadX library is easy; simply select the Eclipse project file +"tx" and then select the build button. You should now observe the compilation +and assembly of the ThreadX library. This project build produces the ThreadX library file tx.a. To bild the ThreadX Module library select the project "txm" and select the build button to produce the file txm.a. @@ -36,8 +36,8 @@ First build the ThreadX sample module project sample_thread_module by selecting clicking the build button. Next built the ThreadX Module Manager sample by selecting sample_threadx_module_manager and clicking the build button. -To run the ThreadX Module Manager demo in the sample_threadx_module_manager project, -right-click on the sample_threadx_module_manager.launch file and select 'Debug As -> sample_threadx'. +To run the ThreadX Module Manager demo in the sample_threadx_module_manager project, +right-click on the sample_threadx_module_manager.launch file and select 'Debug As -> sample_threadx'. The debugger is setup for the Cortex-A35 FVP, so selecting "Debug" will launch the FVP, load the sample_threadx.axf ELF file and run to the entry point. You are now ready to execute the ThreadX demonstration. @@ -45,29 +45,29 @@ the ThreadX demonstration. 4. System Initialization -The entry point in ThreadX for the Cortex-A35 using GCC tools is at label -"start64". This is defined within the GCC compiler's startup code. In addition, -this is where all static and global pre-set C variable initialization processing +The entry point in ThreadX for the Cortex-A35 using GCC tools is at label +"start64". This is defined within the GCC compiler's startup code. In addition, +this is where all static and global pre-set C variable initialization processing takes place. -The ThreadX tx_initialize_low_level.s file is responsible for determining the -first available RAM address for use by the application, which is supplied as the +The ThreadX tx_initialize_low_level.s file is responsible for determining the +first available RAM address for use by the application, which is supplied as the sole input parameter to your application definition function, tx_application_define. 5. Register Usage and Stack Frames -The 64-bit GCC compiler assumes that registers x0-x18 are scratch registers -for each function. All other registers used by a C function must be preserved -by the function. ThreadX takes advantage of this in situations where a context -switch happens as a result of making a ThreadX service call (which is itself a -C function). In such cases, the saved context of a thread is only the +The 64-bit GCC compiler assumes that registers x0-x18 are scratch registers +for each function. All other registers used by a C function must be preserved +by the function. ThreadX takes advantage of this in situations where a context +switch happens as a result of making a ThreadX service call (which is itself a +C function). In such cases, the saved context of a thread is only the non-scratch registers. The following defines the saved context stack frames for context switches that occur as a result of interrupt handling or from thread-level API calls. All suspended threads have one of these two types of stack frames. The top -of the suspended thread's stack is pointed to by tx_thread_stack_ptr in the +of the suspended thread's stack is pointed to by tx_thread_stack_ptr in the associated thread control block TX_THREAD. @@ -108,7 +108,7 @@ FP not enabled and TX_THREAD.tx_thread_fp_enable == 0: 0x0F0 x0 0x0F8 x1 0x100 x29 - 0x108 x30 + 0x108 x30 FP enabled and TX_THREAD.tx_thread_fp_enable == 1: @@ -194,14 +194,14 @@ FP enabled and TX_THREAD.tx_thread_fp_enable == 1: 6. Improving Performance -The distribution version of ThreadX is built without any compiler optimizations. -This makes it easy to debug because you can trace or set breakpoints inside of -ThreadX itself. Of course, this costs some performance. To make it run faster, +The distribution version of ThreadX is built without any compiler optimizations. +This makes it easy to debug because you can trace or set breakpoints inside of +ThreadX itself. Of course, this costs some performance. To make it run faster, you can change the project settings to the desired compiler optimization level. -In addition, you can eliminate the ThreadX basic API error checking by -compiling your application code with the symbol TX_DISABLE_ERROR_CHECKING -defined. +In addition, you can eliminate the ThreadX basic API error checking by +compiling your application code with the symbol TX_DISABLE_ERROR_CHECKING +defined. 7. Interrupt Handling @@ -221,22 +221,22 @@ irq_handler: B _tx_thread_context_restore -By default, ThreadX assumes EL3 level of execution. Running and taking exceptions in EL1 +By default, ThreadX assumes EL3 level of execution. Running and taking exceptions in EL1 and EL2 can be done by simply building the ThreadX library with either EL1 or EL2 defined. 8. ThreadX Timer Interrupt -ThreadX requires a periodic interrupt source to manage all time-slicing, thread sleeps, -timeouts, and application timers. Without such a timer interrupt source, these services -are not functional. However, all other ThreadX services are operational without a +ThreadX requires a periodic interrupt source to manage all time-slicing, thread sleeps, +timeouts, and application timers. Without such a timer interrupt source, these services +are not functional. However, all other ThreadX services are operational without a periodic timer source. 9. ARM FP Support By default, FP support is disabled for each thread. If saving the context of the FP registers -is needed, the following API call must be made from the context of the application thread - before +is needed, the following API call must be made from the context of the application thread - before the FP usage: void tx_thread_fp_enable(void); |