diff options
Diffstat (limited to 'ports_module/cortex_r4/ac6')
41 files changed, 720 insertions, 869 deletions
diff --git a/ports_module/cortex_r4/ac6/example_build/sample_threadx/.cproject b/ports_module/cortex_r4/ac6/example_build/sample_threadx/.cproject index 71818fd9..4ceb8982 100644 --- a/ports_module/cortex_r4/ac6/example_build/sample_threadx/.cproject +++ b/ports_module/cortex_r4/ac6/example_build/sample_threadx/.cproject @@ -1,170 +1,170 @@ <?xml version="1.0" encoding="UTF-8" standalone="no"?> <?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage"> - + <storageModule moduleId="org.eclipse.cdt.core.settings"> - + <cconfiguration id="com.arm.eclipse.build.config.v6.exe.debug.base.1352491235"> - + <storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.arm.eclipse.build.config.v6.exe.debug.base.1352491235" moduleId="org.eclipse.cdt.core.settings" name="Debug"> - + <externalSettings/> - + <extensions> - + <extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/> - + <extension id="com.arm.eclipse.builder.armcc.error" point="org.eclipse.cdt.core.ErrorParser"/> - + <extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/> - + </extensions> - + </storageModule> - + <storageModule moduleId="cdtBuildSystem" version="4.0.0"> - + <configuration artifactExtension="axf" artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.debug" cleanCommand="clean" description="" id="com.arm.eclipse.build.config.v6.exe.debug.base.1352491235" name="Debug" parent="com.arm.eclipse.build.config.v6.exe.debug.base"> - + <folderInfo id="com.arm.eclipse.build.config.v6.exe.debug.base.1352491235." name="/" resourcePath=""> - + <toolChain id="com.arm.toolchain.v6.exe.debug.base.var.arm_compiler_6-6.804641625" name="Arm Compiler 6" superClass="com.arm.toolchain.v6.exe.debug.base.var.arm_compiler_6-6"> - + <option id="com.arm.toolchain.v6.base.options.target.cpu_fpu.1862712116" superClass="com.arm.toolchain.v6.base.options.target.cpu_fpu" value="Cortex-R4.VFPv3_D16" valueType="string"/> - + <option id="com.arm.toolchain.v6.base.options.floatabi.601947014" name="Float ABI" superClass="com.arm.toolchain.v6.base.options.floatabi" value="com.arm.tool.c.compiler.v6.base.option.floatabi.soft" valueType="enumerated"/> - + <option id="com.arm.toolchain.v6.base.options.inst.1204023733" name="Instruction set" superClass="com.arm.toolchain.v6.base.options.inst" value="com.arm.tool.c.compiler.v6.base.option.inst.arm" valueType="enumerated"/> - + <option id="com.arm.toolchain.v6.base.options.debug.level.818353536" name="Debug Level" superClass="com.arm.toolchain.v6.base.options.debug.level" value="com.arm.tool.c.compiler.v6.base.options.debug.level.std" valueType="enumerated"/> - + <targetPlatform id="com.arm.toolchain.v6.exe.debug.base.var.arm_compiler_6-6.804641625.385562723" name=""/> - + <builder autoBuildTarget="all" buildPath="${workspace_loc:/sample_threadx_module_manager}/Debug" cleanBuildTarget="clean" enableAutoBuild="false" enableCleanBuild="true" enabledIncrementalBuild="true" id="com.arm.toolchain.v6.builder.1941932380" incrementalBuildTarget="all" keepEnvironmentInBuildfile="false" managedBuildOn="true" name="Gnu Make Builder" parallelBuildOn="true" parallelizationNumber="8" superClass="com.arm.toolchain.v6.builder"/> - + <tool id="com.arm.tool.c.compiler.v6.base.var.arm_compiler_6-6.31312115" name="Arm C Compiler 6" superClass="com.arm.tool.c.compiler.v6.base.var.arm_compiler_6-6"> - + <option id="com.arm.tool.c.compiler.v6.base.option.target.1871497465" name="Target (--target)" superClass="com.arm.tool.c.compiler.v6.base.option.target" useByScannerDiscovery="true" value="arm-arm-none-eabi" valueType="string"/> - + <option id="com.arm.tool.c.compiler.v6.base.option.cpu.582298517" name="CPU (-mcpu)" superClass="com.arm.tool.c.compiler.v6.base.option.cpu" useByScannerDiscovery="true" value="cortex-r4f" valueType="string"/> - + <option id="com.arm.tool.c.compiler.v6.base.option.fpu.2077436824" name="FPU (-mfpu)" superClass="com.arm.tool.c.compiler.v6.base.option.fpu" useByScannerDiscovery="true" value="vfpv3-d16" valueType="string"/> - + <option id="com.arm.tool.c.compiler.v6.base.option.floatabi.1440514949" name="Float ABI (-mfloat-abi)" superClass="com.arm.tool.c.compiler.v6.base.option.floatabi" useByScannerDiscovery="true" value="com.arm.tool.c.compiler.v6.base.option.floatabi.soft" valueType="enumerated"/> - + <option id="com.arm.tool.c.compiler.v6.base.option.inst.1725781447" name="Instruction set" superClass="com.arm.tool.c.compiler.v6.base.option.inst" useByScannerDiscovery="true" value="com.arm.tool.c.compiler.v6.base.option.inst.arm" valueType="enumerated"/> - + <option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.arm.tool.c.compiler.v6.base.option.incpath.1999415170" name="Include path (-I)" superClass="com.arm.tool.c.compiler.v6.base.option.incpath" useByScannerDiscovery="false" valueType="includePath"> - + <listOptionValue builtIn="false" value=""${workspace_loc:/tx/inc_port}""/> - + <listOptionValue builtIn="false" value=""${workspace_loc:/tx/inc_generic}""/> - + <listOptionValue builtIn="false" value=""${workspace_loc:/tx/inc_generic_modules}""/> - + </option> - + <option id="com.arm.tool.c.compiler.v6.base.options.debug.level.1853971560" name="Debug Level" superClass="com.arm.tool.c.compiler.v6.base.options.debug.level" useByScannerDiscovery="true" value="com.arm.tool.c.compiler.v6.base.options.debug.level.std" valueType="enumerated"/> - + <inputType id="com.arm.tool.c.compiler.v6.base.input.1194689224" superClass="com.arm.tool.c.compiler.v6.base.input"/> - + </tool> - + <tool id="com.arm.tool.cpp.compiler.v6.base.var.arm_compiler_6-6.1028636576" name="Arm C++ Compiler 6" superClass="com.arm.tool.cpp.compiler.v6.base.var.arm_compiler_6-6"> - + <option id="com.arm.tool.c.compiler.v6.base.options.debug.level.528092979" name="Debug Level" superClass="com.arm.tool.c.compiler.v6.base.options.debug.level" useByScannerDiscovery="true" value="com.arm.tool.c.compiler.v6.base.options.debug.level.std" valueType="enumerated"/> - + </tool> - + <tool id="com.arm.tool.assembler.v6.base.var.arm_compiler_6-6.2084155435" name="Arm Assembler 6" superClass="com.arm.tool.assembler.v6.base.var.arm_compiler_6-6"> - + <option id="com.arm.tool.assembler.v6.base.option.target.1360157853" name="Target (--target)" superClass="com.arm.tool.assembler.v6.base.option.target" useByScannerDiscovery="false" value="arm-arm-none-eabi" valueType="string"/> - + <option id="com.arm.tool.assembler.v6.base.option.cpu.1037858246" name="CPU (-mcpu)" superClass="com.arm.tool.assembler.v6.base.option.cpu" useByScannerDiscovery="false" value="cortex-r4f" valueType="string"/> - + <option id="com.arm.tool.assembler.v6.base.option.fpu.1926125524" name="FPU (-mfpu)" superClass="com.arm.tool.assembler.v6.base.option.fpu" useByScannerDiscovery="true" value="vfpv3-d16" valueType="string"/> - + <option id="com.arm.tool.assembler.v6.base.option.floatabi.8023587" name="Float ABI (-mfloat-abi)" superClass="com.arm.tool.assembler.v6.base.option.floatabi" useByScannerDiscovery="true" value="com.arm.tool.c.compiler.v6.base.option.floatabi.soft" valueType="enumerated"/> - + <option id="com.arm.tool.assembler.v6.base.option.inst.661293084" name="Instruction set" superClass="com.arm.tool.assembler.v6.base.option.inst" useByScannerDiscovery="true" value="com.arm.tool.c.compiler.v6.base.option.inst.arm" valueType="enumerated"/> - + <option id="com.arm.tool.assembler.v6.base.options.debug.level.460302808" name="Debug Level" superClass="com.arm.tool.assembler.v6.base.options.debug.level" useByScannerDiscovery="false" value="com.arm.tool.assembler.v6.base.options.debug.level.std" valueType="enumerated"/> - + <option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="true" id="com.arm.tool.assembler.v6.base.option.incpath.2020985046" name="Include path (-I)" superClass="com.arm.tool.assembler.v6.base.option.incpath" valueType="includePath"/> - + <inputType id="com.arm.tool.assembler.v6.base.input.343891542" superClass="com.arm.tool.assembler.v6.base.input"/> - + </tool> - + <tool id="com.arm.tool.c.linker.v6.base.var.arm_compiler_6-6.831136805" name="Arm Linker 6" superClass="com.arm.tool.c.linker.v6.base.var.arm_compiler_6-6"> - + <option id="com.arm.tool.c.linker.option.entry.1475419086" name="Image entry point (--entry)" superClass="com.arm.tool.c.linker.option.entry" useByScannerDiscovery="false" value="Vectors" valueType="string"/> - + <option id="com.arm.tool.c.linker.option.scatter.1811442260" name="Scatter file (--scatter)" superClass="com.arm.tool.c.linker.option.scatter" useByScannerDiscovery="false" value="../sample_threadx.scat" valueType="string"/> - + <option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="true" id="com.arm.tool.c.linker.libs.2083701191" name="User library files" superClass="com.arm.tool.c.linker.libs" useByScannerDiscovery="false" valueType="libs"/> - + <option id="com.arm.tool.c.linker.option.imagemap.1405130028" name="Generate image map (--map)" superClass="com.arm.tool.c.linker.option.imagemap" useByScannerDiscovery="false" value="true" valueType="boolean"/> - + <option id="com.arm.tool.c.linker.option.sizes.1951623263" name="List code and data sizes of output image (--info=sizes)" superClass="com.arm.tool.c.linker.option.sizes" useByScannerDiscovery="false" value="false" valueType="boolean"/> - + <option id="com.arm.tool.c.linker.option.redirectoutput.1115886571" name="Redirect diagnostics output to file (--list)" superClass="com.arm.tool.c.linker.option.redirectoutput" useByScannerDiscovery="false" value="map.map" valueType="string"/> - + <option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.arm.tool.c.linker.implicit.libs.790772204" name="Implicit other library files" superClass="com.arm.tool.c.linker.implicit.libs" valueType="libs"> - + <listOptionValue builtIn="false" value=""${workspace_loc:/tx/Debug/tx.a}""/> - + </option> - + </tool> - + <tool id="com.arm.tool.librarian.v6.base.var.arm_compiler_6-6.552129599" name="Arm Librarian 6" superClass="com.arm.tool.librarian.v6.base.var.arm_compiler_6-6"/> - + </toolChain> - + </folderInfo> - + </configuration> - + </storageModule> - + <storageModule moduleId="org.eclipse.cdt.core.externalSettings"/> - + </cconfiguration> - + </storageModule> - + <storageModule moduleId="cdtBuildSystem" version="4.0.0"> - + <project id="sample_threadx.com.arm.eclipse.build.project.v6.exe.1139105725" name="Executable"/> - + </storageModule> - + <storageModule moduleId="scannerConfiguration"> - + <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/> - + </storageModule> - + <storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/> - + <storageModule moduleId="com.arm.projectSettings" version="6.0.0"/> - + <storageModule moduleId="refreshScope" versionNumber="2"> - + <configuration configurationName="Debug"> - + <resource resourceType="PROJECT" workspacePath="/sample_threadx"/> - + </configuration> - + <configuration configurationName="Release"> - + <resource resourceType="PROJECT" workspacePath="/sample_threadx"/> - + </configuration> - + </storageModule> - + <storageModule moduleId="org.eclipse.cdt.make.core.buildtargets"/> - + </cproject> diff --git a/ports_module/cortex_r4/ac6/example_build/sample_threadx/sample_threadx.c b/ports_module/cortex_r4/ac6/example_build/sample_threadx/sample_threadx.c index 4a677059..f8e0cecc 100644 --- a/ports_module/cortex_r4/ac6/example_build/sample_threadx/sample_threadx.c +++ b/ports_module/cortex_r4/ac6/example_build/sample_threadx/sample_threadx.c @@ -1,5 +1,5 @@ /* This is a small demo of the high-performance ThreadX kernel. It includes examples of eight - threads of different priorities, using a message queue, semaphore, mutex, event flags group, + threads of different priorities, using a message queue, semaphore, mutex, event flags group, byte pool, and block pool. */ #include "tx_api.h" @@ -58,7 +58,7 @@ void thread_6_and_7_entry(ULONG thread_input); int main() { - + /* Setup the timer. */ timer_init(); @@ -85,42 +85,42 @@ CHAR *pointer = TX_NULL; tx_byte_allocate(&byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT); /* Create the main thread. */ - tx_thread_create(&thread_0, "thread 0", thread_0_entry, 0, - pointer, DEMO_STACK_SIZE, + tx_thread_create(&thread_0, "thread 0", thread_0_entry, 0, + pointer, DEMO_STACK_SIZE, 1, 1, TX_NO_TIME_SLICE, TX_AUTO_START); /* Allocate the stack for thread 1. */ tx_byte_allocate(&byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT); - /* Create threads 1 and 2. These threads pass information through a ThreadX + /* Create threads 1 and 2. These threads pass information through a ThreadX message queue. It is also interesting to note that these threads have a time slice. */ - tx_thread_create(&thread_1, "thread 1", thread_1_entry, 1, - pointer, DEMO_STACK_SIZE, + tx_thread_create(&thread_1, "thread 1", thread_1_entry, 1, + pointer, DEMO_STACK_SIZE, 16, 16, 4, TX_AUTO_START); /* Allocate the stack for thread 2. */ tx_byte_allocate(&byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT); - tx_thread_create(&thread_2, "thread 2", thread_2_entry, 2, - pointer, DEMO_STACK_SIZE, + tx_thread_create(&thread_2, "thread 2", thread_2_entry, 2, + pointer, DEMO_STACK_SIZE, 16, 16, 4, TX_AUTO_START); /* Allocate the stack for thread 3. */ tx_byte_allocate(&byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT); - /* Create threads 3 and 4. These threads compete for a ThreadX counting semaphore. + /* Create threads 3 and 4. These threads compete for a ThreadX counting semaphore. An interesting thing here is that both threads share the same instruction area. */ - tx_thread_create(&thread_3, "thread 3", thread_3_and_4_entry, 3, - pointer, DEMO_STACK_SIZE, + tx_thread_create(&thread_3, "thread 3", thread_3_and_4_entry, 3, + pointer, DEMO_STACK_SIZE, 8, 8, TX_NO_TIME_SLICE, TX_AUTO_START); /* Allocate the stack for thread 4. */ tx_byte_allocate(&byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT); - tx_thread_create(&thread_4, "thread 4", thread_3_and_4_entry, 4, - pointer, DEMO_STACK_SIZE, + tx_thread_create(&thread_4, "thread 4", thread_3_and_4_entry, 4, + pointer, DEMO_STACK_SIZE, 8, 8, TX_NO_TIME_SLICE, TX_AUTO_START); /* Allocate the stack for thread 5. */ @@ -128,23 +128,23 @@ CHAR *pointer = TX_NULL; /* Create thread 5. This thread simply pends on an event flag which will be set by thread_0. */ - tx_thread_create(&thread_5, "thread 5", thread_5_entry, 5, - pointer, DEMO_STACK_SIZE, + tx_thread_create(&thread_5, "thread 5", thread_5_entry, 5, + pointer, DEMO_STACK_SIZE, 4, 4, TX_NO_TIME_SLICE, TX_AUTO_START); /* Allocate the stack for thread 6. */ tx_byte_allocate(&byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT); /* Create threads 6 and 7. These threads compete for a ThreadX mutex. */ - tx_thread_create(&thread_6, "thread 6", thread_6_and_7_entry, 6, - pointer, DEMO_STACK_SIZE, + tx_thread_create(&thread_6, "thread 6", thread_6_and_7_entry, 6, + pointer, DEMO_STACK_SIZE, 8, 8, TX_NO_TIME_SLICE, TX_AUTO_START); /* Allocate the stack for thread 7. */ tx_byte_allocate(&byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT); - tx_thread_create(&thread_7, "thread 7", thread_6_and_7_entry, 7, - pointer, DEMO_STACK_SIZE, + tx_thread_create(&thread_7, "thread 7", thread_6_and_7_entry, 7, + pointer, DEMO_STACK_SIZE, 8, 8, TX_NO_TIME_SLICE, TX_AUTO_START); /* Allocate the message queue. */ @@ -247,11 +247,11 @@ UINT status; /* Retrieve a message from the queue. */ status = tx_queue_receive(&queue_0, &received_message, TX_WAIT_FOREVER); - /* Check completion status and make sure the message is what we + /* Check completion status and make sure the message is what we expected. */ if ((status != TX_SUCCESS) || (received_message != thread_2_messages_received)) break; - + /* Otherwise, all is okay. Increment the received message count. */ thread_2_messages_received++; } @@ -310,7 +310,7 @@ ULONG actual_flags; thread_5_counter++; /* Wait for event flag 0. */ - status = tx_event_flags_get(&event_flags_0, 0x1, TX_OR_CLEAR, + status = tx_event_flags_get(&event_flags_0, 0x1, TX_OR_CLEAR, &actual_flags, TX_WAIT_FOREVER); /* Check status. */ @@ -363,7 +363,7 @@ UINT status; if (status != TX_SUCCESS) break; - /* Release the mutex again. This will actually + /* Release the mutex again. This will actually release ownership since it was obtained twice. */ status = tx_mutex_put(&mutex_0); diff --git a/ports_module/cortex_r4/ac6/example_build/sample_threadx/tx_initialize_low_level.S b/ports_module/cortex_r4/ac6/example_build/sample_threadx/tx_initialize_low_level.S index 8732358f..44591770 100644 --- a/ports_module/cortex_r4/ac6/example_build/sample_threadx/tx_initialize_low_level.S +++ b/ports_module/cortex_r4/ac6/example_build/sample_threadx/tx_initialize_low_level.S @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -103,12 +104,6 @@ /* */ /* _tx_initialize_kernel_enter ThreadX entry function */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 09-30-2020 Scott Larson Initial Version 6.1 */ -/* */ /**************************************************************************/ /* VOID _tx_initialize_low_level(VOID) { */ diff --git a/ports_module/cortex_r4/ac6/example_build/sample_threadx_module/.cproject b/ports_module/cortex_r4/ac6/example_build/sample_threadx_module/.cproject index ee2634f6..68b87b4b 100644 --- a/ports_module/cortex_r4/ac6/example_build/sample_threadx_module/.cproject +++ b/ports_module/cortex_r4/ac6/example_build/sample_threadx_module/.cproject @@ -1,184 +1,184 @@ <?xml version="1.0" encoding="UTF-8" standalone="no"?> <?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage"> - + <storageModule moduleId="org.eclipse.cdt.core.settings"> - + <cconfiguration id="com.arm.eclipse.build.config.v6.exe.debug.base.1168728368"> - + <storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.arm.eclipse.build.config.v6.exe.debug.base.1168728368" moduleId="org.eclipse.cdt.core.settings" name="Debug"> - + <externalSettings/> - + <extensions> - + <extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/> - + <extension id="com.arm.eclipse.builder.armcc.error" point="org.eclipse.cdt.core.ErrorParser"/> - + <extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/> - + </extensions> - + </storageModule> - + <storageModule moduleId="cdtBuildSystem" version="4.0.0"> - + <configuration artifactExtension="axf" artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.debug" cleanCommand="clean" description="" id="com.arm.eclipse.build.config.v6.exe.debug.base.1168728368" name="Debug" parent="com.arm.eclipse.build.config.v6.exe.debug.base"> - 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+ </storageModule> - + <storageModule moduleId="scannerConfiguration"> - + <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/> - + </storageModule> - + <storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/> - + <storageModule moduleId="refreshScope"/> - + <storageModule moduleId="com.arm.projectSettings" version="6.0.0"/> - + <storageModule moduleId="org.eclipse.cdt.make.core.buildtargets"/> - + </cproject> diff --git a/ports_module/cortex_r4/ac6/example_build/sample_threadx_module/sample_threadx_module.c b/ports_module/cortex_r4/ac6/example_build/sample_threadx_module/sample_threadx_module.c index feb9fb84..74eeb454 100644 --- a/ports_module/cortex_r4/ac6/example_build/sample_threadx_module/sample_threadx_module.c +++ b/ports_module/cortex_r4/ac6/example_build/sample_threadx_module/sample_threadx_module.c @@ -1,5 +1,5 @@ -/* This is a small demo of the high-performance ThreadX kernel running as a module. It includes - examples of eight threads of different priorities, using a message queue, semaphore, mutex, +/* This is a small demo of the high-performance ThreadX kernel running as a module. It includes + examples of eight threads of different priorities, using a message queue, semaphore, mutex, event flags group, byte pool, and block pool. */ /* Specify that this is a module! */ @@ -20,7 +20,7 @@ #define DEMO_QUEUE_SIZE 100 -/* Define the pool space in the bss section of the module. ULONG is used to +/* Define the pool space in the bss section of the module. ULONG is used to get the word alignment. */ ULONG demo_module_pool_space[DEMO_BYTE_POOL_SIZE / 4]; @@ -102,7 +102,7 @@ void demo_module_start(ULONG id) CHAR *pointer; /* Allocate all the objects. In MMU mode, modules cannot allocate control blocks within - their own memory area so they cannot corrupt the resident portion of ThreadX by overwriting + their own memory area so they cannot corrupt the resident portion of ThreadX by overwriting the control block(s). */ txm_module_object_allocate((void *) &thread_0, sizeof(TX_THREAD)); txm_module_object_allocate((void *) &thread_1, sizeof(TX_THREAD)); @@ -118,7 +118,7 @@ CHAR *pointer; txm_module_object_allocate((void *) &event_flags_0, sizeof(TX_EVENT_FLAGS_GROUP)); txm_module_object_allocate((void *) &byte_pool_0, sizeof(TX_BYTE_POOL)); txm_module_object_allocate((void *) &block_pool_0, sizeof(TX_BLOCK_POOL)); - + /* Create a byte memory pool from which to allocate the thread stacks. */ tx_byte_pool_create(byte_pool_0, "module byte pool 0", demo_module_pool_space, DEMO_BYTE_POOL_SIZE); @@ -130,14 +130,14 @@ CHAR *pointer; /* Create the main thread. */ tx_thread_create(thread_0, "module thread 0", thread_0_entry, 0, - pointer, DEMO_STACK_SIZE, + pointer, DEMO_STACK_SIZE, 1, 1, TX_NO_TIME_SLICE, TX_AUTO_START); /* Allocate the stack for thread 1. */ tx_byte_allocate(byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT); - /* Create threads 1 and 2. These threads pass information through a ThreadX + /* Create threads 1 and 2. These threads pass information through a ThreadX message queue. It is also interesting to note that these threads have a time slice. */ tx_thread_create(thread_1, "module thread 1", thread_1_entry, 1, @@ -157,14 +157,14 @@ CHAR *pointer; /* Create threads 3 and 4. These threads compete for a ThreadX counting semaphore. An interesting thing here is that both threads share the same instruction area. */ tx_thread_create(thread_3, "module thread 3", thread_3_and_4_entry, 3, - pointer, DEMO_STACK_SIZE, + pointer, DEMO_STACK_SIZE, 8, 8, TX_NO_TIME_SLICE, TX_AUTO_START); /* Allocate the stack for thread 4. */ tx_byte_allocate(byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT); tx_thread_create(thread_4, "module thread 4", thread_3_and_4_entry, 4, - pointer, DEMO_STACK_SIZE, + pointer, DEMO_STACK_SIZE, 8, 8, TX_NO_TIME_SLICE, TX_AUTO_START); /* Allocate the stack for thread 5. */ @@ -173,7 +173,7 @@ CHAR *pointer; /* Create thread 5. This thread simply pends on an event flag which will be set by thread_0. */ tx_thread_create(thread_5, "module thread 5", thread_5_entry, 5, - pointer, DEMO_STACK_SIZE, + pointer, DEMO_STACK_SIZE, 4, 4, TX_NO_TIME_SLICE, TX_AUTO_START); /* Allocate the stack for thread 6. */ @@ -181,14 +181,14 @@ CHAR *pointer; /* Create threads 6 and 7. These threads compete for a ThreadX mutex. */ tx_thread_create(thread_6, "module thread 6", thread_6_and_7_entry, 6, - pointer, DEMO_STACK_SIZE, + pointer, DEMO_STACK_SIZE, 8, 8, TX_NO_TIME_SLICE, TX_AUTO_START); /* Allocate the stack for thread 7. */ tx_byte_allocate(byte_pool_0, (VOID **) &pointer, DEMO_STACK_SIZE, TX_NO_WAIT); tx_thread_create(thread_7, "module thread 7", thread_6_and_7_entry, 7, - pointer, DEMO_STACK_SIZE, + pointer, DEMO_STACK_SIZE, 8, 8, TX_NO_TIME_SLICE, TX_AUTO_START); /* Allocate the message queue. */ @@ -236,7 +236,7 @@ UINT status; /* Test external/shared memory. */ *(ULONG *) 0x08025000 = 0xdeadbeef; - + /* This thread simply sits in while-forever-sleep loop. */ while(1) { @@ -246,7 +246,7 @@ UINT status; /* Sleep for 10 ticks. */ tx_thread_sleep(10); - + /* Set event flag 0 to wakeup thread 5. */ status = tx_event_flags_set(event_flags_0, 0x1, TX_OR); @@ -298,11 +298,11 @@ UINT status; /* Retrieve a message from the queue. */ status = tx_queue_receive(queue_0, &received_message, TX_WAIT_FOREVER); - /* Check completion status and make sure the message is what we + /* Check completion status and make sure the message is what we expected. */ if ((status != TX_SUCCESS) || (received_message != thread_2_messages_received)) break; - + /* Otherwise, all is okay. Increment the received message count. */ thread_2_messages_received++; } @@ -361,7 +361,7 @@ ULONG actual_flags; thread_5_counter++; /* Wait for event flag 0. */ - status = tx_event_flags_get(event_flags_0, 0x1, TX_OR_CLEAR, + status = tx_event_flags_get(event_flags_0, 0x1, TX_OR_CLEAR, &actual_flags, TX_WAIT_FOREVER); /* Check status. */ @@ -414,7 +414,7 @@ UINT status; if (status != TX_SUCCESS) break; - /* Release the mutex again. This will actually + /* Release the mutex again. This will actually release ownership since it was obtained twice. */ status = tx_mutex_put(mutex_0); diff --git a/ports_module/cortex_r4/ac6/example_build/sample_threadx_module/semihosting.c b/ports_module/cortex_r4/ac6/example_build/sample_threadx_module/semihosting.c index 29268630..80e5f04f 100644 --- a/ports_module/cortex_r4/ac6/example_build/sample_threadx_module/semihosting.c +++ b/ports_module/cortex_r4/ac6/example_build/sample_threadx_module/semihosting.c @@ -9,17 +9,17 @@ void use_no_semihosting(void) __asm(".global __use_no_semihosting\n\t"); } #endif - + char *$Sub$$_sys_command_string(char *cmd, int len) { return 0; } - + __attribute__((noreturn)) void $Sub$$_sys_exit(int return_code) { while(1); } - + __attribute__((noreturn)) int $Sub$$__raise(int signal, int type) { while(1); diff --git a/ports_module/cortex_r4/ac6/example_build/sample_threadx_module_manager/.cproject b/ports_module/cortex_r4/ac6/example_build/sample_threadx_module_manager/.cproject index 71818fd9..4ceb8982 100644 --- a/ports_module/cortex_r4/ac6/example_build/sample_threadx_module_manager/.cproject +++ b/ports_module/cortex_r4/ac6/example_build/sample_threadx_module_manager/.cproject @@ -1,170 +1,170 @@ <?xml version="1.0" encoding="UTF-8" standalone="no"?> <?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage"> - 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+ </storageModule> - + <storageModule moduleId="scannerConfiguration"> - + <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/> - + </storageModule> - + <storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/> - + <storageModule moduleId="com.arm.projectSettings" version="6.0.0"/> - + <storageModule moduleId="refreshScope" versionNumber="2"> - + <configuration configurationName="Debug"> - + <resource resourceType="PROJECT" workspacePath="/sample_threadx"/> - + </configuration> - + <configuration configurationName="Release"> - + <resource resourceType="PROJECT" workspacePath="/sample_threadx"/> - + </configuration> - + </storageModule> - + <storageModule moduleId="org.eclipse.cdt.make.core.buildtargets"/> - + </cproject> diff --git a/ports_module/cortex_r4/ac6/example_build/sample_threadx_module_manager/module_code.c b/ports_module/cortex_r4/ac6/example_build/sample_threadx_module_manager/module_code.c index 6a92a2ac..78dc1538 100644 --- a/ports_module/cortex_r4/ac6/example_build/sample_threadx_module_manager/module_code.c +++ b/ports_module/cortex_r4/ac6/example_build/sample_threadx_module_manager/module_code.c @@ -1,4 +1,4 @@ -/* +/* Input ELF file: sample_threadx_module.axf Output C Array file: module_code.c */ diff --git a/ports_module/cortex_r4/ac6/example_build/sample_threadx_module_manager/sample_threadx.scat b/ports_module/cortex_r4/ac6/example_build/sample_threadx_module_manager/sample_threadx.scat index 926647b2..9eb35ca0 100644 --- a/ports_module/cortex_r4/ac6/example_build/sample_threadx_module_manager/sample_threadx.scat +++ b/ports_module/cortex_r4/ac6/example_build/sample_threadx_module_manager/sample_threadx.scat @@ -18,21 +18,21 @@ SDRAM 0x0 0x40000000 * (+RO-CODE) ; Application RO code (.text) * (+RO-DATA) ; Application RO data (.constdata) } - + IRQ_STACK +0 ALIGN 8 EMPTY 1024 {} - + FIQ_STACK +0 ALIGN 8 EMPTY 512 {} - + SVC_STACK +0 ALIGN 8 EMPTY 2048 {} - + SYS_STACK +0 ALIGN 8 EMPTY 2048 {} - + ABORT_STACK +0 ALIGN 8 EMPTY 2048 {} ; Application RW & ZI data (.data & .bss) DATA +0 0x100000 { - * (+RW,+ZI) + * (+RW,+ZI) } PERIPHERALS 0xA0000000 EMPTY 0x20000000 { }; Peripherals diff --git a/ports_module/cortex_r4/ac6/example_build/sample_threadx_module_manager/sample_threadx_module_manager.c b/ports_module/cortex_r4/ac6/example_build/sample_threadx_module_manager/sample_threadx_module_manager.c index 99e8fa3e..2e683da2 100644 --- a/ports_module/cortex_r4/ac6/example_build/sample_threadx_module_manager/sample_threadx_module_manager.c +++ b/ports_module/cortex_r4/ac6/example_build/sample_threadx_module_manager/sample_threadx_module_manager.c @@ -47,7 +47,7 @@ VOID module_fault_handler(TX_THREAD *thread, TXM_MODULE_INSTANCE *module) int main() { - + /* Setup the timer. */ timer_init(); @@ -60,8 +60,8 @@ int main() void tx_application_define(void *first_unused_memory) { - tx_thread_create(&module_manager, "Module Manager Thread", module_manager_entry, 0, - manager_stack, DEMO_STACK_SIZE, + tx_thread_create(&module_manager, "Module Manager Thread", module_manager_entry, 0, + manager_stack, DEMO_STACK_SIZE, 1, 1, TX_NO_TIME_SLICE, TX_AUTO_START); } @@ -72,7 +72,7 @@ void tx_application_define(void *first_unused_memory) void module_manager_entry(ULONG thread_input) { - + /* Initialize the module manager. */ txm_module_manager_initialize((VOID *) module_data_area, MODULE_DATA_SIZE); @@ -80,40 +80,40 @@ void module_manager_entry(ULONG thread_input) /* Register a fault handler. */ txm_module_manager_memory_fault_notify(module_fault_handler); - + /* Load the module that is already there, in this example it is placed there by the multiple image download. */ txm_module_manager_in_place_load(&my_module, "my module", (VOID *) 0x00100000 /*module_code*/); - + /* Enable 128 byte read/write shared memory region at 0x08025000. */ txm_module_manager_external_memory_enable(&my_module, (void *) 0x08025000, 128, TXM_MODULE_MANAGER_SHARED_ATTRIBUTE_WRITE); - + /* Start the module. */ txm_module_manager_start(&my_module); /* Sleep for a while.... */ tx_thread_sleep(300); - + /* Stop the module. */ txm_module_manager_stop(&my_module); - + /* Unload the module. */ txm_module_manager_unload(&my_module); /* Load the module that is already there. */ txm_module_manager_in_place_load(&my_module, "my module", (VOID *) 0x00100000); - + /* Set maximum module priority to 5. */ txm_module_manager_maximum_module_priority_set(&my_module, 5); - /* In this demo, module threads 0 and 5 will not start because their priorities + /* In this demo, module threads 0 and 5 will not start because their priorities * are higher than 5. */ - + /* Start the module again. */ txm_module_manager_start(&my_module); - + /* Now just spin... */ while(1) { - + tx_thread_sleep(100); } } diff --git a/ports_module/cortex_r4/ac6/example_build/sample_threadx_module_manager/startup.S b/ports_module/cortex_r4/ac6/example_build/sample_threadx_module_manager/startup.S index cd6479d3..bbd85a4c 100644 --- a/ports_module/cortex_r4/ac6/example_build/sample_threadx_module_manager/startup.S +++ b/ports_module/cortex_r4/ac6/example_build/sample_threadx_module_manager/startup.S @@ -3,7 +3,7 @@ // // Copyright (c) 2006-2018 Arm Limited (or its affiliates). All rights reserved. // Use, modification and redistribution of this file is subject to your possession of a -// valid End User License Agreement for the Arm Product of which these examples are part of +// valid End User License Agreement for the Arm Product of which these examples are part of // and your compliance with all applicable terms and conditions of such licence agreement. //---------------------------------------------------------------- @@ -130,7 +130,7 @@ Reset_Handler: CPS #SVC_MODE // Build SVC mode CPSR LDR sp, =Image$$SVC_STACK$$ZI$$Limit // Setup SVC stack pointer - + //---------------------------------------------------------------- // TCM Configuration @@ -196,7 +196,7 @@ Reset_Handler: // Enable Branch prediction //---------------------------------------------------------------- -// In the Cortex-R4, the Z-bit of the SCTLR does not control the program flow prediction. +// In the Cortex-R4, the Z-bit of the SCTLR does not control the program flow prediction. // Some control bits in the ACTLR control the program flow and prefetch features instead. // These are enabled by default, but are shown here for completeness. diff --git a/ports_module/cortex_r4/ac6/example_build/sample_threadx_module_manager/tx_initialize_low_level.S b/ports_module/cortex_r4/ac6/example_build/sample_threadx_module_manager/tx_initialize_low_level.S index 8732358f..44591770 100644 --- a/ports_module/cortex_r4/ac6/example_build/sample_threadx_module_manager/tx_initialize_low_level.S +++ b/ports_module/cortex_r4/ac6/example_build/sample_threadx_module_manager/tx_initialize_low_level.S @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -103,12 +104,6 @@ /* */ /* _tx_initialize_kernel_enter ThreadX entry function */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 09-30-2020 Scott Larson Initial Version 6.1 */ -/* */ /**************************************************************************/ /* VOID _tx_initialize_low_level(VOID) { */ diff --git a/ports_module/cortex_r4/ac6/example_build/tx/.cproject b/ports_module/cortex_r4/ac6/example_build/tx/.cproject index 9dfee32b..e97c3b82 100644 --- a/ports_module/cortex_r4/ac6/example_build/tx/.cproject +++ b/ports_module/cortex_r4/ac6/example_build/tx/.cproject @@ -1,164 +1,164 @@ <?xml version="1.0" encoding="UTF-8" standalone="no"?> <?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage"> - 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+ <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/> - + </storageModule> - + <storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/> - + <storageModule moduleId="refreshScope" versionNumber="2"> - + <configuration configurationName="Debug"> - + <resource resourceType="PROJECT" workspacePath="/txm"/> - + </configuration> - + <configuration configurationName="Release"> - + <resource resourceType="PROJECT" workspacePath="/txm"/> - + </configuration> - + </storageModule> - + <storageModule moduleId="org.eclipse.cdt.make.core.buildtargets"/> - + <storageModule moduleId="com.arm.projectSettings" version="6.0.0"/> - + </cproject> diff --git a/ports_module/cortex_r4/ac6/inc/tx_port.h b/ports_module/cortex_r4/ac6/inc/tx_port.h index 33b7e737..2b334d2e 100644 --- a/ports_module/cortex_r4/ac6/inc/tx_port.h +++ b/ports_module/cortex_r4/ac6/inc/tx_port.h @@ -1,17 +1,18 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ /**************************************************************************/ /**************************************************************************/ -/** */ +/** */ /** ThreadX Component */ /** */ /** Port Specific */ @@ -20,11 +21,11 @@ /**************************************************************************/ -/**************************************************************************/ -/* */ -/* PORT SPECIFIC C INFORMATION RELEASE */ -/* */ -/* tx_port.h Cortex-R4/AC6 */ +/**************************************************************************/ +/* */ +/* PORT SPECIFIC C INFORMATION RELEASE */ +/* */ +/* tx_port.h Cortex-R4/AC6 */ /* 6.1 */ /* */ /* AUTHOR */ @@ -32,24 +33,15 @@ /* William E. Lamie, Microsoft Corporation */ /* */ /* DESCRIPTION */ -/* */ -/* This file contains data type definitions that make the ThreadX */ -/* real-time kernel function identically on a variety of different */ -/* processor architectures. For example, the size or number of bits */ -/* in an "int" data type vary between microprocessor architectures and */ -/* even C compilers for the same microprocessor. ThreadX does not */ -/* directly use native C data types. Instead, ThreadX creates its */ -/* own special types that can be mapped to actual data types by this */ -/* file to guarantee consistency in the interface and functionality. */ -/* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ /* */ -/* 09-30-2020 William E. Lamie Initial Version 6.1 */ -/* 04-02-2021 Bhupendra Naphade Modified comment(s),updated */ -/* macro definition, */ -/* resulting in version 6.1.6 */ +/* This file contains data type definitions that make the ThreadX */ +/* real-time kernel function identically on a variety of different */ +/* processor architectures. For example, the size or number of bits */ +/* in an "int" data type vary between microprocessor architectures and */ +/* even C compilers for the same microprocessor. ThreadX does not */ +/* directly use native C data types. Instead, ThreadX creates its */ +/* own special types that can be mapped to actual data types by this */ +/* file to guarantee consistency in the interface and functionality. */ /* */ /**************************************************************************/ @@ -62,7 +54,7 @@ #ifdef TX_INCLUDE_USER_DEFINE_FILE -/* Yes, include the user defines in tx_user.h. The defines in this file may +/* Yes, include the user defines in tx_user.h. The defines in this file may alternately be defined on the command line. */ #include "tx_user.h" @@ -78,7 +70,7 @@ #include <string.h> -/* Define ThreadX basic types for this port. */ +/* Define ThreadX basic types for this port. */ #define VOID void typedef char CHAR; @@ -114,12 +106,12 @@ typedef unsigned short USHORT; #define TX_TIMER_THREAD_STACK_SIZE 1024 /* Default timer thread stack size */ #endif -#ifndef TX_TIMER_THREAD_PRIORITY -#define TX_TIMER_THREAD_PRIORITY 0 /* Default timer thread priority */ +#ifndef TX_TIMER_THREAD_PRIORITY +#define TX_TIMER_THREAD_PRIORITY 0 /* Default timer thread priority */ #endif -/* Define various constants for the ThreadX ARM port. */ +/* Define various constants for the ThreadX ARM port. */ #ifdef TX_ENABLE_FIQ_SUPPORT #define TX_INT_DISABLE 0xC0 /* Disable IRQ & FIQ interrupts */ @@ -129,8 +121,8 @@ typedef unsigned short USHORT; #define TX_INT_ENABLE 0x00 /* Enable IRQ interrupts */ -/* Define the clock source for trace event entry time stamp. The following two item are port specific. - For example, if the time source is at the address 0x0a800024 and is 16-bits in size, the clock +/* Define the clock source for trace event entry time stamp. The following two item are port specific. + For example, if the time source is at the address 0x0a800024 and is 16-bits in size, the clock source constants would be: #define TX_TRACE_TIME_SOURCE *((ULONG *) 0x0a800024) @@ -177,7 +169,7 @@ typedef unsigned short USHORT; #define TX_INLINE_INITIALIZATION -/* Determine whether or not stack checking is enabled. By default, ThreadX stack checking is +/* Determine whether or not stack checking is enabled. By default, ThreadX stack checking is disabled. When the following is defined, ThreadX thread stack checking is enabled. If stack checking is enabled (TX_ENABLE_STACK_CHECKING is defined), the TX_DISABLE_STACK_FILLING define is negated, thereby forcing the stack fill which is necessary for the stack checking @@ -189,11 +181,11 @@ typedef unsigned short USHORT; /* Define the TX_THREAD control block extensions for this port. The main reason - for the multiple macros is so that backward compatibility can be maintained with + for the multiple macros is so that backward compatibility can be maintained with existing ThreadX kernel awareness modules. */ -#define TX_THREAD_EXTENSION_0 -#define TX_THREAD_EXTENSION_1 +#define TX_THREAD_EXTENSION_0 +#define TX_THREAD_EXTENSION_1 #define TX_THREAD_EXTENSION_2 ULONG tx_thread_vfp_enable; \ VOID *tx_thread_module_instance_ptr; \ VOID *tx_thread_module_entry_info_ptr; \ @@ -207,7 +199,7 @@ typedef unsigned short USHORT; VOID *tx_thread_module_stack_end; \ ULONG tx_thread_module_stack_size; \ VOID *tx_thread_module_reserved; -#define TX_THREAD_EXTENSION_3 +#define TX_THREAD_EXTENSION_3 /* Define the port extensions of the remaining ThreadX objects. */ @@ -225,11 +217,11 @@ typedef unsigned short USHORT; VOID (*tx_timer_module_expiration_function)(ULONG id); -/* Define the user extension field of the thread control block. Nothing +/* Define the user extension field of the thread control block. Nothing additional is needed for this port so it is defined as white space. */ #ifndef TX_THREAD_USER_EXTENSION -#define TX_THREAD_USER_EXTENSION +#define TX_THREAD_USER_EXTENSION #endif @@ -237,8 +229,8 @@ typedef unsigned short USHORT; tx_thread_shell_entry, and tx_thread_terminate. */ -#define TX_THREAD_CREATE_EXTENSION(thread_ptr) -#define TX_THREAD_DELETE_EXTENSION(thread_ptr) +#define TX_THREAD_CREATE_EXTENSION(thread_ptr) +#define TX_THREAD_DELETE_EXTENSION(thread_ptr) #define TX_THREAD_COMPLETED_EXTENSION(thread_ptr) #define TX_THREAD_TERMINATED_EXTENSION(thread_ptr) @@ -265,21 +257,21 @@ typedef unsigned short USHORT; #define TX_TIMER_DELETE_EXTENSION(timer_ptr) -/* Determine if the ARM architecture has the CLZ instruction. This is available on - architectures v5 and above. If available, redefine the macro for calculating the +/* Determine if the ARM architecture has the CLZ instruction. This is available on + architectures v5 and above. If available, redefine the macro for calculating the lowest bit set. */ #ifndef __thumb #define TX_LOWEST_SET_BIT_CALCULATE(m, b) m = m & ((ULONG) (-((LONG) m))); \ b = (ULONG) __clz((unsigned int) m); \ - b = 31 - b; + b = 31 - b; #endif -/* Define ThreadX interrupt lockout and restore macros for protection on - access of critical kernel information. The restore interrupt macro must - restore the interrupt posture of the running thread prior to the value +/* Define ThreadX interrupt lockout and restore macros for protection on + access of critical kernel information. The restore interrupt macro must + restore the interrupt posture of the running thread prior to the value present prior to the disable macro. In most cases, the save area macro is used to define a local function save area for the disable and restore macros. */ @@ -299,7 +291,7 @@ typedef unsigned short USHORT; { \ __enable_irq(); \ __enable_fiq(); \ - } + } #else @@ -308,7 +300,7 @@ typedef unsigned short USHORT; #define TX_RESTORE if (!interrupt_save_disabled) \ { \ __enable_irq(); \ - } + } #endif #else @@ -344,8 +336,8 @@ void tx_thread_vfp_disable(void); /* Define the version ID of ThreadX. This may be utilized by the application. */ #ifdef TX_THREAD_INIT -CHAR _tx_version_id[] = - "Copyright (c) 2024 Microsoft Corporation. * ThreadX Cortex-R4/AC6 Version 6.4.2 *"; +CHAR _tx_version_id[] = + "(c) 2024 Microsoft Corp. (c) 2026-present Eclipse ThreadX contributors. * ThreadX Cortex-R4/AC6 Version 6.5.0.202601 *"; #else extern CHAR _tx_version_id[]; #endif diff --git a/ports_module/cortex_r4/ac6/inc/txm_module_port.h b/ports_module/cortex_r4/ac6/inc/txm_module_port.h index 3e6ec271..141a307b 100644 --- a/ports_module/cortex_r4/ac6/inc/txm_module_port.h +++ b/ports_module/cortex_r4/ac6/inc/txm_module_port.h @@ -1,52 +1,47 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ -/**************************************************************************/ -/**************************************************************************/ -/** */ -/** ThreadX Component */ -/** */ -/** Module */ -/** */ -/**************************************************************************/ -/**************************************************************************/ +/**************************************************************************/ +/**************************************************************************/ +/** */ +/** ThreadX Component */ +/** */ +/** Module */ +/** */ +/**************************************************************************/ +/**************************************************************************/ -/**************************************************************************/ -/* */ -/* APPLICATION INTERFACE DEFINITION RELEASE */ -/* */ -/* txm_module_port.h Cortex-R4/MPU/ARM */ +/**************************************************************************/ +/* */ +/* APPLICATION INTERFACE DEFINITION RELEASE */ +/* */ +/* txm_module_port.h Cortex-R4/MPU/ARM */ /* 6.1 */ /* AUTHOR */ /* */ /* Scott Larson, Microsoft Corporation */ /* */ -/* DESCRIPTION */ -/* */ -/* This file defines the basic module constants, interface structures, */ -/* and function prototypes. */ -/* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ +/* DESCRIPTION */ /* */ -/* 09-30-2020 Scott Larson Initial Version 6.1 */ +/* This file defines the basic module constants, interface structures, */ +/* and function prototypes. */ /* */ /**************************************************************************/ #ifndef TXM_MODULE_PORT_H #define TXM_MODULE_PORT_H -/* It is assumed that the base ThreadX tx_port.h file has been modified to add the +/* It is assumed that the base ThreadX tx_port.h file has been modified to add the following extensions to the ThreadX thread control block (this code should replace the corresponding macro define in tx_port.h): @@ -89,9 +84,9 @@ The following extensions must also be defined in tx_port.h: #define TXM_MODULE_KERNEL_STACK_SIZE 1024 #endif -/* Defined, these options allows a memory-protected module to access kernel objects. - For example, when a module needs to send/receive a message from a kernel queue. - This does not allow modules to create or delete objects outside of their memory. +/* Defined, these options allows a memory-protected module to access kernel objects. + For example, when a module needs to send/receive a message from a kernel queue. + This does not allow modules to create or delete objects outside of their memory. Default setting for these values is undefined. */ /* #define TXM_MODULE_ENABLE_KERNEL_BLOCK_POOL_ACCESS */ /* #define TXM_MODULE_ENABLE_KERNEL_BYTE_POOL_ACCESS */ @@ -166,7 +161,7 @@ The following extensions must also be defined in tx_port.h: #define INLINE_DECLARE inline /* Define the number of MPU entries assigned to the code and data sections. - On Cortex-R parts, there are 12 total entries. ThreadX uses one for access + On Cortex-R parts, there are 12 total entries. ThreadX uses one for access to the kernel entry function, thus 11 remain for code and data protection. */ #define TXM_MODULE_MPU_TOTAL_ENTRIES 12 #define TXM_MODULE_MPU_CODE_ENTRIES 4 @@ -234,7 +229,7 @@ typedef struct TXM_MODULE_MANAGER_MEMORY_FAULT_INFO_STRUCT TXM_MODULE_MANAGER_MEMORY_FAULT_INFO _txm_module_manager_memory_fault_info; /* Define the macro to check the stack available in dispatch. */ -#define TXM_MODULE_MANAGER_CHECK_STACK_AVAILABLE +#define TXM_MODULE_MANAGER_CHECK_STACK_AVAILABLE /* Define the macro to check the module properties. */ @@ -248,7 +243,7 @@ typedef struct TXM_MODULE_MANAGER_MEMORY_FAULT_INFO_STRUCT { \ _tx_mutex_put(&_txm_module_manager_mutex); \ return(TXM_MODULE_INVALID_PROPERTIES); \ - } + } /* Define the macro to check the code alignment. */ @@ -359,7 +354,7 @@ UINT _txm_module_manager_inside_data_check(TXM_MODULE_INSTANCE *module_instance #define TXM_MODULE_MANAGER_VERSION_ID \ CHAR _txm_module_manager_version_id[] = \ - "Copyright (c) 2024 Microsoft Corporation. * ThreadX Module Cortex-R4/MPU/ARM Version 6.4.2 *"; + "Copyright (c) 2024 Microsoft Corporation. * ThreadX Module Cortex-R4/MPU/ARM Version 6.5.0.202601 *"; #endif diff --git a/ports_module/cortex_r4/ac6/module_lib/src/txm_module_initialize.S b/ports_module/cortex_r4/ac6/module_lib/src/txm_module_initialize.S index 051f6f66..f4a16554 100644 --- a/ports_module/cortex_r4/ac6/module_lib/src/txm_module_initialize.S +++ b/ports_module/cortex_r4/ac6/module_lib/src/txm_module_initialize.S @@ -1,23 +1,23 @@ ;/*************************************************************************** -; * Copyright (c) 2024 Microsoft Corporation -; * +; * Copyright (c) 2024 Microsoft Corporation +; * ; * This program and the accompanying materials are made available under the ; * terms of the MIT License which is available at ; * https://opensource.org/licenses/MIT. -; * +; * ; * SPDX-License-Identifier: MIT ; **************************************************************************/ ; ; -;/**************************************************************************/ -;/**************************************************************************/ -;/** */ -;/** ThreadX Component */ -;/** */ -;/** Module */ -;/** */ -;/**************************************************************************/ -;/**************************************************************************/ +;/**************************************************************************/ +;/**************************************************************************/ +;/** */ +;/** ThreadX Component */ +;/** */ +;/** Module */ +;/** */ +;/**************************************************************************/ +;/**************************************************************************/ ; ; ;#define TX_SOURCE_CODE @@ -43,43 +43,37 @@ .eabi_attribute Tag_ABI_PCS_R9_use, 1 .eabi_attribute Tag_ABI_PCS_RW_data, 2 .arm -/**************************************************************************/ -/* */ -/* FUNCTION RELEASE */ -/* */ -/* _txm_module_initialize Cortex-R4/MPU/ARM */ +/**************************************************************************/ +/* */ +/* FUNCTION RELEASE */ +/* */ +/* _txm_module_initialize Cortex-R4/MPU/ARM */ /* 6.1 */ /* AUTHOR */ /* */ /* Scott Larson, Microsoft Corporation */ /* */ -/* DESCRIPTION */ -/* */ -/* This function initializes the module c runtime. */ -/* */ -/* INPUT */ -/* */ +/* DESCRIPTION */ +/* */ +/* This function initializes the module c runtime. */ +/* */ +/* INPUT */ +/* */ /* heap_base Pointer to bottom of heap */ /* heap_top Pointer to top of heap */ -/* */ -/* OUTPUT */ -/* */ -/* None */ -/* */ -/* CALLS */ -/* */ +/* */ +/* OUTPUT */ +/* */ +/* None */ +/* */ +/* CALLS */ +/* */ /* __scatterload Initialize C runtime */ /* __rt_lib_init Initialize heap */ -/* */ -/* CALLED BY */ -/* */ -/* _txm_module_thread_shell_entry Start module thread */ -/* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ /* */ -/* 09-30-2020 Scott Larson Initial Version 6.1 */ +/* CALLED BY */ +/* */ +/* _txm_module_thread_shell_entry Start module thread */ /* */ /**************************************************************************/ /* VOID _txm_module_initialize(VOID *heap_base, VOID *heap_top) */ @@ -88,7 +82,7 @@ _txm_module_initialize: PUSH {r0-r12,lr} // Save dregs and LR - + B __scatterload // Call ARM func to initialize variables diff --git a/ports_module/cortex_r4/ac6/module_lib/src/txm_module_thread_shell_entry.c b/ports_module/cortex_r4/ac6/module_lib/src/txm_module_thread_shell_entry.c index b2673994..ec0d81c6 100644 --- a/ports_module/cortex_r4/ac6/module_lib/src/txm_module_thread_shell_entry.c +++ b/ports_module/cortex_r4/ac6/module_lib/src/txm_module_thread_shell_entry.c @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -88,12 +89,6 @@ extern VOID _txm_module_initialize(VOID *heap_base, VOID *heap_top); /* */ /* Initial thread stack frame */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 09-30-2020 Scott Larson Initial Version 6.1 */ -/* */ /**************************************************************************/ VOID _txm_module_thread_shell_entry(TX_THREAD *thread_ptr, TXM_MODULE_THREAD_ENTRY_INFO *thread_info) { diff --git a/ports_module/cortex_r4/ac6/module_manager/src/tx_thread_context_restore.S b/ports_module/cortex_r4/ac6/module_manager/src/tx_thread_context_restore.S index f87614c4..eaf3be37 100644 --- a/ports_module/cortex_r4/ac6/module_manager/src/tx_thread_context_restore.S +++ b/ports_module/cortex_r4/ac6/module_manager/src/tx_thread_context_restore.S @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -55,12 +56,12 @@ #endif .text .eabi_attribute Tag_ABI_align_preserved, 1 - + /**************************************************************************/ /* */ /* FUNCTION RELEASE */ /* */ -/* _tx_thread_context_restore Cortex-R4/MPU/ARM */ +/* _tx_thread_context_restore Cortex-R4/MPU/ARM */ /* 6.1 */ /* AUTHOR */ /* */ @@ -89,12 +90,6 @@ /* */ /* ISRs Interrupt Service Routines */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 09-30-2020 Scott Larson Initial Version 6.1 */ -/* */ /**************************************************************************/ /* VOID _tx_thread_context_restore(VOID) { */ @@ -186,10 +181,10 @@ __tx_thread_preempt_restore: STR r1, [sp, #-4]! // Save point of interrupt STMDB sp!, {r4-r12, lr} // Save registers MOV r4, r3 // Save SPSR in r4 - + CPS #IRQ_MODE // Switch back to IRQ mode LDMIA sp!, {r0-r3} // Recover r0-r3 - + CPS #SYS_MODE // Switch to SYS mode to save remaining context on thread stack STMDB sp!, {r0-r3} // Save r0-r3 on thread's stack diff --git a/ports_module/cortex_r4/ac6/module_manager/src/tx_thread_context_save.S b/ports_module/cortex_r4/ac6/module_manager/src/tx_thread_context_save.S index 696dc985..68951b08 100644 --- a/ports_module/cortex_r4/ac6/module_manager/src/tx_thread_context_save.S +++ b/ports_module/cortex_r4/ac6/module_manager/src/tx_thread_context_save.S @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -76,12 +77,6 @@ /* */ /* ISRs */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 09-30-2020 William E. Lamie Initial Version 6.1 */ -/* */ /**************************************************************************/ /* VOID _tx_thread_context_save(VOID) { */ diff --git a/ports_module/cortex_r4/ac6/module_manager/src/tx_thread_fiq_context_restore.S b/ports_module/cortex_r4/ac6/module_manager/src/tx_thread_fiq_context_restore.S index 94c20b72..7fbcc84a 100644 --- a/ports_module/cortex_r4/ac6/module_manager/src/tx_thread_fiq_context_restore.S +++ b/ports_module/cortex_r4/ac6/module_manager/src/tx_thread_fiq_context_restore.S @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -88,12 +89,6 @@ /* */ /* FIQ ISR Interrupt Service Routines */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 09-30-2020 William E. Lamie Initial Version 6.1 */ -/* */ /**************************************************************************/ /* VOID _tx_thread_fiq_context_restore(VOID) */ /* { */ @@ -186,15 +181,15 @@ __tx_thread_fiq_preempt_restore: LDMIA sp!, {r3, lr} // Recover temporarily saved registers MOV r1, lr // Save lr (point of interrupt) - + CPS #SVC_MODE // Switch to SVC mode to save context on thread stack STR r1, [sp, #-4]! // Save point of interrupt STMDB sp!, {r4-r12, lr} // Save upper half of registers MOV r4, r3 // Save SPSR in r4 - + CPS #FIQ_MODE // Switch back to FIQ mode LDMIA sp!, {r0-r3} // Recover r0-r3 - + CPS #SVC_MODE // Switch to SVC mode to save remaining context on thread stack STMDB sp!, {r0-r3} // Save r0-r3 on thread's stack diff --git a/ports_module/cortex_r4/ac6/module_manager/src/tx_thread_fiq_context_save.S b/ports_module/cortex_r4/ac6/module_manager/src/tx_thread_fiq_context_save.S index 1d85abe5..3c1333b3 100644 --- a/ports_module/cortex_r4/ac6/module_manager/src/tx_thread_fiq_context_save.S +++ b/ports_module/cortex_r4/ac6/module_manager/src/tx_thread_fiq_context_save.S @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -76,12 +77,6 @@ /* */ /* ISRs */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 09-30-2020 William E. Lamie Initial Version 6.1 */ -/* */ /**************************************************************************/ /* VOID _tx_thread_fiq_context_save(VOID) */ /* { */ @@ -90,7 +85,7 @@ .type _tx_thread_fiq_context_save, "function" _tx_thread_fiq_context_save: - /* Upon entry to this routine, it is assumed that IRQ interrupts are locked + /* Upon entry to this routine, it is assumed that IRQ interrupts are locked out, we are in IRQ mode, and all registers are intact. */ /* Check for a nested interrupt condition. */ diff --git a/ports_module/cortex_r4/ac6/module_manager/src/tx_thread_fiq_nesting_end.S b/ports_module/cortex_r4/ac6/module_manager/src/tx_thread_fiq_nesting_end.S index df8a4633..5abbdddf 100644 --- a/ports_module/cortex_r4/ac6/module_manager/src/tx_thread_fiq_nesting_end.S +++ b/ports_module/cortex_r4/ac6/module_manager/src/tx_thread_fiq_nesting_end.S @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -77,12 +78,6 @@ /* */ /* ISRs */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 09-30-2020 William E. Lamie Initial Version 6.1 */ -/* */ /**************************************************************************/ /* VOID _tx_thread_fiq_nesting_end(VOID) */ /* { */ @@ -90,13 +85,13 @@ .type _tx_thread_fiq_nesting_end, "function" _tx_thread_fiq_nesting_end: MOV r3, lr // Save ISR return address - + #ifdef TX_ENABLE_FIQ_SUPPORT CPSID if // Disable IRQ and FIQ interrupts #else CPSID i // Disable IRQ interrupts #endif - + LDMIA sp!, {r1, lr} // Pickup saved lr (and r1 throw-away for // 8-byte alignment logic) CPS #FIQ_MODE // Switch back to FIQ mode diff --git a/ports_module/cortex_r4/ac6/module_manager/src/tx_thread_fiq_nesting_start.S b/ports_module/cortex_r4/ac6/module_manager/src/tx_thread_fiq_nesting_start.S index f26d9a0c..73564d78 100644 --- a/ports_module/cortex_r4/ac6/module_manager/src/tx_thread_fiq_nesting_start.S +++ b/ports_module/cortex_r4/ac6/module_manager/src/tx_thread_fiq_nesting_start.S @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -74,12 +75,6 @@ /* */ /* ISRs */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 09-30-2020 William E. Lamie Initial Version 6.1 */ -/* */ /**************************************************************************/ /* VOID _tx_thread_fiq_nesting_start(VOID) */ /* { */ diff --git a/ports_module/cortex_r4/ac6/module_manager/src/tx_thread_interrupt_control.S b/ports_module/cortex_r4/ac6/module_manager/src/tx_thread_interrupt_control.S index 11ab4e4f..83aa06c4 100644 --- a/ports_module/cortex_r4/ac6/module_manager/src/tx_thread_interrupt_control.S +++ b/ports_module/cortex_r4/ac6/module_manager/src/tx_thread_interrupt_control.S @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -73,12 +74,6 @@ /* */ /* Application Code */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 09-30-2020 William E. Lamie Initial Version 6.1 */ -/* */ /**************************************************************************/ /* UINT _tx_thread_interrupt_control(UINT new_posture) */ /* { */ diff --git a/ports_module/cortex_r4/ac6/module_manager/src/tx_thread_interrupt_disable.S b/ports_module/cortex_r4/ac6/module_manager/src/tx_thread_interrupt_disable.S index cd7476a6..d605e034 100644 --- a/ports_module/cortex_r4/ac6/module_manager/src/tx_thread_interrupt_disable.S +++ b/ports_module/cortex_r4/ac6/module_manager/src/tx_thread_interrupt_disable.S @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -65,12 +66,6 @@ /* */ /* Application Code */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 09-30-2020 William E. Lamie Initial Version 6.1 */ -/* */ /**************************************************************************/ /* UINT _tx_thread_interrupt_disable(void) */ /* { */ diff --git a/ports_module/cortex_r4/ac6/module_manager/src/tx_thread_interrupt_restore.S b/ports_module/cortex_r4/ac6/module_manager/src/tx_thread_interrupt_restore.S index 8e966de6..f9315d7f 100644 --- a/ports_module/cortex_r4/ac6/module_manager/src/tx_thread_interrupt_restore.S +++ b/ports_module/cortex_r4/ac6/module_manager/src/tx_thread_interrupt_restore.S @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -66,12 +67,6 @@ /* */ /* Application Code */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 09-30-2020 William E. Lamie Initial Version 6.1 */ -/* */ /**************************************************************************/ /* UINT _tx_thread_interrupt_restore(UINT old_posture) */ /* { */ diff --git a/ports_module/cortex_r4/ac6/module_manager/src/tx_thread_irq_nesting_end.S b/ports_module/cortex_r4/ac6/module_manager/src/tx_thread_irq_nesting_end.S index cf8e0ac1..664e02c5 100644 --- a/ports_module/cortex_r4/ac6/module_manager/src/tx_thread_irq_nesting_end.S +++ b/ports_module/cortex_r4/ac6/module_manager/src/tx_thread_irq_nesting_end.S @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -77,12 +78,6 @@ /* */ /* ISRs */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 09-30-2020 William E. Lamie Initial Version 6.1 */ -/* */ /**************************************************************************/ /* VOID _tx_thread_irq_nesting_end(VOID) */ /* { */ @@ -96,7 +91,7 @@ _tx_thread_irq_nesting_end: #else CPSID i // Disable IRQ interrupts #endif - + LDMIA sp!, {r1, lr} // Pickup saved lr (and r1 throw-away for // 8-byte alignment logic) CPS #IRQ_MODE // Switch back to IRQ mode diff --git a/ports_module/cortex_r4/ac6/module_manager/src/tx_thread_irq_nesting_start.S b/ports_module/cortex_r4/ac6/module_manager/src/tx_thread_irq_nesting_start.S index b3ebe405..1d50b484 100644 --- a/ports_module/cortex_r4/ac6/module_manager/src/tx_thread_irq_nesting_start.S +++ b/ports_module/cortex_r4/ac6/module_manager/src/tx_thread_irq_nesting_start.S @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -74,12 +75,6 @@ /* */ /* ISRs */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 09-30-2020 William E. Lamie Initial Version 6.1 */ -/* */ /**************************************************************************/ /* VOID _tx_thread_irq_nesting_start(VOID) */ /* { */ diff --git a/ports_module/cortex_r4/ac6/module_manager/src/tx_thread_schedule.S b/ports_module/cortex_r4/ac6/module_manager/src/tx_thread_schedule.S index 58b94d01..38792e97 100644 --- a/ports_module/cortex_r4/ac6/module_manager/src/tx_thread_schedule.S +++ b/ports_module/cortex_r4/ac6/module_manager/src/tx_thread_schedule.S @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -82,12 +83,6 @@ /* _tx_thread_system_return Return to system from thread */ /* _tx_thread_context_restore Restore thread's context */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 09-30-2020 Scott Larson Initial Version 6.1 */ -/* */ /**************************************************************************/ /* VOID _tx_thread_schedule(VOID) */ /* { */ diff --git a/ports_module/cortex_r4/ac6/module_manager/src/tx_thread_stack_build.S b/ports_module/cortex_r4/ac6/module_manager/src/tx_thread_stack_build.S index eb8e9a90..8f122083 100644 --- a/ports_module/cortex_r4/ac6/module_manager/src/tx_thread_stack_build.S +++ b/ports_module/cortex_r4/ac6/module_manager/src/tx_thread_stack_build.S @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -78,12 +79,6 @@ /* */ /* _tx_thread_create Create thread service */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 09-30-2020 Scott Larson Initial Version 6.1 */ -/* */ /**************************************************************************/ /* VOID _tx_thread_stack_build(TX_THREAD *thread_ptr, VOID (*function_ptr)(VOID)) */ /* { */ diff --git a/ports_module/cortex_r4/ac6/module_manager/src/tx_thread_system_return.S b/ports_module/cortex_r4/ac6/module_manager/src/tx_thread_system_return.S index 2c5f11d6..048b4525 100644 --- a/ports_module/cortex_r4/ac6/module_manager/src/tx_thread_system_return.S +++ b/ports_module/cortex_r4/ac6/module_manager/src/tx_thread_system_return.S @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -77,12 +78,6 @@ /* */ /* ThreadX components */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 09-30-2020 William E. Lamie Initial Version 6.1 */ -/* */ /**************************************************************************/ /* VOID _tx_thread_system_return(VOID) */ /* { */ diff --git a/ports_module/cortex_r4/ac6/module_manager/src/tx_thread_vectored_context_save.S b/ports_module/cortex_r4/ac6/module_manager/src/tx_thread_vectored_context_save.S index de49cc0d..dbb40aba 100644 --- a/ports_module/cortex_r4/ac6/module_manager/src/tx_thread_vectored_context_save.S +++ b/ports_module/cortex_r4/ac6/module_manager/src/tx_thread_vectored_context_save.S @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -75,12 +76,6 @@ /* */ /* ISRs */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 09-30-2020 William E. Lamie Initial Version 6.1 */ -/* */ /**************************************************************************/ /* VOID _tx_thread_vectored_context_save(VOID) */ /* { */ diff --git a/ports_module/cortex_r4/ac6/module_manager/src/tx_timer_interrupt.S b/ports_module/cortex_r4/ac6/module_manager/src/tx_timer_interrupt.S index d48313ef..8c3abf90 100644 --- a/ports_module/cortex_r4/ac6/module_manager/src/tx_timer_interrupt.S +++ b/ports_module/cortex_r4/ac6/module_manager/src/tx_timer_interrupt.S @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -84,12 +85,6 @@ /* */ /* interrupt vector */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 09-30-2020 William E. Lamie Initial Version 6.1 */ -/* */ /**************************************************************************/ /* VOID _tx_timer_interrupt(VOID) */ /* { */ diff --git a/ports_module/cortex_r4/ac6/module_manager/src/txm_module_manager_alignment_adjust.c b/ports_module/cortex_r4/ac6/module_manager/src/txm_module_manager_alignment_adjust.c index 4572adab..94a6cfdd 100644 --- a/ports_module/cortex_r4/ac6/module_manager/src/txm_module_manager_alignment_adjust.c +++ b/ports_module/cortex_r4/ac6/module_manager/src/txm_module_manager_alignment_adjust.c @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -56,12 +57,6 @@ /* */ /* _txm_module_manager_alignment_adjust Adjust alignment for Cortex-R */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 09-30-2020 Scott Larson Initial Version 6.1 */ -/* */ /**************************************************************************/ ULONG _txm_power_of_two_block_size(ULONG size) { diff --git a/ports_module/cortex_r4/ac6/module_manager/src/txm_module_manager_external_memory_enable.c b/ports_module/cortex_r4/ac6/module_manager/src/txm_module_manager_external_memory_enable.c index a57590fa..2bd00d08 100644 --- a/ports_module/cortex_r4/ac6/module_manager/src/txm_module_manager_external_memory_enable.c +++ b/ports_module/cortex_r4/ac6/module_manager/src/txm_module_manager_external_memory_enable.c @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -64,12 +65,6 @@ /* */ /* Application code */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 09-30-2020 Scott Larson Initial Version 6.1 */ -/* */ /**************************************************************************/ UINT _txm_module_manager_external_memory_enable(TXM_MODULE_INSTANCE *module_instance, VOID *start_address, diff --git a/ports_module/cortex_r4/ac6/module_manager/src/txm_module_manager_memory_fault_handler.c b/ports_module/cortex_r4/ac6/module_manager/src/txm_module_manager_memory_fault_handler.c index 9962938d..1844c760 100644 --- a/ports_module/cortex_r4/ac6/module_manager/src/txm_module_manager_memory_fault_handler.c +++ b/ports_module/cortex_r4/ac6/module_manager/src/txm_module_manager_memory_fault_handler.c @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -71,12 +72,6 @@ TXM_MODULE_MANAGER_FAULT_INFO /* */ /* Fault handler */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 09-30-2020 Scott Larson Initial Version 6.1 */ -/* */ /**************************************************************************/ VOID _txm_module_manager_memory_fault_handler(VOID) { diff --git a/ports_module/cortex_r4/ac6/module_manager/src/txm_module_manager_memory_fault_notify.c b/ports_module/cortex_r4/ac6/module_manager/src/txm_module_manager_memory_fault_notify.c index d9ff9c7a..28439101 100644 --- a/ports_module/cortex_r4/ac6/module_manager/src/txm_module_manager_memory_fault_notify.c +++ b/ports_module/cortex_r4/ac6/module_manager/src/txm_module_manager_memory_fault_notify.c @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -66,12 +67,6 @@ extern VOID (*_txm_module_manager_fault_notify)(TX_THREAD *, TXM_MODULE_INSTA /* */ /* Application Code */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 09-30-2020 Scott Larson Initial Version 6.1 */ -/* */ /**************************************************************************/ UINT _txm_module_manager_memory_fault_notify(VOID (*notify_function)(TX_THREAD *, TXM_MODULE_INSTANCE *)) { diff --git a/ports_module/cortex_r4/ac6/module_manager/src/txm_module_manager_mm_register_setup.c b/ports_module/cortex_r4/ac6/module_manager/src/txm_module_manager_mm_register_setup.c index 8c9b8752..ea4ce4ff 100644 --- a/ports_module/cortex_r4/ac6/module_manager/src/txm_module_manager_mm_register_setup.c +++ b/ports_module/cortex_r4/ac6/module_manager/src/txm_module_manager_mm_register_setup.c @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -55,12 +56,6 @@ /* */ /* _txm_module_manager_mm_register_setup */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 09-30-2020 Scott Larson Initial Version 6.1 */ -/* */ /**************************************************************************/ ULONG _txm_module_manager_region_size_get(ULONG block_size) { @@ -519,7 +514,7 @@ ALIGN_TYPE shared_memory_address_end; { return(TX_FALSE); } - + /* Check if the object is inside the module data. */ if ((obj_ptr >= (ALIGN_TYPE) module_instance -> txm_module_instance_data_start) && ((obj_ptr + obj_size) <= ((ALIGN_TYPE) module_instance -> txm_module_instance_data_end + 1))) diff --git a/ports_module/cortex_r4/ac6/module_manager/src/txm_module_manager_thread_stack_build.S b/ports_module/cortex_r4/ac6/module_manager/src/txm_module_manager_thread_stack_build.S index 4f9daad8..26bf9d51 100644 --- a/ports_module/cortex_r4/ac6/module_manager/src/txm_module_manager_thread_stack_build.S +++ b/ports_module/cortex_r4/ac6/module_manager/src/txm_module_manager_thread_stack_build.S @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -59,12 +60,6 @@ /* */ /* _tx_thread_create Create thread service */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 09-30-2020 Scott Larson Initial Version 6.1 */ -/* */ /**************************************************************************/ /* VOID _txm_module_manager_thread_stack_build(TX_THREAD *thread_ptr, VOID (*function_ptr)(TX_THREAD *, TXM_MODULE_INSTANCE *)) { */ diff --git a/ports_module/cortex_r4/ac6/module_manager/src/txm_module_manager_user_mode_entry.S b/ports_module/cortex_r4/ac6/module_manager/src/txm_module_manager_user_mode_entry.S index 7f23c553..f36ee23f 100644 --- a/ports_module/cortex_r4/ac6/module_manager/src/txm_module_manager_user_mode_entry.S +++ b/ports_module/cortex_r4/ac6/module_manager/src/txm_module_manager_user_mode_entry.S @@ -1,10 +1,11 @@ /*************************************************************************** - * Copyright (c) 2024 Microsoft Corporation - * + * Copyright (c) 2024 Microsoft Corporation + * Copyright (c) 2026-present Eclipse ThreadX contributors + * * This program and the accompanying materials are made available under the * terms of the MIT License which is available at * https://opensource.org/licenses/MIT. - * + * * SPDX-License-Identifier: MIT **************************************************************************/ @@ -22,7 +23,7 @@ .global _txm_module_manager_kernel_dispatch .global _txm_system_mode_enter .global _txm_system_mode_exit - + /**************************************************************************/ /* */ /* FUNCTION RELEASE */ @@ -54,12 +55,6 @@ /* */ /* Modules in user mode */ /* */ -/* RELEASE HISTORY */ -/* */ -/* DATE NAME DESCRIPTION */ -/* */ -/* 09-30-2020 Scott Larson Initial Version 6.1 */ -/* */ /**************************************************************************/ .text .align 12 |