1 files changed, 77 insertions, 0 deletions
diff --git a/test/tx/cmake/module_qemu/src/manager.ld b/test/tx/cmake/module_qemu/src/manager.ld
new file mode 100644
index 00000000..9f6580e9
--- /dev/null
+++ b/test/tx/cmake/module_qemu/src/manager.ld
@@ -0,0 +1,77 @@
+/***************************************************************************
+ * Copyright (c) 2026 Eclipse ThreadX contributors
+ *
+ * This program and the accompanying materials are made available under the
+ * terms of the MIT License which is available at
+ * https://opensource.org/licenses/MIT.
+ *
+ * AI Disclosure: This file was largely AI-generated by Claude Code (Opus 5.5).
+ * The AI-generated portions may be considered public domain (CC0-1.0)
+ * and not subject to the project's licence. The human contributor has
+ * reviewed and verified that the code is correct.
+ *
+ * SPDX-License-Identifier: MIT and CC0-1.0
+ **************************************************************************/
+
+/* Module manager image for QEMU's MPS2 AN385 and AN386.  Code, read-only data
+   and the embedded module images go in the 4 MB SSRAM1 at address 0, which the
+   board boots from; data, the main stack and the memory ThreadX hands out go
+   in the first megabyte of SSRAM2 at 0x20000000.  The megabyte above that holds
+   the area the manager shares with its modules (module_shared.h), and nothing
+   the linker places reaches it.  */
+
+MEMORY
+{
+    CODE (rx)  : ORIGIN = 0x00000000, LENGTH = 0x00400000
+    RAM  (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00100000
+}
+
+ENTRY(reset_handler)
+
+SECTIONS
+{
+    .vectors :
+    {
+        KEEP(*(.vectors))
+    } > CODE
+
+    .text :
+    {
+        *(.text .text.*)
+        *(.rodata .rodata.*)
+        . = ALIGN(4);
+    } > CODE
+
+    .ARM.exidx :
+    {
+        *(.ARM.exidx*)
+    } > CODE
+
+    __data_load_start__ = LOADADDR(.data);
+
+    .data : ALIGN(4)
+    {
+        __data_start__ = .;
+        *(.data .data.*)
+        . = ALIGN(4);
+        __data_end__ = .;
+    } > RAM AT > CODE
+
+    .bss (NOLOAD) : ALIGN(4)
+    {
+        __bss_start__ = .;
+        *(.bss .bss.*)
+        *(COMMON)
+        . = ALIGN(4);
+        __bss_end__ = .;
+    } > RAM
+
+    .stack (NOLOAD) : ALIGN(8)
+    {
+        __stack_start__ = .;
+        . = . + 2048;
+        __stack_end__ = .;
+    } > RAM
+
+    __RAM_segment_used_end__ = .;
+}