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authorWilliam D. Jones <[email protected]>2019-01-11 13:47:44 -0500
committerWilliam D. Jones <[email protected]>2019-01-11 13:47:44 -0500
commit0f9fa5956f178fd1762a699409ac7be702fe70ab (patch)
treec44adcc77f319ccf0827167e93b75d4a3adbb004
parente73e016a8c4fd58cc0f6ba0dbd4c71472e87d403 (diff)
bsp.board_stm32f407g_disc1: Switch to external oscillator (more precise).
-rw-r--r--hw/bsp/stm32f407g_disc1/board.mk1
-rw-r--r--hw/bsp/stm32f407g_disc1/board_stm32f407g_disc1.c46
-rw-r--r--src/portable/stm/stm32f4/dcd_stm32f4.c8
3 files changed, 37 insertions, 18 deletions
diff --git a/hw/bsp/stm32f407g_disc1/board.mk b/hw/bsp/stm32f407g_disc1/board.mk
index 50990de87..24efea1ac 100644
--- a/hw/bsp/stm32f407g_disc1/board.mk
+++ b/hw/bsp/stm32f407g_disc1/board.mk
@@ -1,4 +1,5 @@
CFLAGS = \
+ -DHSE_VALUE=8000000 \
-DCFG_TUSB_MCU=OPT_MCU_STM32F4 \
-DSTM32F407xx \
-mthumb \
diff --git a/hw/bsp/stm32f407g_disc1/board_stm32f407g_disc1.c b/hw/bsp/stm32f407g_disc1/board_stm32f407g_disc1.c
index 3c1ebc11f..f08cecac8 100644
--- a/hw/bsp/stm32f407g_disc1/board_stm32f407g_disc1.c
+++ b/hw/bsp/stm32f407g_disc1/board_stm32f407g_disc1.c
@@ -49,38 +49,52 @@
void board_init(void)
{
-
- // Systick init
-#if CFG_TUSB_OS == OPT_OS_NONE
- // Tick init, samd SystemCoreClock may not correct
- SysTick_Config(SystemCoreClock / 1000);
-#endif
-
// Init the LED on PD14
RCC->AHB1ENR |= RCC_AHB1ENR_GPIODEN;
GPIOD->MODER |= GPIO_MODER_MODE14_0;
// USB Clock init
- // PLL input- 16 MHz (HSI clock)
- // VCO input- 1 to 2 MHz (2 MHz, M = 8)
+ // PLL input- 8 MHz (External oscillator clock; HSI clock tolerance isn't
+ // tight enough- 1%, need 0.25%)
+ // VCO input- 1 to 2 MHz (2 MHz, M = 4)
// VCO output- 100 to 432 MHz (144 MHz, N = 72)
- // Main PLL out- <= 180 MHz (18 MHz, P = 8, not used; HSI used as system clk.)
+ // Main PLL out- <= 180 MHz (18 MHz, P = 3- divides by 8)
// USB PLL out- 48 MHz (Q = 3)
- RCC->PLLCFGR = (3 << RCC_PLLCFGR_PLLQ_Pos) | (8 << RCC_PLLCFGR_PLLP_Pos) \
- | (72 << RCC_PLLCFGR_PLLN_Pos) | (8 << RCC_PLLCFGR_PLLM_Pos);
+ RCC->PLLCFGR = RCC_PLLCFGR_PLLSRC_HSE | (3 << RCC_PLLCFGR_PLLQ_Pos) | \
+ (3 << RCC_PLLCFGR_PLLP_Pos) | (72 << RCC_PLLCFGR_PLLN_Pos) | \
+ (4 << RCC_PLLCFGR_PLLM_Pos);
+
+ // Wait for external clock to become ready
+ RCC->CR |= RCC_CR_HSEON;
+ while(!(RCC->CR & RCC_CR_HSERDY_Msk));
+
+ // Wait for PLL to become ready
RCC->CR |= RCC_CR_PLLON;
+ while(!(RCC->CR & RCC_CR_PLLRDY_Msk));
+
+ // Switch clocks!
+ RCC->CFGR |= RCC_CFGR_SW_1;
+
+ // Notify runtime of frequency change.
+ SystemCoreClockUpdate();
+ // Systick init
+ #if CFG_TUSB_OS == OPT_OS_NONE
+ SysTick_Config(SystemCoreClock / 1000);
+ #endif
+
RCC->AHB2ENR |= RCC_AHB2ENR_OTGFSEN;
// USB Pin Init
// PA10- ID, PA11- DM, PA12- DP
// PC0- Power on
- GPIOD->MODER |= GPIO_MODER_MODE10_1 | GPIO_MODER_MODE11_1 | GPIO_MODER_MODE12_1;
- GPIOA->AFR[1] |= (10 << GPIO_AFRH_AFSEL10_Pos) | (10 << GPIO_AFRH_AFSEL11_Pos) | (10 << GPIO_AFRH_AFSEL12_Pos);
+ RCC->AHB1ENR |= RCC_AHB1ENR_GPIOAEN;
+ GPIOD->MODER |= GPIO_MODER_MODE10_1 | GPIO_MODER_MODE11_1 | \
+ GPIO_MODER_MODE12_1;
+ GPIOA->AFR[1] |= (10 << GPIO_AFRH_AFSEL10_Pos) | \
+ (10 << GPIO_AFRH_AFSEL11_Pos) | (10 << GPIO_AFRH_AFSEL12_Pos);
}
-
-
void board_led_control(bool state)
{
if (!state) {
diff --git a/src/portable/stm/stm32f4/dcd_stm32f4.c b/src/portable/stm/stm32f4/dcd_stm32f4.c
index 3ec3c9e06..8aa95ac1d 100644
--- a/src/portable/stm/stm32f4/dcd_stm32f4.c
+++ b/src/portable/stm/stm32f4/dcd_stm32f4.c
@@ -71,17 +71,21 @@ bool dcd_init (uint8_t rhport)
void dcd_int_enable (uint8_t rhport)
{
-
+ (void) rhport;
+ NVIC_EnableIRQ(OTG_FS_IRQn);
}
+
void dcd_int_disable (uint8_t rhport)
{
-
+ (void) rhport;
+ NVIC_DisableIRQ(OTG_FS_IRQn);
}
void dcd_connect (uint8_t rhport)
{
}
+
void dcd_disconnect (uint8_t rhport)
{