add cmake for kinetis k32l2 family

18 files changed, 527 insertions, 415 deletions

diff --git a/hw/bsp/kinetis_k32l2/FreeRTOSConfig/FreeRTOSConfig.h b/hw/bsp/kinetis_k32l2/FreeRTOSConfig/FreeRTOSConfig.h
new file mode 100644
index 000000000..133728596
--- /dev/null
+++ b/hw/bsp/kinetis_k32l2/FreeRTOSConfig/FreeRTOSConfig.h
@@ -0,0 +1,169 @@
+/*
+ * FreeRTOS Kernel V10.0.0
+ * Copyright (C) 2017 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software. If you wish to use our Amazon
+ * FreeRTOS name, please do so in a fair use way that does not cause confusion.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://www.FreeRTOS.org
+ * http://aws.amazon.com/freertos
+ *
+ * 1 tab == 4 spaces!
+ */
+
+
+#ifndef FREERTOS_CONFIG_H
+#define FREERTOS_CONFIG_H
+
+/*-----------------------------------------------------------
+ * Application specific definitions.
+ *
+ * These definitions should be adjusted for your particular hardware and
+ * application requirements.
+ *
+ * THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
+ * FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.
+ *
+ * See http://www.freertos.org/a00110.html.
+ *----------------------------------------------------------*/
+
+// skip if included from IAR assembler
+#ifndef __IASMARM__
+  #include "fsl_device_registers.h"
+#endif
+
+/* Cortex M23/M33 port configuration. */
+#define configENABLE_MPU                        0
+#if defined(__ARM_FP) && __ARM_FP >= 4
+  #define configENABLE_FPU                      1
+#else
+  #define configENABLE_FPU                      0
+#endif
+#define configENABLE_TRUSTZONE                  0
+#define configMINIMAL_SECURE_STACK_SIZE         (1024)
+
+#define configUSE_PREEMPTION                    1
+#define configUSE_PORT_OPTIMISED_TASK_SELECTION 0
+#define configCPU_CLOCK_HZ                      SystemCoreClock
+#define configTICK_RATE_HZ                      ( 1000 )
+#define configMAX_PRIORITIES                    ( 5 )
+#define configMINIMAL_STACK_SIZE                ( 128 )
+#define configTOTAL_HEAP_SIZE                   ( configSUPPORT_DYNAMIC_ALLOCATION*4*1024 )
+#define configMAX_TASK_NAME_LEN                 16
+#define configUSE_16_BIT_TICKS                  0
+#define configIDLE_SHOULD_YIELD                 1
+#define configUSE_MUTEXES                       1
+#define configUSE_RECURSIVE_MUTEXES             1
+#define configUSE_COUNTING_SEMAPHORES           1
+#define configQUEUE_REGISTRY_SIZE               2
+#define configUSE_QUEUE_SETS                    0
+#define configUSE_TIME_SLICING                  0
+#define configUSE_NEWLIB_REENTRANT              0
+#define configENABLE_BACKWARD_COMPATIBILITY     1
+#define configSTACK_ALLOCATION_FROM_SEPARATE_HEAP   0
+
+#define configSUPPORT_STATIC_ALLOCATION         1
+#define configSUPPORT_DYNAMIC_ALLOCATION        0
+
+/* Hook function related definitions. */
+#define configUSE_IDLE_HOOK                    0
+#define configUSE_TICK_HOOK                    0
+#define configUSE_MALLOC_FAILED_HOOK           0 // cause nested extern warning
+#define configCHECK_FOR_STACK_OVERFLOW         2
+
+/* Run time and task stats gathering related definitions. */
+#define configGENERATE_RUN_TIME_STATS          0
+#define configRECORD_STACK_HIGH_ADDRESS        1
+#define configUSE_TRACE_FACILITY               1 // legacy trace
+#define configUSE_STATS_FORMATTING_FUNCTIONS   0
+
+/* Co-routine definitions. */
+#define configUSE_CO_ROUTINES                  0
+#define configMAX_CO_ROUTINE_PRIORITIES        2
+
+/* Software timer related definitions. */
+#define configUSE_TIMERS                       1
+#define configTIMER_TASK_PRIORITY              (configMAX_PRIORITIES-2)
+#define configTIMER_QUEUE_LENGTH               32
+#define configTIMER_TASK_STACK_DEPTH           configMINIMAL_STACK_SIZE
+
+/* Optional functions - most linkers will remove unused functions anyway. */
+#define INCLUDE_vTaskPrioritySet               0
+#define INCLUDE_uxTaskPriorityGet              0
+#define INCLUDE_vTaskDelete                    0
+#define INCLUDE_vTaskSuspend                   1 // required for queue, semaphore, mutex to be blocked indefinitely with portMAX_DELAY
+#define INCLUDE_xResumeFromISR                 0
+#define INCLUDE_vTaskDelayUntil                1
+#define INCLUDE_vTaskDelay                     1
+#define INCLUDE_xTaskGetSchedulerState         0
+#define INCLUDE_xTaskGetCurrentTaskHandle      1
+#define INCLUDE_uxTaskGetStackHighWaterMark    0
+#define INCLUDE_xTaskGetIdleTaskHandle         0
+#define INCLUDE_xTimerGetTimerDaemonTaskHandle 0
+#define INCLUDE_pcTaskGetTaskName              0
+#define INCLUDE_eTaskGetState                  0
+#define INCLUDE_xEventGroupSetBitFromISR       0
+#define INCLUDE_xTimerPendFunctionCall         0
+
+/* Define to trap errors during development. */
+// Halt CPU (breakpoint) when hitting error, only apply for Cortex M3, M4, M7
+#if defined(__ARM_ARCH_7M__) || defined (__ARM_ARCH_7EM__)
+  #define configASSERT(_exp) \
+    do {\
+      if ( !(_exp) ) { \
+        volatile uint32_t* ARM_CM_DHCSR =  ((volatile uint32_t*) 0xE000EDF0UL); /* Cortex M CoreDebug->DHCSR */ \
+        if ( (*ARM_CM_DHCSR) & 1UL ) {  /* Only halt mcu if debugger is attached */ \
+          taskDISABLE_INTERRUPTS(); \
+           __asm("BKPT #0\n"); \
+        }\
+      }\
+    } while(0)
+#else
+  #define configASSERT( x )
+#endif
+
+/* FreeRTOS hooks to NVIC vectors */
+#define xPortPendSVHandler    PendSV_Handler
+#define xPortSysTickHandler   SysTick_Handler
+#define vPortSVCHandler       SVC_Handler
+
+//--------------------------------------------------------------------+
+// Interrupt nesting behavior configuration.
+//--------------------------------------------------------------------+
+
+// For Cortex-M specific: __NVIC_PRIO_BITS is defined in mcu header
+#define configPRIO_BITS       4
+
+/* The lowest interrupt priority that can be used in a call to a "set priority" function. */
+#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY			  ((1<<configPRIO_BITS) - 1)
+
+/* The highest interrupt priority that can be used by any interrupt service
+routine that makes calls to interrupt safe FreeRTOS API functions.  DO NOT CALL
+INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A HIGHER
+PRIORITY THAN THIS! (higher priorities are lower numeric values. */
+#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY	2
+
+/* Interrupt priorities used by the kernel port layer itself.  These are generic
+to all Cortex-M ports, and do not rely on any particular library functions. */
+#define configKERNEL_INTERRUPT_PRIORITY 		          ( configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+
+/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!!
+See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */
+#define configMAX_SYSCALL_INTERRUPT_PRIORITY 	        ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+
+#endif /* __FREERTOS_CONFIG__H */
diff --git a/hw/bsp/kinetis_k32l2/boards/frdm_k32l2a4s/board.cmake b/hw/bsp/kinetis_k32l2/boards/frdm_k32l2a4s/board.cmake
new file mode 100644
index 000000000..538aec2ca
--- /dev/null
+++ b/hw/bsp/kinetis_k32l2/boards/frdm_k32l2a4s/board.cmake
@@ -0,0 +1,15 @@
+set(MCU_VARIANT K32L2A41A)
+
+set(JLINK_DEVICE K32L2A41xxxxA)
+set(PYOCD_TARGET K32L2A)
+
+set(LD_FILE_GNU ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/K32L2A41xxxxA_flash.ld)
+
+function(update_board TARGET)
+  target_sources(${TARGET} PUBLIC
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/clock_config.c
+    )
+  target_compile_definitions(${TARGET} PUBLIC
+    CPU_K32L2A41VLH1A
+    )
+endfunction()
diff --git a/hw/bsp/kinetis_k32l2/boards/frdm_k32l2a4s/board.h b/hw/bsp/kinetis_k32l2/boards/frdm_k32l2a4s/board.h
index b1f38c997..16f832722 100644
--- a/hw/bsp/kinetis_k32l2/boards/frdm_k32l2a4s/board.h
+++ b/hw/bsp/kinetis_k32l2/boards/frdm_k32l2a4s/board.h
@@ -30,6 +30,8 @@
 
 #include "fsl_device_registers.h"
 
+#define USB_CLOCK_SOURCE kCLOCK_IpSrcFircAsync
+
 // LED
 // The Red   LED is on PTE29.
 // The Green LED is on PTC4.
@@ -54,5 +56,37 @@
 #define UART_PIN_PORT         PORTB
 #define UART_PIN_RX           16u
 #define UART_PIN_TX           17u
+#define UART_CLOCK_SOURCE_HZ  CLOCK_GetFreq(kCLOCK_ScgFircClk)
+
+static inline void BOARD_InitBootPins(void) {
+  /*
+    Enable LPUART0 clock and configure port pins.
+    FIR clock is being used so the USB examples work.
+  */
+  PCC_LPUART0 = 0U;                          /* Clock must be off to set PCS */
+  PCC_LPUART0 = PCC_CLKCFG_PCS(
+      3U);        /* Select the clock. 1:OSCCLK/Bus Clock, 2:Slow IRC, 3: Fast IRC, 6: System PLL */
+  PCC_LPUART0 |= PCC_CLKCFG_CGC(1U);        /* Enable LPUART */
+
+  /* PORTB16 (pin 62) is configured as LPUART0_RX */
+  gpio_pin_config_t const lpuart_config_rx = {kGPIO_DigitalInput, 0};
+  GPIO_PinInit(UART_PIN_GPIO, UART_PIN_RX, &lpuart_config_rx);
+  const port_pin_config_t UART_CFG = {
+      kPORT_PullUp,
+      kPORT_FastSlewRate,
+      kPORT_PassiveFilterDisable,
+      kPORT_OpenDrainDisable,
+      kPORT_LowDriveStrength,
+      kPORT_MuxAsGpio,
+      kPORT_UnlockRegister
+  };
+  PORT_SetPinConfig(UART_PIN_PORT, UART_PIN_RX, &UART_CFG);
+  PORT_SetPinMux(UART_PIN_PORT, UART_PIN_RX, kPORT_MuxAlt3);
+
+  /* PORTB17 (pin 63) is configured as LPUART0_TX */
+  gpio_pin_config_t const lpuart_config_tx = {kGPIO_DigitalOutput, 0};
+  GPIO_PinInit(UART_PIN_GPIO, UART_PIN_TX, &lpuart_config_tx);
+  PORT_SetPinMux(UART_PIN_PORT, UART_PIN_TX, kPORT_MuxAlt3);
+}
 
 #endif /* BOARD_H_ */
diff --git a/hw/bsp/kinetis_k32l2/boards/frdm_k32l2a4s/clock_config.c b/hw/bsp/kinetis_k32l2/boards/frdm_k32l2a4s/clock_config.c
index 2814efc86..7947faefe 100644
--- a/hw/bsp/kinetis_k32l2/boards/frdm_k32l2a4s/clock_config.c
+++ b/hw/bsp/kinetis_k32l2/boards/frdm_k32l2a4s/clock_config.c
@@ -53,7 +53,7 @@ processor_version: 9.0.0
  * Variables
  ******************************************************************************/
 /* System clock frequency. */
-extern uint32_t SystemCoreClock;
+//extern uint32_t SystemCoreClock;
 
 /*******************************************************************************
  * Code
diff --git a/hw/bsp/kinetis_k32l2/boards/frdm_k32l2b/board.cmake b/hw/bsp/kinetis_k32l2/boards/frdm_k32l2b/board.cmake
new file mode 100644
index 000000000..2ec2acace
--- /dev/null
+++ b/hw/bsp/kinetis_k32l2/boards/frdm_k32l2b/board.cmake
@@ -0,0 +1,15 @@
+set(MCU_VARIANT K32L2B31A)
+
+set(JLINK_DEVICE K32L2B31xxxxA)
+set(PYOCD_TARGET K32L2B)
+
+set(LD_FILE_GNU ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/K32L2B31xxxxA_flash.ld)
+
+function(update_board TARGET)
+  target_sources(${TARGET} PUBLIC
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/clock_config.c
+    )
+  target_compile_definitions(${TARGET} PUBLIC
+    CPU_K32L2B31VLH0A
+    )
+endfunction()
diff --git a/hw/bsp/kinetis_k32l2/boards/frdm_k32l2b/board.h b/hw/bsp/kinetis_k32l2/boards/frdm_k32l2b/board.h
index 8d21fdcd4..790d6fcb0 100644
--- a/hw/bsp/kinetis_k32l2/boards/frdm_k32l2b/board.h
+++ b/hw/bsp/kinetis_k32l2/boards/frdm_k32l2b/board.h
@@ -30,6 +30,8 @@
 
 #include "fsl_device_registers.h"
 
+#define USB_CLOCK_SOURCE kCLOCK_UsbSrcIrc48M
+
 // LED
 #define LED_PIN_CLOCK         kCLOCK_PortD
 #define LED_GPIO              GPIOD
@@ -52,5 +54,25 @@
 #define UART_PIN_TX           2u
 #define SOPT5_LPUART0RXSRC_LPUART_RX 0x00u /*!<@brief LPUART0 Receive Data Source Select: LPUART_RX pin */
 #define SOPT5_LPUART0TXSRC_LPUART_TX 0x00u /*!<@brief LPUART0 Transmit Data Source Select: LPUART0_TX pin */
+#define UART_CLOCK_SOURCE_HZ  CLOCK_GetFreq(kCLOCK_McgIrc48MClk)
+
+static inline void BOARD_InitBootPins(void) {
+  /* PORTA1 (pin 23) is configured as LPUART0_RX */
+  PORT_SetPinMux(PORTA, 1U, kPORT_MuxAlt2);
+  /* PORTA2 (pin 24) is configured as LPUART0_TX */
+  PORT_SetPinMux(PORTA, 2U, kPORT_MuxAlt2);
+
+  SIM->SOPT5 = ((SIM->SOPT5 &
+                 /* Mask bits to zero which are setting */
+                 (~(SIM_SOPT5_LPUART0TXSRC_MASK | SIM_SOPT5_LPUART0RXSRC_MASK)))
+                /* LPUART0 Transmit Data Source Select: LPUART0_TX pin. */
+                | SIM_SOPT5_LPUART0TXSRC(SOPT5_LPUART0TXSRC_LPUART_TX)
+                /* LPUART0 Receive Data Source Select: LPUART_RX pin. */
+                | SIM_SOPT5_LPUART0RXSRC(SOPT5_LPUART0RXSRC_LPUART_RX));
+
+  BOARD_BootClockRUN();
+  SystemCoreClockUpdate();
+  CLOCK_SetLpuart0Clock(1);
+}
 
 #endif /* BOARD_H_ */
diff --git a/hw/bsp/kinetis_k32l2/boards/frdm_k32l2b/clock_config.c b/hw/bsp/kinetis_k32l2/boards/frdm_k32l2b/clock_config.c
index e74000827..86eb42ef8 100644
--- a/hw/bsp/kinetis_k32l2/boards/frdm_k32l2b/clock_config.c
+++ b/hw/bsp/kinetis_k32l2/boards/frdm_k32l2b/clock_config.c
@@ -48,7 +48,7 @@ board: FRDM-K32L2B
  * Variables
  ******************************************************************************/
 /* System clock frequency. */
-extern uint32_t SystemCoreClock;
+//extern uint32_t SystemCoreClock;
 
 /*******************************************************************************
  ************************ BOARD_InitBootClocks function ************************
diff --git a/hw/bsp/kinetis_k32l2/boards/frdm_k32l2b/frdm_k32l2b.c b/hw/bsp/kinetis_k32l2/boards/frdm_k32l2b/frdm_k32l2b.c
deleted file mode 100644
index 3f99b0cbd..000000000
--- a/hw/bsp/kinetis_k32l2/boards/frdm_k32l2b/frdm_k32l2b.c
+++ /dev/null
@@ -1,140 +0,0 @@
-/*
- * The MIT License (MIT)
- *
- * Copyright (c) 2018, hathach (tinyusb.org)
- * Copyright (c) 2020, Koji Kitayama
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- *
- * This file is part of the TinyUSB stack.
- */
-
-#include "bsp/board_api.h"
-#include "board.h"
-#include "fsl_gpio.h"
-#include "fsl_port.h"
-#include "fsl_clock.h"
-#include "fsl_lpuart.h"
-
-#include "clock_config.h"
-
-//--------------------------------------------------------------------+
-// Forward USB interrupt events to TinyUSB IRQ Handler
-//--------------------------------------------------------------------+
-void USB0_IRQHandler(void)
-{
-  tud_int_handler(0);
-}
-
-void board_init(void)
-{
-  /* Enable port clocks for UART/LED/Button pins */
-  CLOCK_EnableClock(UART_PIN_CLOCK);
-  CLOCK_EnableClock(LED_PIN_CLOCK);
-  CLOCK_EnableClock(BUTTON_PIN_CLOCK);
-
-  gpio_pin_config_t led_config = { kGPIO_DigitalOutput, 0 };
-  GPIO_PinInit(LED_GPIO, LED_PIN, &led_config);
-  PORT_SetPinMux(LED_PORT, LED_PIN, kPORT_MuxAsGpio);
-
-  gpio_pin_config_t button_config = { kGPIO_DigitalInput, 0 };
-  GPIO_PinInit(BUTTON_GPIO, BUTTON_PIN, &button_config);
-  const port_pin_config_t BUTTON_CFG = {
-    kPORT_PullUp,
-    kPORT_FastSlewRate,
-    kPORT_PassiveFilterDisable,
-    kPORT_LowDriveStrength,
-    kPORT_MuxAsGpio
-  };
-  PORT_SetPinConfig(BUTTON_PORT, BUTTON_PIN, &BUTTON_CFG);
-
-  /* PORTA1 (pin 23) is configured as LPUART0_RX */
-  PORT_SetPinMux(PORTA, 1U, kPORT_MuxAlt2);
-  /* PORTA2 (pin 24) is configured as LPUART0_TX */
-  PORT_SetPinMux(PORTA, 2U, kPORT_MuxAlt2);
-
-  SIM->SOPT5 = ((SIM->SOPT5 &
-               /* Mask bits to zero which are setting */
-               (~(SIM_SOPT5_LPUART0TXSRC_MASK | SIM_SOPT5_LPUART0RXSRC_MASK)))
-               /* LPUART0 Transmit Data Source Select: LPUART0_TX pin. */
-               | SIM_SOPT5_LPUART0TXSRC(SOPT5_LPUART0TXSRC_LPUART_TX)
-               /* LPUART0 Receive Data Source Select: LPUART_RX pin. */
-               | SIM_SOPT5_LPUART0RXSRC(SOPT5_LPUART0RXSRC_LPUART_RX));
-
-  BOARD_BootClockRUN();
-  SystemCoreClockUpdate();
-  CLOCK_SetLpuart0Clock(1);
-
-#if CFG_TUSB_OS == OPT_OS_NONE
-  // 1ms tick timer
-  SysTick_Config(SystemCoreClock / 1000);
-#elif CFG_TUSB_OS == OPT_OS_FREERTOS
-  // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
-  NVIC_SetPriority(USB0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY );
-#endif
-
-  lpuart_config_t uart_config;
-  LPUART_GetDefaultConfig(&uart_config);
-  uart_config.baudRate_Bps = CFG_BOARD_UART_BAUDRATE;
-  uart_config.enableTx = true;
-  uart_config.enableRx = true;
-  LPUART_Init(UART_PORT, &uart_config, CLOCK_GetFreq(kCLOCK_McgIrc48MClk));
-
-  // USB
-  CLOCK_EnableUsbfs0Clock(kCLOCK_UsbSrcIrc48M, 48000000U);
-}
-
-//--------------------------------------------------------------------+
-// Board porting API
-//--------------------------------------------------------------------+
-
-void board_led_write(bool state)
-{
-  GPIO_PinWrite(LED_GPIO, LED_PIN, state ? LED_STATE_ON : (1-LED_STATE_ON));
-}
-
-uint32_t board_button_read(void)
-{
-  return BUTTON_STATE_ACTIVE == GPIO_PinRead(BUTTON_GPIO, BUTTON_PIN);
-}
-
-int board_uart_read(uint8_t* buf, int len)
-{
-  LPUART_ReadBlocking(UART_PORT, buf, len);
-  return len;
-}
-
-int board_uart_write(void const * buf, int len)
-{
-  LPUART_WriteBlocking(UART_PORT, (uint8_t const*) buf, len);
-  return len;
-}
-
-#if CFG_TUSB_OS == OPT_OS_NONE
-volatile uint32_t system_ticks = 0;
-void SysTick_Handler(void)
-{
-  system_ticks++;
-}
-
-uint32_t board_millis(void)
-{
-  return system_ticks;
-}
-#endif
diff --git a/hw/bsp/kinetis_k32l2/boards/kuiic/board.cmake b/hw/bsp/kinetis_k32l2/boards/kuiic/board.cmake
new file mode 100644
index 000000000..cf14000ac
--- /dev/null
+++ b/hw/bsp/kinetis_k32l2/boards/kuiic/board.cmake
@@ -0,0 +1,15 @@
+set(MCU_VARIANT K32L2B31A)
+
+set(JLINK_DEVICE K32L2B31xxxxA)
+set(PYOCD_TARGET K32L2B)
+
+set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/kuiic.ld)
+
+function(update_board TARGET)
+  target_sources(${TARGET} PUBLIC
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/clock_config.c
+    )
+  target_compile_definitions(${TARGET} PUBLIC
+    CPU_K32L2B31VLH0A
+    )
+endfunction()
diff --git a/hw/bsp/kinetis_k32l2/boards/kuiic/board.h b/hw/bsp/kinetis_k32l2/boards/kuiic/board.h
index 1e2d4f18b..ec3702376 100644
--- a/hw/bsp/kinetis_k32l2/boards/kuiic/board.h
+++ b/hw/bsp/kinetis_k32l2/boards/kuiic/board.h
@@ -30,6 +30,8 @@
 
 #include "fsl_device_registers.h"
 
+#define USB_CLOCK_SOURCE kCLOCK_UsbSrcIrc48M
+
 // LED
 #define LED_PIN_CLOCK         kCLOCK_PortA
 #define LED_GPIO              GPIOA
@@ -42,4 +44,22 @@
 #define UART_PIN_RX           3u
 #define UART_PIN_TX           0u
 
+#define UART_CLOCK_SOURCE_HZ  CLOCK_GetFreq(kCLOCK_McgIrc48MClk)
+
+static inline void BOARD_InitBootPins(void) {
+  /* PORTC3 is configured as LPUART0_RX */
+  PORT_SetPinMux(PORTC, 3U, kPORT_MuxAlt3);
+  /* PORTA2 (pin 24) is configured as LPUART0_TX */
+  PORT_SetPinMux(PORTE, 0U, kPORT_MuxAlt3);
+
+  SIM->SOPT5 = ((SIM->SOPT5 &
+                 /* Mask bits to zero which are setting */
+                 (~(SIM_SOPT5_LPUART1TXSRC_MASK | SIM_SOPT5_LPUART1RXSRC_MASK)))
+                /* LPUART0 Transmit Data Source Select: LPUART0_TX pin. */
+                | SIM_SOPT5_LPUART1TXSRC(SOPT5_LPUART1TXSRC_LPUART_TX)
+                /* LPUART0 Receive Data Source Select: LPUART_RX pin. */
+                | SIM_SOPT5_LPUART1RXSRC(SOPT5_LPUART1RXSRC_LPUART_RX));
+  CLOCK_SetLpuart1Clock(1);
+}
+
 #endif /* BOARD_H_ */
diff --git a/hw/bsp/kinetis_k32l2/boards/kuiic/board.mk b/hw/bsp/kinetis_k32l2/boards/kuiic/board.mk
index fc5bdeec8..2bc5b1e34 100644
--- a/hw/bsp/kinetis_k32l2/boards/kuiic/board.mk
+++ b/hw/bsp/kinetis_k32l2/boards/kuiic/board.mk
@@ -6,7 +6,7 @@ CFLAGS += -DCPU_K32L2B31VLH0A
 CFLAGS += -Wno-error=unused-parameter -Wno-error=redundant-decls
 
 # All source paths should be relative to the top level.
-LD_FILE = $(BOARD_PATH)/K32L2B31xxxxA_flash.ld
+LD_FILE = $(BOARD_PATH)/kuiic.ld
 
 # For flash-jlink target
 JLINK_DEVICE = K32L2B31xxxxA
diff --git a/hw/bsp/kinetis_k32l2/boards/kuiic/clock_config.c b/hw/bsp/kinetis_k32l2/boards/kuiic/clock_config.c
new file mode 100644
index 000000000..c1a6d1a8d
--- /dev/null
+++ b/hw/bsp/kinetis_k32l2/boards/kuiic/clock_config.c
@@ -0,0 +1,39 @@
+#include "clock_config.h"
+#include "fsl_clock.h"
+
+/*******************************************************************************
+ * Variables
+ ******************************************************************************/
+/* System clock frequency. */
+// extern uint32_t SystemCoreClock;
+
+/*******************************************************************************
+ * Variables for BOARD_BootClockRUN configuration
+ ******************************************************************************/
+const mcglite_config_t mcgliteConfig_BOARD_BootClockRUN = {
+    .outSrc          = kMCGLITE_ClkSrcHirc,  /* MCGOUTCLK source is HIRC */
+    .irclkEnableMode = kMCGLITE_IrclkEnable, /* MCGIRCLK enabled, MCGIRCLK disabled in STOP mode */
+    .ircs            = kMCGLITE_Lirc8M,      /* Slow internal reference (LIRC) 8 MHz clock selected */
+    .fcrdiv          = kMCGLITE_LircDivBy1,  /* Low-frequency Internal Reference Clock Divider: divided by 1 */
+    .lircDiv2        = kMCGLITE_LircDivBy1,  /* Second Low-frequency Internal Reference Clock Divider: divided by 1 */
+    .hircEnableInNotHircMode = true,         /* HIRC source is enabled */
+};
+const sim_clock_config_t simConfig_BOARD_BootClockRUN = {
+    .er32kSrc = SIM_OSC32KSEL_LPO_CLK,       /* OSC32KSEL select: LPO clock */
+    .clkdiv1  = 0x10000U,                    /* SIM_CLKDIV1 - OUTDIV1: /1, OUTDIV4: /2 */
+};
+
+/*******************************************************************************
+ * Code for BOARD_BootClockRUN configuration
+ ******************************************************************************/
+void BOARD_BootClockRUN(void)
+{
+  /* Set the system clock dividers in SIM to safe value. */
+  CLOCK_SetSimSafeDivs();
+  /* Set MCG to HIRC mode. */
+  CLOCK_SetMcgliteConfig(&mcgliteConfig_BOARD_BootClockRUN);
+  /* Set the clock configuration in SIM module. */
+  CLOCK_SetSimConfig(&simConfig_BOARD_BootClockRUN);
+  /* Set SystemCoreClock variable. */
+  SystemCoreClock = BOARD_BOOTCLOCKRUN_CORE_CLOCK;
+}
diff --git a/hw/bsp/kinetis_k32l2/boards/kuiic/clock_config.h b/hw/bsp/kinetis_k32l2/boards/kuiic/clock_config.h
new file mode 100644
index 000000000..920cad98f
--- /dev/null
+++ b/hw/bsp/kinetis_k32l2/boards/kuiic/clock_config.h
@@ -0,0 +1,14 @@
+#ifndef CLOCK_CONFIG_H
+#define CLOCK_CONFIG_H
+
+/*******************************************************************************
+ * Definitions
+ ******************************************************************************/
+#define SIM_OSC32KSEL_LPO_CLK         3U        /*!< OSC32KSEL select: LPO clock */
+#define SOPT5_LPUART1RXSRC_LPUART_RX  0x00u     /*!<@brief LPUART1 Receive Data Source Select: LPUART_RX pin */
+#define SOPT5_LPUART1TXSRC_LPUART_TX  0x00u     /*!<@brief LPUART1 Transmit Data Source Select: LPUART_TX pin */
+#define BOARD_BOOTCLOCKRUN_CORE_CLOCK 48000000U /*!< Core clock frequency: 48000000Hz */
+
+void BOARD_BootClockRUN(void);
+
+#endif
diff --git a/hw/bsp/kinetis_k32l2/boards/kuiic/kuiic.c b/hw/bsp/kinetis_k32l2/boards/kuiic/kuiic.c
deleted file mode 100644
index b83d5c820..000000000
--- a/hw/bsp/kinetis_k32l2/boards/kuiic/kuiic.c
+++ /dev/null
@@ -1,203 +0,0 @@
-/*
- * The MIT License (MIT)
- *
- * Copyright (c) 2018, hathach (tinyusb.org)
- * Copyright (c) 2020, Koji Kitayama
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- *
- * This file is part of the TinyUSB stack.
- */
-
-#include "bsp/board_api.h"
-#include "board.h"
-#include "fsl_smc.h"
-#include "fsl_gpio.h"
-#include "fsl_port.h"
-#include "fsl_clock.h"
-#include "fsl_lpuart.h"
-
-/*******************************************************************************
- * Definitions
- ******************************************************************************/
-#define SIM_OSC32KSEL_LPO_CLK         3U        /*!< OSC32KSEL select: LPO clock */
-#define SOPT5_LPUART1RXSRC_LPUART_RX  0x00u     /*!<@brief LPUART1 Receive Data Source Select: LPUART_RX pin */
-#define SOPT5_LPUART1TXSRC_LPUART_TX  0x00u     /*!<@brief LPUART1 Transmit Data Source Select: LPUART_TX pin */
-#define BOARD_BOOTCLOCKRUN_CORE_CLOCK 48000000U /*!< Core clock frequency: 48000000Hz */
-
-/*******************************************************************************
- * Variables
- ******************************************************************************/
-/* System clock frequency. */
-// extern uint32_t SystemCoreClock;
-
-/*******************************************************************************
- * Variables for BOARD_BootClockRUN configuration
- ******************************************************************************/
-const mcglite_config_t mcgliteConfig_BOARD_BootClockRUN = {
-    .outSrc          = kMCGLITE_ClkSrcHirc,  /* MCGOUTCLK source is HIRC */
-    .irclkEnableMode = kMCGLITE_IrclkEnable, /* MCGIRCLK enabled, MCGIRCLK disabled in STOP mode */
-    .ircs            = kMCGLITE_Lirc8M,      /* Slow internal reference (LIRC) 8 MHz clock selected */
-    .fcrdiv          = kMCGLITE_LircDivBy1,  /* Low-frequency Internal Reference Clock Divider: divided by 1 */
-    .lircDiv2        = kMCGLITE_LircDivBy1,  /* Second Low-frequency Internal Reference Clock Divider: divided by 1 */
-    .hircEnableInNotHircMode = true,         /* HIRC source is enabled */
-};
-const sim_clock_config_t simConfig_BOARD_BootClockRUN = {
-    .er32kSrc = SIM_OSC32KSEL_LPO_CLK,       /* OSC32KSEL select: LPO clock */
-    .clkdiv1  = 0x10000U,                    /* SIM_CLKDIV1 - OUTDIV1: /1, OUTDIV4: /2 */
-};
-
-/*******************************************************************************
- * Code for BOARD_BootClockRUN configuration
- ******************************************************************************/
-void BOARD_BootClockRUN(void)
-{
-    /* Set the system clock dividers in SIM to safe value. */
-    CLOCK_SetSimSafeDivs();
-    /* Set MCG to HIRC mode. */
-    CLOCK_SetMcgliteConfig(&mcgliteConfig_BOARD_BootClockRUN);
-    /* Set the clock configuration in SIM module. */
-    CLOCK_SetSimConfig(&simConfig_BOARD_BootClockRUN);
-    /* Set SystemCoreClock variable. */
-    SystemCoreClock = BOARD_BOOTCLOCKRUN_CORE_CLOCK;
-}
-
-
-//--------------------------------------------------------------------+
-// Forward USB interrupt events to TinyUSB IRQ Handler
-//--------------------------------------------------------------------+
-void USB0_IRQHandler(void)
-{
-  tud_int_handler(0);
-}
-
-void board_init(void)
-{
-  /* Enable port clocks for GPIO pins */
-  CLOCK_EnableClock(kCLOCK_PortA);
-  CLOCK_EnableClock(kCLOCK_PortB);
-  CLOCK_EnableClock(kCLOCK_PortC);
-  CLOCK_EnableClock(kCLOCK_PortD);
-  CLOCK_EnableClock(kCLOCK_PortE);
-
-
-  gpio_pin_config_t led_config = { kGPIO_DigitalOutput, 1 };
-  GPIO_PinInit(GPIOA, 1U, &led_config);
-  PORT_SetPinMux(PORTA, 1U, kPORT_MuxAsGpio);
-  led_config.outputLogic = 0;
-  GPIO_PinInit(GPIOA, 2U, &led_config);
-  PORT_SetPinMux(PORTA, 2U, kPORT_MuxAsGpio);
-
-#ifdef BUTTON_PIN
-  gpio_pin_config_t button_config = { kGPIO_DigitalInput, 0 };
-  GPIO_PinInit(BUTTON_GPIO, BUTTON_PIN, &button_config);
-  const port_pin_config_t BUTTON_CFG = {
-    kPORT_PullUp,
-    kPORT_FastSlewRate,
-    kPORT_PassiveFilterDisable,
-    kPORT_LowDriveStrength,
-    kPORT_MuxAsGpio
-  };
-  PORT_SetPinConfig(BUTTON_PORT, BUTTON_PIN, &BUTTON_CFG);
-#endif
-
-  /* PORTC3 is configured as LPUART0_RX */
-  PORT_SetPinMux(PORTC, 3U, kPORT_MuxAlt3);
-  /* PORTA2 (pin 24) is configured as LPUART0_TX */
-  PORT_SetPinMux(PORTE, 0U, kPORT_MuxAlt3);
-
-  SIM->SOPT5 = ((SIM->SOPT5 &
-               /* Mask bits to zero which are setting */
-               (~(SIM_SOPT5_LPUART1TXSRC_MASK | SIM_SOPT5_LPUART1RXSRC_MASK)))
-               /* LPUART0 Transmit Data Source Select: LPUART0_TX pin. */
-               | SIM_SOPT5_LPUART1TXSRC(SOPT5_LPUART1TXSRC_LPUART_TX)
-               /* LPUART0 Receive Data Source Select: LPUART_RX pin. */
-               | SIM_SOPT5_LPUART1RXSRC(SOPT5_LPUART1RXSRC_LPUART_RX));
-
-  BOARD_BootClockRUN();
-  SystemCoreClockUpdate();
-  CLOCK_SetLpuart1Clock(1);
-
-#if CFG_TUSB_OS == OPT_OS_NONE
-  // 1ms tick timer
-  SysTick_Config(SystemCoreClock / 1000);
-#elif CFG_TUSB_OS == OPT_OS_FREERTOS
-  // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
-  NVIC_SetPriority(USB0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY );
-#endif
-
-  lpuart_config_t uart_config;
-  LPUART_GetDefaultConfig(&uart_config);
-  uart_config.baudRate_Bps = CFG_BOARD_UART_BAUDRATE;
-  uart_config.enableTx = true;
-  uart_config.enableRx = true;
-  LPUART_Init(UART_PORT, &uart_config, CLOCK_GetFreq(kCLOCK_McgIrc48MClk));
-
-  // USB
-  CLOCK_EnableUsbfs0Clock(kCLOCK_UsbSrcIrc48M, 48000000U);
-}
-
-//--------------------------------------------------------------------+
-// Board porting API
-//--------------------------------------------------------------------+
-
-void board_led_write(bool state)
-{
-  if (state) {
-    LED_GPIO->PDDR |= GPIO_FIT_REG((1UL << LED_PIN));
-  } else {
-    LED_GPIO->PDDR &= GPIO_FIT_REG(~(1UL << LED_PIN));
-  }
-//  GPIO_PinWrite(GPIOA, 1, state ? LED_STATE_ON : (1-LED_STATE_ON) );
-//  GPIO_PinWrite(GPIOA, 2, state ? (1-LED_STATE_ON) : LED_STATE_ON );
-}
-
-uint32_t board_button_read(void)
-{
-#ifdef BUTTON_PIN
-  return BUTTON_STATE_ACTIVE == GPIO_PinRead(BUTTON_GPIO, BUTTON_PIN);
-#else
-  return 0;
-#endif
-}
-
-int board_uart_read(uint8_t* buf, int len)
-{
-  LPUART_ReadBlocking(UART_PORT, buf, len);
-  return len;
-}
-
-int board_uart_write(void const * buf, int len)
-{
-  LPUART_WriteBlocking(UART_PORT, (uint8_t const*) buf, len);
-  return len;
-}
-
-#if CFG_TUSB_OS == OPT_OS_NONE
-volatile uint32_t system_ticks = 0;
-void SysTick_Handler(void)
-{
-  system_ticks++;
-}
-
-uint32_t board_millis(void)
-{
-  return system_ticks;
-}
-#endif
diff --git a/hw/bsp/kinetis_k32l2/boards/kuiic/K32L2B31xxxxA_flash.ld b/hw/bsp/kinetis_k32l2/boards/kuiic/kuiic.ld
index f478a99c7..f478a99c7 100644
--- a/hw/bsp/kinetis_k32l2/boards/kuiic/K32L2B31xxxxA_flash.ld
+++ b/hw/bsp/kinetis_k32l2/boards/kuiic/kuiic.ld
diff --git a/hw/bsp/kinetis_k32l2/boards/frdm_k32l2a4s/frdm_k32l2a4s.c b/hw/bsp/kinetis_k32l2/family.c
index 39783b7e1..92f5ba6d3 100644
--- a/hw/bsp/kinetis_k32l2/boards/frdm_k32l2a4s/frdm_k32l2a4s.c
+++ b/hw/bsp/kinetis_k32l2/family.c
@@ -25,77 +25,57 @@
  * This file is part of the TinyUSB stack.
  */
 
-#include "bsp/board_api.h"
-#include "board.h"
 #include "fsl_gpio.h"
 #include "fsl_port.h"
 #include "fsl_clock.h"
 #include "fsl_lpuart.h"
 
 #include "clock_config.h"
+#include "bsp/board_api.h"
+#include "board.h"
+
 
 //--------------------------------------------------------------------+
 // Forward USB interrupt events to TinyUSB IRQ Handler
 //--------------------------------------------------------------------+
-void USB0_IRQHandler(void)
-{
+void USB0_IRQHandler(void) {
   tud_int_handler(0);
 }
 
-void board_init(void)
-{
-  /* Enable port clocks for UART/LED/Button pins */
-  CLOCK_EnableClock(UART_PIN_CLOCK);
-  CLOCK_EnableClock(LED_PIN_CLOCK);
-  CLOCK_EnableClock(BUTTON_PIN_CLOCK);
+void board_init(void) {
+  /* Enable port clocks for GPIO pins */
+  CLOCK_EnableClock(kCLOCK_PortA);
+  CLOCK_EnableClock(kCLOCK_PortB);
+  CLOCK_EnableClock(kCLOCK_PortC);
+  CLOCK_EnableClock(kCLOCK_PortD);
+  CLOCK_EnableClock(kCLOCK_PortE);
+
+  BOARD_InitBootPins();
+  BOARD_BootClockRUN();
+  SystemCoreClockUpdate();
 
-  gpio_pin_config_t led_config = { kGPIO_DigitalOutput, 0 };
+  gpio_pin_config_t led_config = {kGPIO_DigitalOutput, 0};
   GPIO_PinInit(LED_GPIO, LED_PIN, &led_config);
   PORT_SetPinMux(LED_PORT, LED_PIN, kPORT_MuxAsGpio);
 
-  gpio_pin_config_t button_config = { kGPIO_DigitalInput, 0 };
+#ifdef BUTTON_PIN
+  gpio_pin_config_t button_config = {kGPIO_DigitalInput, 0};
   GPIO_PinInit(BUTTON_GPIO, BUTTON_PIN, &button_config);
   const port_pin_config_t BUTTON_CFG = {
-    kPORT_PullUp,
-    kPORT_FastSlewRate,
-    kPORT_PassiveFilterDisable,
-    kPORT_OpenDrainDisable,
-    kPORT_LowDriveStrength,
-    kPORT_MuxAsGpio,
-    kPORT_UnlockRegister
+      kPORT_PullUp,
+      kPORT_FastSlewRate,
+      kPORT_PassiveFilterDisable,
+#if defined(FSL_FEATURE_PORT_HAS_OPEN_DRAIN) && FSL_FEATURE_PORT_HAS_OPEN_DRAIN
+      kPORT_OpenDrainDisable,
+#endif
+      kPORT_LowDriveStrength,
+      kPORT_MuxAsGpio,
+#if defined(FSL_FEATURE_PORT_HAS_PIN_CONTROL_LOCK) && FSL_FEATURE_PORT_HAS_PIN_CONTROL_LOCK
+      kPORT_UnlockRegister
+#endif
   };
   PORT_SetPinConfig(BUTTON_PORT, BUTTON_PIN, &BUTTON_CFG);
-
-  /*
-    Enable LPUART0 clock and configure port pins.
-    FIR clock is being used so the USB examples work.
-  */
-  PCC_LPUART0  = 0U;                          /* Clock must be off to set PCS */
-  PCC_LPUART0  = PCC_CLKCFG_PCS( 3U );        /* Select the clock. 1:OSCCLK/Bus Clock, 2:Slow IRC, 3: Fast IRC, 6: System PLL */
-  PCC_LPUART0 |= PCC_CLKCFG_CGC( 1U );        /* Enable LPUART */
-
-  /* PORTB16 (pin 62) is configured as LPUART0_RX */
-  gpio_pin_config_t const lpuart_config_rx = { kGPIO_DigitalInput, 0 };
-  GPIO_PinInit(UART_PIN_GPIO, UART_PIN_RX, &lpuart_config_rx);
-  const port_pin_config_t UART_CFG = {
-    kPORT_PullUp,
-    kPORT_FastSlewRate,
-    kPORT_PassiveFilterDisable,
-    kPORT_OpenDrainDisable,
-    kPORT_LowDriveStrength,
-    kPORT_MuxAsGpio,
-    kPORT_UnlockRegister
-  };
-  PORT_SetPinConfig(UART_PIN_PORT, UART_PIN_RX, &UART_CFG);
-  PORT_SetPinMux(   UART_PIN_PORT, UART_PIN_RX, kPORT_MuxAlt3);
-
-  /* PORTB17 (pin 63) is configured as LPUART0_TX */
-  gpio_pin_config_t const lpuart_config_tx = { kGPIO_DigitalOutput, 0 };
-  GPIO_PinInit(   UART_PIN_GPIO, UART_PIN_TX, &lpuart_config_tx);
-  PORT_SetPinMux( UART_PIN_PORT, UART_PIN_TX, kPORT_MuxAlt3);
-
-  BOARD_BootClockRUN();
-  SystemCoreClockUpdate();
+#endif
 
 #if CFG_TUSB_OS == OPT_OS_NONE
   // 1ms tick timer
@@ -110,28 +90,29 @@ void board_init(void)
   uart_config.baudRate_Bps = CFG_BOARD_UART_BAUDRATE;
   uart_config.enableTx = true;
   uart_config.enableRx = true;
-  LPUART_Init(UART_PORT, &uart_config, CLOCK_GetFreq(kCLOCK_ScgFircClk));
+  LPUART_Init(UART_PORT, &uart_config, UART_CLOCK_SOURCE_HZ);
 
   // USB
-  CLOCK_EnableUsbfs0Clock(kCLOCK_IpSrcFircAsync, 48000000U);
+  CLOCK_EnableUsbfs0Clock(USB_CLOCK_SOURCE, 48000000U);
 }
 
 //--------------------------------------------------------------------+
 // Board porting API
 //--------------------------------------------------------------------+
 
-void board_led_write(bool state)
-{
-  GPIO_PinWrite(LED_GPIO, LED_PIN, state ? LED_STATE_ON : (1-LED_STATE_ON));
+void board_led_write(bool state) {
+  GPIO_PinWrite(LED_GPIO, LED_PIN, state ? LED_STATE_ON : (1 - LED_STATE_ON));
 }
 
-uint32_t board_button_read(void)
-{
+uint32_t board_button_read(void) {
+#ifdef BUTTON_PIN
   return BUTTON_STATE_ACTIVE == GPIO_PinRead(BUTTON_GPIO, BUTTON_PIN);
+#else
+  return 0;
+#endif
 }
 
-int board_uart_read(uint8_t* buf, int len)
-{
+int board_uart_read(uint8_t* buf, int len) {
 #if 0 /*
 	Use this version if want the LED to blink during BOARD=board_test,
 	without having to hit a key.
@@ -151,21 +132,39 @@ int board_uart_read(uint8_t* buf, int len)
 #endif
 }
 
-int board_uart_write(void const * buf, int len)
-{
+int board_uart_write(void const* buf, int len) {
   LPUART_WriteBlocking(UART_PORT, (uint8_t const*) buf, len);
   return len;
 }
 
 #if CFG_TUSB_OS == OPT_OS_NONE
 volatile uint32_t system_ticks = 0;
-void SysTick_Handler(void)
-{
+
+void SysTick_Handler(void) {
   system_ticks++;
 }
 
-uint32_t board_millis(void)
-{
+uint32_t board_millis(void) {
   return system_ticks;
 }
+
+#endif
+
+#ifndef __ICCARM__
+// Implement _start() since we use linker flag '-nostartfiles'.
+// Requires defined __STARTUP_CLEAR_BSS,
+extern int main(void);
+
+TU_ATTR_UNUSED void _start(void) {
+  // called by startup code
+  main();
+  while (1) {}
+}
+
+#ifdef __clang__
+void	_exit (int __status) {
+  while (1) {}
+}
+#endif
+
 #endif
diff --git a/hw/bsp/kinetis_k32l2/family.cmake b/hw/bsp/kinetis_k32l2/family.cmake
new file mode 100644
index 000000000..406ae99d3
--- /dev/null
+++ b/hw/bsp/kinetis_k32l2/family.cmake
@@ -0,0 +1,112 @@
+include_guard()
+
+set(SDK_DIR ${TOP}/hw/mcu/nxp/mcux-sdk)
+set(CMSIS_DIR ${TOP}/lib/CMSIS_5)
+
+# include board specific
+include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
+
+# toolchain set up
+set(CMAKE_SYSTEM_PROCESSOR cortex-m0plus CACHE INTERNAL "System Processor")
+set(CMAKE_TOOLCHAIN_FILE ${TOP}/examples/build_system/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
+
+set(FAMILY_MCUS KINETIS_K32L CACHE INTERNAL "")
+
+
+#------------------------------------
+# BOARD_TARGET
+#------------------------------------
+# only need to be built ONCE for all examples
+function(add_board_target BOARD_TARGET)
+  if (TARGET ${BOARD_TARGET})
+    return()
+  endif ()
+
+  # LD_FILE and STARTUP_FILE can be defined in board.cmake
+  set(LD_FILE_Clang ${LD_FILE_GNU})
+  set(STARTUP_FILE_GNU ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/startup_${MCU_VARIANT}.S)
+  set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
+
+  add_library(${BOARD_TARGET} STATIC
+    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
+    ${SDK_DIR}/drivers/gpio/fsl_gpio.c
+    ${SDK_DIR}/drivers/lpuart/fsl_lpuart.c
+    ${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_clock.c
+    ${SDK_DIR}/devices/${MCU_VARIANT}/system_${MCU_VARIANT}.c
+    )
+  target_compile_definitions(${BOARD_TARGET} PUBLIC
+    __STARTUP_CLEAR_BSS
+    )
+  target_include_directories(${BOARD_TARGET} PUBLIC
+    ${CMSIS_DIR}/CMSIS/Core/Include
+    ${SDK_DIR}/devices/${MCU_VARIANT}
+    ${SDK_DIR}/devices/${MCU_VARIANT}/drivers
+    ${SDK_DIR}/drivers/common
+    ${SDK_DIR}/drivers/gpio
+    ${SDK_DIR}/drivers/lpuart
+    ${SDK_DIR}/drivers/port
+    ${SDK_DIR}/drivers/smc
+    )
+
+  update_board(${BOARD_TARGET})
+
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+    target_link_options(${BOARD_TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_GNU}"
+      --specs=nosys.specs --specs=nano.specs
+      -nostartfiles
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    target_link_options(${BOARD_TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_GNU}"
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
+    target_link_options(${BOARD_TARGET} PUBLIC
+      "LINKER:--config=${LD_FILE_IAR}"
+      )
+  endif ()
+endfunction()
+
+
+#------------------------------------
+# Functions
+#------------------------------------
+function(family_configure_example TARGET RTOS)
+  family_configure_common(${TARGET} ${RTOS})
+
+  # Board target
+  add_board_target(board_${BOARD})
+
+  #---------- Port Specific ----------
+  # These files are built for each example since it depends on example's tusb_config.h
+  target_sources(${TARGET} PUBLIC
+    # BSP
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
+    )
+  target_include_directories(${TARGET} PUBLIC
+    # family, hw, board
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
+    )
+
+  # Add TinyUSB target and port source
+  family_add_tinyusb(${TARGET} OPT_MCU_KINETIS_K32L ${RTOS})
+  target_sources(${TARGET}-tinyusb PUBLIC
+    ${TOP}/src/portable/nxp/khci/dcd_khci.c
+    ${TOP}/src/portable/nxp/khci/hcd_khci.c
+    )
+  target_link_libraries(${TARGET}-tinyusb PUBLIC board_${BOARD})
+
+  # Link dependencies
+  target_link_libraries(${TARGET} PUBLIC board_${BOARD} ${TARGET}-tinyusb)
+
+  # Flashing
+  family_flash_jlink(${TARGET})
+
+  if (DEFINED TEENSY_MCU)
+    family_add_bin_hex(${TARGET})
+    family_flash_teensy(${TARGET})
+  endif ()
+endfunction()
diff --git a/hw/bsp/kinetis_k32l2/family.mk b/hw/bsp/kinetis_k32l2/family.mk
index 0bfd57d29..e18348d4d 100644
--- a/hw/bsp/kinetis_k32l2/family.mk
+++ b/hw/bsp/kinetis_k32l2/family.mk
@@ -1,6 +1,5 @@
 UF2_FAMILY_ID = 0x7f83e793
 SDK_DIR = hw/mcu/nxp/mcux-sdk
-DEPS_SUBMODULES += $(SDK_DIR) lib/CMSIS_5
 MCU_DIR = $(SDK_DIR)/devices/$(MCU)
 
 include $(TOP)/$(BOARD_PATH)/board.mk
@@ -9,7 +8,9 @@ CPU_CORE ?= cortex-m0plus
 CFLAGS += \
 	-DCFG_TUSB_MCU=OPT_MCU_KINETIS_K32L
 
-LDFLAGS_GCC += -specs=nosys.specs -specs=nano.specs
+LDFLAGS_GCC += \
+  -nostartfiles \
+  -specs=nosys.specs -specs=nano.specs
 
 SRC_C += \
 	src/portable/nxp/khci/dcd_khci.c \
@@ -25,10 +26,10 @@ INC += \
 	$(TOP)/$(MCU_DIR) \
 	$(TOP)/$(MCU_DIR)/project_template \
 	$(TOP)/$(MCU_DIR)/drivers \
-	$(TOP)/$(SDK_DIR)/drivers/smc \
 	$(TOP)/$(SDK_DIR)/drivers/common \
 	$(TOP)/$(SDK_DIR)/drivers/gpio \
-	$(TOP)/$(SDK_DIR)/drivers/port \
 	$(TOP)/$(SDK_DIR)/drivers/lpuart \
+	$(TOP)/$(SDK_DIR)/drivers/port \
+	$(TOP)/$(SDK_DIR)/drivers/smc \
 
 SRC_S += $(MCU_DIR)/gcc/startup_$(MCU).S