diff options
| author | hathach <[email protected]> | 2024-05-02 17:54:44 +0700 |
|---|---|---|
| committer | hathach <[email protected]> | 2024-05-02 17:54:44 +0700 |
| commit | c717e52ab2453f7672b16f2d63cd70558950ef33 (patch) | |
| tree | b001befe5fb2df03e0acbf676ebcfe07009760fa | |
| parent | 4b537a4f8c96519a3e77a63ff8ddbb3c528bd857 (diff) | |
add cmake for lpc11
| -rw-r--r-- | examples/device/audio_4_channel_mic_freertos/skip.txt | 1 | ||||
| -rw-r--r-- | hw/bsp/kinetis_k32l2/FreeRTOSConfig/FreeRTOSConfig.h | 2 | ||||
| -rw-r--r-- | hw/bsp/lpc11/FreeRTOSConfig/FreeRTOSConfig.h | 178 | ||||
| -rw-r--r-- | hw/bsp/lpc11/boards/lpcxpresso11u37/board.cmake | 19 | ||||
| -rw-r--r-- | hw/bsp/lpc11/boards/lpcxpresso11u37/board.h | 98 | ||||
| -rw-r--r-- | hw/bsp/lpc11/boards/lpcxpresso11u37/lpcxpresso11u37.c | 208 | ||||
| -rw-r--r-- | hw/bsp/lpc11/boards/lpcxpresso11u68/board.cmake | 12 | ||||
| -rw-r--r-- | hw/bsp/lpc11/boards/lpcxpresso11u68/board.h | 27 | ||||
| -rw-r--r-- | hw/bsp/lpc11/boards/lpcxpresso11u68/board.mk | 1 | ||||
| -rw-r--r-- | hw/bsp/lpc11/family.c (renamed from hw/bsp/lpc11/boards/lpcxpresso11u68/lpcxpresso11u68.c) | 75 | ||||
| -rw-r--r-- | hw/bsp/lpc11/family.cmake | 104 | ||||
| -rw-r--r-- | hw/bsp/lpc11/family.mk | 5 | ||||
| -rw-r--r-- | src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c | 10 |
13 files changed, 482 insertions, 258 deletions
diff --git a/examples/device/audio_4_channel_mic_freertos/skip.txt b/examples/device/audio_4_channel_mic_freertos/skip.txt index eb434c23b..21683518c 100644 --- a/examples/device/audio_4_channel_mic_freertos/skip.txt +++ b/examples/device/audio_4_channel_mic_freertos/skip.txt @@ -10,5 +10,6 @@ mcu:SAMX7X mcu:VALENTYUSB_EPTRI mcu:RAXXX mcu:STM32L0 +board:lpcxpresso11u37 family:broadcom_32bit family:broadcom_64bit diff --git a/hw/bsp/kinetis_k32l2/FreeRTOSConfig/FreeRTOSConfig.h b/hw/bsp/kinetis_k32l2/FreeRTOSConfig/FreeRTOSConfig.h index 133728596..e6604d360 100644 --- a/hw/bsp/kinetis_k32l2/FreeRTOSConfig/FreeRTOSConfig.h +++ b/hw/bsp/kinetis_k32l2/FreeRTOSConfig/FreeRTOSConfig.h @@ -147,7 +147,7 @@ //--------------------------------------------------------------------+ // For Cortex-M specific: __NVIC_PRIO_BITS is defined in mcu header -#define configPRIO_BITS 4 +#define configPRIO_BITS 2 /* The lowest interrupt priority that can be used in a call to a "set priority" function. */ #define configLIBRARY_LOWEST_INTERRUPT_PRIORITY ((1<<configPRIO_BITS) - 1) diff --git a/hw/bsp/lpc11/FreeRTOSConfig/FreeRTOSConfig.h b/hw/bsp/lpc11/FreeRTOSConfig/FreeRTOSConfig.h new file mode 100644 index 000000000..27b2d76f5 --- /dev/null +++ b/hw/bsp/lpc11/FreeRTOSConfig/FreeRTOSConfig.h @@ -0,0 +1,178 @@ +/* + * FreeRTOS Kernel V10.0.0 + * Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy of + * this software and associated documentation files (the "Software"), to deal in + * the Software without restriction, including without limitation the rights to + * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of + * the Software, and to permit persons to whom the Software is furnished to do so, + * subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in all + * copies or substantial portions of the Software. If you wish to use our Amazon + * FreeRTOS name, please do so in a fair use way that does not cause confusion. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS + * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR + * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER + * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * http://www.FreeRTOS.org + * http://aws.amazon.com/freertos + * + * 1 tab == 4 spaces! + */ + + +#ifndef FREERTOS_CONFIG_H +#define FREERTOS_CONFIG_H + +/*----------------------------------------------------------- + * Application specific definitions. + * + * These definitions should be adjusted for your particular hardware and + * application requirements. + * + * THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE + * FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE. + * + * See http://www.freertos.org/a00110.html. + *----------------------------------------------------------*/ + +// skip if included from IAR assembler +#ifndef __IASMARM__ + #ifdef __GNUC__ + #pragma GCC diagnostic push + #pragma GCC diagnostic ignored "-Wunused-parameter" + #endif + + #include "chip.h" + + #ifdef __GNUC__ + #pragma GCC diagnostic pop + #endif +#endif + +/* Cortex M23/M33 port configuration. */ +#define configENABLE_MPU 0 +#if defined(__ARM_FP) && __ARM_FP >= 4 + #define configENABLE_FPU 1 +#else + #define configENABLE_FPU 0 +#endif +#define configENABLE_TRUSTZONE 0 +#define configMINIMAL_SECURE_STACK_SIZE (1024) + +#define configUSE_PREEMPTION 1 +#define configUSE_PORT_OPTIMISED_TASK_SELECTION 0 +#define configCPU_CLOCK_HZ SystemCoreClock +#define configTICK_RATE_HZ ( 1000 ) +#define configMAX_PRIORITIES ( 5 ) +#define configMINIMAL_STACK_SIZE ( 128 ) +#define configTOTAL_HEAP_SIZE ( configSUPPORT_DYNAMIC_ALLOCATION*4*1024 ) +#define configMAX_TASK_NAME_LEN 16 +#define configUSE_16_BIT_TICKS 0 +#define configIDLE_SHOULD_YIELD 1 +#define configUSE_MUTEXES 1 +#define configUSE_RECURSIVE_MUTEXES 1 +#define configUSE_COUNTING_SEMAPHORES 1 +#define configQUEUE_REGISTRY_SIZE 2 +#define configUSE_QUEUE_SETS 0 +#define configUSE_TIME_SLICING 0 +#define configUSE_NEWLIB_REENTRANT 0 +#define configENABLE_BACKWARD_COMPATIBILITY 1 +#define configSTACK_ALLOCATION_FROM_SEPARATE_HEAP 0 + +#define configSUPPORT_STATIC_ALLOCATION 1 +#define configSUPPORT_DYNAMIC_ALLOCATION 0 + +/* Hook function related definitions. */ +#define configUSE_IDLE_HOOK 0 +#define configUSE_TICK_HOOK 0 +#define configUSE_MALLOC_FAILED_HOOK 0 // cause nested extern warning +#define configCHECK_FOR_STACK_OVERFLOW 2 + +/* Run time and task stats gathering related definitions. */ +#define configGENERATE_RUN_TIME_STATS 0 +#define configRECORD_STACK_HIGH_ADDRESS 1 +#define configUSE_TRACE_FACILITY 1 // legacy trace +#define configUSE_STATS_FORMATTING_FUNCTIONS 0 + +/* Co-routine definitions. */ +#define configUSE_CO_ROUTINES 0 +#define configMAX_CO_ROUTINE_PRIORITIES 2 + +/* Software timer related definitions. */ +#define configUSE_TIMERS 1 +#define configTIMER_TASK_PRIORITY (configMAX_PRIORITIES-2) +#define configTIMER_QUEUE_LENGTH 32 +#define configTIMER_TASK_STACK_DEPTH configMINIMAL_STACK_SIZE + +/* Optional functions - most linkers will remove unused functions anyway. */ +#define INCLUDE_vTaskPrioritySet 0 +#define INCLUDE_uxTaskPriorityGet 0 +#define INCLUDE_vTaskDelete 0 +#define INCLUDE_vTaskSuspend 1 // required for queue, semaphore, mutex to be blocked indefinitely with portMAX_DELAY +#define INCLUDE_xResumeFromISR 0 +#define INCLUDE_vTaskDelayUntil 1 +#define INCLUDE_vTaskDelay 1 +#define INCLUDE_xTaskGetSchedulerState 0 +#define INCLUDE_xTaskGetCurrentTaskHandle 1 +#define INCLUDE_uxTaskGetStackHighWaterMark 0 +#define INCLUDE_xTaskGetIdleTaskHandle 0 +#define INCLUDE_xTimerGetTimerDaemonTaskHandle 0 +#define INCLUDE_pcTaskGetTaskName 0 +#define INCLUDE_eTaskGetState 0 +#define INCLUDE_xEventGroupSetBitFromISR 0 +#define INCLUDE_xTimerPendFunctionCall 0 + +/* Define to trap errors during development. */ +// Halt CPU (breakpoint) when hitting error, only apply for Cortex M3, M4, M7 +#if defined(__ARM_ARCH_7M__) || defined (__ARM_ARCH_7EM__) + #define configASSERT(_exp) \ + do {\ + if ( !(_exp) ) { \ + volatile uint32_t* ARM_CM_DHCSR = ((volatile uint32_t*) 0xE000EDF0UL); /* Cortex M CoreDebug->DHCSR */ \ + if ( (*ARM_CM_DHCSR) & 1UL ) { /* Only halt mcu if debugger is attached */ \ + taskDISABLE_INTERRUPTS(); \ + __asm("BKPT #0\n"); \ + }\ + }\ + } while(0) +#else + #define configASSERT( x ) +#endif + +/* FreeRTOS hooks to NVIC vectors */ +#define xPortPendSVHandler PendSV_Handler +#define xPortSysTickHandler SysTick_Handler +#define vPortSVCHandler SVC_Handler + +//--------------------------------------------------------------------+ +// Interrupt nesting behavior configuration. +//--------------------------------------------------------------------+ + +// For Cortex-M specific: __NVIC_PRIO_BITS is defined in mcu header +#define configPRIO_BITS 2 + +/* The lowest interrupt priority that can be used in a call to a "set priority" function. */ +#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY ((1<<configPRIO_BITS) - 1) + +/* The highest interrupt priority that can be used by any interrupt service +routine that makes calls to interrupt safe FreeRTOS API functions. DO NOT CALL +INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A HIGHER +PRIORITY THAN THIS! (higher priorities are lower numeric values. */ +#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY 2 + +/* Interrupt priorities used by the kernel port layer itself. These are generic +to all Cortex-M ports, and do not rely on any particular library functions. */ +#define configKERNEL_INTERRUPT_PRIORITY ( configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) ) + +/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!! +See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */ +#define configMAX_SYSCALL_INTERRUPT_PRIORITY ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) ) + +#endif /* __FREERTOS_CONFIG__H */ diff --git a/hw/bsp/lpc11/boards/lpcxpresso11u37/board.cmake b/hw/bsp/lpc11/boards/lpcxpresso11u37/board.cmake new file mode 100644 index 000000000..12f75cd08 --- /dev/null +++ b/hw/bsp/lpc11/boards/lpcxpresso11u37/board.cmake @@ -0,0 +1,19 @@ +set(LPC_FAMILY 11xx) +set(JLINK_DEVICE LPC11U37/401) +set(PYOCD_TARGET lpc11u37) + +set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/lpc11u37.ld) + +function(update_board TARGET) + target_compile_definitions(${TARGET} PUBLIC + CFG_EXAMPLE_MSC_READONLY + CFG_EXAMPLE_VIDEO_READONLY + ) + target_sources(${TARGET} PRIVATE + ${SDK_DIR}/src/gpio_${LPC_FAMILY}_1.c + ${SDK_DIR}/src/sysctl_${LPC_FAMILY}.c + ) + target_compile_options(${TARGET} PRIVATE + -Wno-error=unused-parameter + ) +endfunction() diff --git a/hw/bsp/lpc11/boards/lpcxpresso11u37/board.h b/hw/bsp/lpc11/boards/lpcxpresso11u37/board.h new file mode 100644 index 000000000..930462f28 --- /dev/null +++ b/hw/bsp/lpc11/boards/lpcxpresso11u37/board.h @@ -0,0 +1,98 @@ +#ifndef BOARD_H +#define BOARD_H + +#define LED_PORT 1 +#define LED_PIN 24 +#define LED_STATE_ON 0 + +// Wake up Switch +#define BUTTON_PORT 0 +#define BUTTON_PIN 16 +#define BUTTON_STATE_ACTIVE 0 + +/* System oscillator rate and RTC oscillator rate */ +const uint32_t OscRateIn = 12000000; +const uint32_t ExtRateIn = 0; + +/* Pin muxing table, only items that need changing from their default pin + state are in this table. Not every pin is mapped. */ +/* IOCON pin definitions for pin muxing */ +typedef struct { + uint32_t port : 8; /* Pin port */ + uint32_t pin : 8; /* Pin number */ + uint32_t modefunc : 16; /* Function and mode */ +} PINMUX_GRP_T; + +static const PINMUX_GRP_T pinmuxing[] = { + {0, 3, (IOCON_FUNC1 | IOCON_MODE_INACT | IOCON_DIGMODE_EN)}, // USB VBUS + {0, 6, (IOCON_FUNC1 | IOCON_MODE_INACT)}, /* PIO0_6 used for USB_CONNECT */ + + {0, 18, (IOCON_FUNC1 | IOCON_MODE_INACT | IOCON_DIGMODE_EN)}, // UART0 RX + {0, 19, (IOCON_FUNC1 | IOCON_MODE_INACT | IOCON_DIGMODE_EN)}, // UART0 TX +}; + +/* Setup system clocking */ +static inline void Chip_SetupXtalClocking(void) { + volatile int i; + + /* Powerup main oscillator */ + Chip_SYSCTL_PowerUp(SYSCTL_POWERDOWN_SYSOSC_PD); + + /* Wait 200us for OSC to be stablized, no status + indication, dummy wait. */ + for (i = 0; i < 0x100; i++) {} + + /* Set system PLL input to main oscillator */ + Chip_Clock_SetSystemPLLSource(SYSCTL_PLLCLKSRC_MAINOSC); + + /* Power down PLL to change the PLL divider ratio */ + Chip_SYSCTL_PowerDown(SYSCTL_POWERDOWN_SYSPLL_PD); + + /* Setup PLL for main oscillator rate (FCLKIN = 12MHz) * 4 = 48MHz + MSEL = 3 (this is pre-decremented), PSEL = 1 (for P = 2) + FCLKOUT = FCLKIN * (MSEL + 1) = 12MHz * 4 = 48MHz + FCCO = FCLKOUT * 2 * P = 48MHz * 2 * 2 = 192MHz (within FCCO range) */ + Chip_Clock_SetupSystemPLL(3, 1); + + /* Powerup system PLL */ + Chip_SYSCTL_PowerUp(SYSCTL_POWERDOWN_SYSPLL_PD); + + /* Wait for PLL to lock */ + while (!Chip_Clock_IsSystemPLLLocked()) {} + + /* Set system clock divider to 1 */ + Chip_Clock_SetSysClockDiv(1); + + /* Setup FLASH access to 3 clocks */ + Chip_FMC_SetFLASHAccess(FLASHTIM_50MHZ_CPU); + + /* Set main clock source to the system PLL. This will drive 48MHz + for the main clock and 48MHz for the system clock */ + Chip_Clock_SetMainClockSource(SYSCTL_MAINCLKSRC_PLLOUT); + + /* Set USB PLL input to main oscillator */ + Chip_Clock_SetUSBPLLSource(SYSCTL_PLLCLKSRC_MAINOSC); + /* Setup USB PLL (FCLKIN = 12MHz) * 4 = 48MHz + MSEL = 3 (this is pre-decremented), PSEL = 1 (for P = 2) + FCLKOUT = FCLKIN * (MSEL + 1) = 12MHz * 4 = 48MHz + FCCO = FCLKOUT * 2 * P = 48MHz * 2 * 2 = 192MHz (within FCCO range) */ + Chip_Clock_SetupUSBPLL(3, 1); + + /* Powerup USB PLL */ + Chip_SYSCTL_PowerUp(SYSCTL_POWERDOWN_USBPLL_PD); + + /* Wait for PLL to lock */ + while (!Chip_Clock_IsUSBPLLLocked()) {} +} + +static inline void Chip_USB_Init(void) { + /* enable USB main clock */ + Chip_Clock_SetUSBClockSource(SYSCTL_USBCLKSRC_PLLOUT, 1); + /* Enable AHB clock to the USB block and USB RAM. */ + Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_USB); + Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_USBRAM); + /* power UP USB Phy */ + Chip_SYSCTL_PowerUp(SYSCTL_POWERDOWN_USBPAD_PD); +} + +#endif diff --git a/hw/bsp/lpc11/boards/lpcxpresso11u37/lpcxpresso11u37.c b/hw/bsp/lpc11/boards/lpcxpresso11u37/lpcxpresso11u37.c deleted file mode 100644 index 900c57936..000000000 --- a/hw/bsp/lpc11/boards/lpcxpresso11u37/lpcxpresso11u37.c +++ /dev/null @@ -1,208 +0,0 @@ -/* - * The MIT License (MIT) - * - * Copyright (c) 2019 Ha Thach (tinyusb.org) - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - * - * This file is part of the TinyUSB stack. - */ - -#include "chip.h" -#include "bsp/board_api.h" - -//--------------------------------------------------------------------+ -// Forward USB interrupt events to TinyUSB IRQ Handler -//--------------------------------------------------------------------+ -void USB_IRQHandler(void) -{ - tud_int_handler(0); -} - -//---------------------------------------------------------------- ----+ -// MACRO TYPEDEF CONSTANT ENUM -//--------------------------------------------------------------------+ -#define LED_PORT 1 -#define LED_PIN 24 -#define LED_STATE_ON 0 - -// Wake up Switch -#define BUTTON_PORT 0 -#define BUTTON_PIN 16 -#define BUTTON_STATE_ACTIVE 0 - -/* System oscillator rate and RTC oscillator rate */ -const uint32_t OscRateIn = 12000000; -const uint32_t ExtRateIn = 0; - -/* Pin muxing table, only items that need changing from their default pin - state are in this table. Not every pin is mapped. */ -/* IOCON pin definitions for pin muxing */ -typedef struct { - uint32_t port : 8; /* Pin port */ - uint32_t pin : 8; /* Pin number */ - uint32_t modefunc : 16; /* Function and mode */ -} PINMUX_GRP_T; - -static const PINMUX_GRP_T pinmuxing[] = -{ - {0, 3, (IOCON_FUNC1 | IOCON_MODE_INACT | IOCON_DIGMODE_EN)}, // USB VBUS - {0, 6, (IOCON_FUNC1 | IOCON_MODE_INACT)}, /* PIO0_6 used for USB_CONNECT */ - - {0, 18, (IOCON_FUNC1 | IOCON_MODE_INACT | IOCON_DIGMODE_EN)}, // UART0 RX - {0, 19, (IOCON_FUNC1 | IOCON_MODE_INACT | IOCON_DIGMODE_EN)}, // UART0 TX -}; - -/* Setup system clocking */ -static void SystemSetupClocking(void) -{ - volatile int i; - - /* Powerup main oscillator */ - Chip_SYSCTL_PowerUp(SYSCTL_POWERDOWN_SYSOSC_PD); - - /* Wait 200us for OSC to be stablized, no status - indication, dummy wait. */ - for (i = 0; i < 0x100; i++) {} - - /* Set system PLL input to main oscillator */ - Chip_Clock_SetSystemPLLSource(SYSCTL_PLLCLKSRC_MAINOSC); - - /* Power down PLL to change the PLL divider ratio */ - Chip_SYSCTL_PowerDown(SYSCTL_POWERDOWN_SYSPLL_PD); - - /* Setup PLL for main oscillator rate (FCLKIN = 12MHz) * 4 = 48MHz - MSEL = 3 (this is pre-decremented), PSEL = 1 (for P = 2) - FCLKOUT = FCLKIN * (MSEL + 1) = 12MHz * 4 = 48MHz - FCCO = FCLKOUT * 2 * P = 48MHz * 2 * 2 = 192MHz (within FCCO range) */ - Chip_Clock_SetupSystemPLL(3, 1); - - /* Powerup system PLL */ - Chip_SYSCTL_PowerUp(SYSCTL_POWERDOWN_SYSPLL_PD); - - /* Wait for PLL to lock */ - while (!Chip_Clock_IsSystemPLLLocked()) {} - - /* Set system clock divider to 1 */ - Chip_Clock_SetSysClockDiv(1); - - /* Setup FLASH access to 3 clocks */ - Chip_FMC_SetFLASHAccess(FLASHTIM_50MHZ_CPU); - - /* Set main clock source to the system PLL. This will drive 48MHz - for the main clock and 48MHz for the system clock */ - Chip_Clock_SetMainClockSource(SYSCTL_MAINCLKSRC_PLLOUT); - - /* Set USB PLL input to main oscillator */ - Chip_Clock_SetUSBPLLSource(SYSCTL_PLLCLKSRC_MAINOSC); - /* Setup USB PLL (FCLKIN = 12MHz) * 4 = 48MHz - MSEL = 3 (this is pre-decremented), PSEL = 1 (for P = 2) - FCLKOUT = FCLKIN * (MSEL + 1) = 12MHz * 4 = 48MHz - FCCO = FCLKOUT * 2 * P = 48MHz * 2 * 2 = 192MHz (within FCCO range) */ - Chip_Clock_SetupUSBPLL(3, 1); - - /* Powerup USB PLL */ - Chip_SYSCTL_PowerUp(SYSCTL_POWERDOWN_USBPLL_PD); - - /* Wait for PLL to lock */ - while (!Chip_Clock_IsUSBPLLLocked()) {} -} - -// Invoked by startup code -void SystemInit(void) -{ - SystemSetupClocking(); - Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_RAM1); - - /* Enable IOCON clock */ - Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_IOCON); - for (uint32_t i = 0; i < (sizeof(pinmuxing) / sizeof(PINMUX_GRP_T)); i++) - { - Chip_IOCON_PinMuxSet(LPC_IOCON, pinmuxing[i].port, pinmuxing[i].pin, pinmuxing[i].modefunc); - } -} - -void board_init(void) -{ - SystemCoreClockUpdate(); - -#if CFG_TUSB_OS == OPT_OS_NONE - // 1ms tick timer - SysTick_Config(SystemCoreClock / 1000); -#elif CFG_TUSB_OS == OPT_OS_FREERTOS - // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher ) - NVIC_SetPriority(USB0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY ); -#endif - - Chip_GPIO_Init(LPC_GPIO); - - // LED - Chip_GPIO_SetPinDIROutput(LPC_GPIO, LED_PORT, LED_PIN); - - // Button - Chip_GPIO_SetPinDIRInput(LPC_GPIO, BUTTON_PORT, BUTTON_PIN); - - // USB: Setup PLL clock, and power - /* enable USB main clock */ - Chip_Clock_SetUSBClockSource(SYSCTL_USBCLKSRC_PLLOUT, 1); - /* Enable AHB clock to the USB block and USB RAM. */ - Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_USB); - Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_USBRAM); - /* power UP USB Phy */ - Chip_SYSCTL_PowerUp(SYSCTL_POWERDOWN_USBPAD_PD); -} - -//--------------------------------------------------------------------+ -// Board porting API -//--------------------------------------------------------------------+ - -void board_led_write(bool state) -{ - Chip_GPIO_SetPinState(LPC_GPIO, LED_PORT, LED_PIN, state ? LED_STATE_ON : (1-LED_STATE_ON)); -} - -uint32_t board_button_read(void) -{ - return BUTTON_STATE_ACTIVE == Chip_GPIO_GetPinState(LPC_GPIO, BUTTON_PORT, BUTTON_PIN); -} - -int board_uart_read(uint8_t* buf, int len) -{ - (void) buf; (void) len; - return 0; -} - -int board_uart_write(void const * buf, int len) -{ - (void) buf; (void) len; - return 0; -} - -#if CFG_TUSB_OS == OPT_OS_NONE -volatile uint32_t system_ticks = 0; -void SysTick_Handler (void) -{ - system_ticks++; -} - -uint32_t board_millis(void) -{ - return system_ticks; -} -#endif diff --git a/hw/bsp/lpc11/boards/lpcxpresso11u68/board.cmake b/hw/bsp/lpc11/boards/lpcxpresso11u68/board.cmake new file mode 100644 index 000000000..b7393cb2f --- /dev/null +++ b/hw/bsp/lpc11/boards/lpcxpresso11u68/board.cmake @@ -0,0 +1,12 @@ +set(LPC_FAMILY 11u6x) +set(JLINK_DEVICE LPC11U68) +set(PYOCD_TARGET LPC11U68) + +set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/lpc11u68.ld) + +function(update_board TARGET) + target_sources(${TARGET} PUBLIC + ${SDK_DIR}/src/gpio_${LPC_FAMILY}.c + ${SDK_DIR}/src/syscon_${LPC_FAMILY}.c + ) +endfunction() diff --git a/hw/bsp/lpc11/boards/lpcxpresso11u68/board.h b/hw/bsp/lpc11/boards/lpcxpresso11u68/board.h new file mode 100644 index 000000000..a12fcbef1 --- /dev/null +++ b/hw/bsp/lpc11/boards/lpcxpresso11u68/board.h @@ -0,0 +1,27 @@ +#ifndef BOARD_H +#define BOARD_H + +#define LED_PORT 2 +#define LED_PIN 17 +#define LED_STATE_ON 0 + +// Wake up Switch +#define BUTTON_PORT 0 +#define BUTTON_PIN 16 +#define BUTTON_STATE_ACTIVE 0 + +/* System oscillator rate and RTC oscillator rate */ +const uint32_t OscRateIn = 12000000; +const uint32_t RTCOscRateIn = 32768; + +/* Pin muxing table, only items that need changing from their default pin + state are in this table. Not every pin is mapped. */ +static const PINMUX_GRP_T pinmuxing[] = { + {0, 3, (IOCON_FUNC1 | IOCON_MODE_INACT | IOCON_DIGMODE_EN)}, // USB VBUS + {0, 18, (IOCON_FUNC1 | IOCON_MODE_INACT | IOCON_DIGMODE_EN)}, // UART0 RX + {0, 19, (IOCON_FUNC1 | IOCON_MODE_INACT | IOCON_DIGMODE_EN)}, // UART0 TX + {2, 0, (IOCON_FUNC1 | IOCON_MODE_INACT)}, // XTALIN + {2, 1, (IOCON_FUNC1 | IOCON_MODE_INACT)}, // XTALOUT +}; + +#endif diff --git a/hw/bsp/lpc11/boards/lpcxpresso11u68/board.mk b/hw/bsp/lpc11/boards/lpcxpresso11u68/board.mk index fbe97b853..cf095c347 100644 --- a/hw/bsp/lpc11/boards/lpcxpresso11u68/board.mk +++ b/hw/bsp/lpc11/boards/lpcxpresso11u68/board.mk @@ -5,7 +5,6 @@ CFLAGS += \ -DCORE_M0PLUS \ -D__VTOR_PRESENT=0 \ -DCFG_TUSB_MEM_SECTION='__attribute__((section(".data.$$RAM3")))' \ - -DCFG_TUSB_MEM_ALIGN='__attribute__((aligned(64)))' # All source paths should be relative to the top level. LD_FILE = $(BOARD_PATH)/lpc11u68.ld diff --git a/hw/bsp/lpc11/boards/lpcxpresso11u68/lpcxpresso11u68.c b/hw/bsp/lpc11/family.c index df895804d..bff7110b8 100644 --- a/hw/bsp/lpc11/boards/lpcxpresso11u68/lpcxpresso11u68.c +++ b/hw/bsp/lpc11/family.c @@ -24,55 +24,42 @@ * This file is part of the TinyUSB stack. */ +#ifdef __GNUC__ + #pragma GCC diagnostic push + #pragma GCC diagnostic ignored "-Wunused-parameter" +#endif + #include "chip.h" + +#ifdef __GNUC__ + #pragma GCC diagnostic pop +#endif + #include "bsp/board_api.h" +#include "board.h" //--------------------------------------------------------------------+ // Forward USB interrupt events to TinyUSB IRQ Handler //--------------------------------------------------------------------+ -void USB_IRQHandler(void) -{ +void USB_IRQHandler(void) { tud_int_handler(0); } //--------------------------------------------------------------------+ // MACRO TYPEDEF CONSTANT ENUM //--------------------------------------------------------------------+ -#define LED_PORT 2 -#define LED_PIN 17 -#define LED_STATE_ON 0 - -// Wake up Switch -#define BUTTON_PORT 0 -#define BUTTON_PIN 16 -#define BUTTON_STATE_ACTIVE 0 - -/* System oscillator rate and RTC oscillator rate */ -const uint32_t OscRateIn = 12000000; -const uint32_t RTCOscRateIn = 32768; - -/* Pin muxing table, only items that need changing from their default pin - state are in this table. Not every pin is mapped. */ -static const PINMUX_GRP_T pinmuxing[] = -{ - {0, 3, (IOCON_FUNC1 | IOCON_MODE_INACT | IOCON_DIGMODE_EN)}, // USB VBUS - {0, 18, (IOCON_FUNC1 | IOCON_MODE_INACT | IOCON_DIGMODE_EN)}, // UART0 RX - {0, 19, (IOCON_FUNC1 | IOCON_MODE_INACT | IOCON_DIGMODE_EN)}, // UART0 TX - {2, 0, (IOCON_FUNC1 | IOCON_MODE_INACT)}, // XTALIN - {2, 1, (IOCON_FUNC1 | IOCON_MODE_INACT)}, // XTALOUT -}; // Invoked by startup code -void SystemInit(void) -{ +void SystemInit(void) { /* Enable IOCON clock */ Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_IOCON); - Chip_IOCON_SetPinMuxing(LPC_IOCON, pinmuxing, sizeof(pinmuxing) / sizeof(PINMUX_GRP_T)); + for (uint32_t i = 0; i < (sizeof(pinmuxing) / sizeof(PINMUX_GRP_T)); i++) { + Chip_IOCON_PinMuxSet(LPC_IOCON, pinmuxing[i].port, pinmuxing[i].pin, pinmuxing[i].modefunc); + } Chip_SetupXtalClocking(); } -void board_init(void) -{ +void board_init(void) { SystemCoreClockUpdate(); #if CFG_TUSB_OS == OPT_OS_NONE @@ -99,37 +86,35 @@ void board_init(void) // Board porting API //--------------------------------------------------------------------+ -void board_led_write(bool state) -{ - Chip_GPIO_SetPinState(LPC_GPIO, LED_PORT, LED_PIN, state ? LED_STATE_ON : (1-LED_STATE_ON)); +void board_led_write(bool state) { + Chip_GPIO_SetPinState(LPC_GPIO, LED_PORT, LED_PIN, state ? LED_STATE_ON : (1 - LED_STATE_ON)); } -uint32_t board_button_read(void) -{ +uint32_t board_button_read(void) { return BUTTON_STATE_ACTIVE == Chip_GPIO_GetPinState(LPC_GPIO, BUTTON_PORT, BUTTON_PIN); } -int board_uart_read(uint8_t* buf, int len) -{ - (void) buf; (void) len; +int board_uart_read(uint8_t* buf, int len) { + (void) buf; + (void) len; return 0; } -int board_uart_write(void const * buf, int len) -{ - (void) buf; (void) len; +int board_uart_write(void const* buf, int len) { + (void) buf; + (void) len; return 0; } #if CFG_TUSB_OS == OPT_OS_NONE volatile uint32_t system_ticks = 0; -void SysTick_Handler (void) -{ + +void SysTick_Handler(void) { system_ticks++; } -uint32_t board_millis(void) -{ +uint32_t board_millis(void) { return system_ticks; } + #endif diff --git a/hw/bsp/lpc11/family.cmake b/hw/bsp/lpc11/family.cmake new file mode 100644 index 000000000..f17a48dd7 --- /dev/null +++ b/hw/bsp/lpc11/family.cmake @@ -0,0 +1,104 @@ +include_guard() + +# include board specific +include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake) + +set(CMSIS_DIR ${TOP}/lib/CMSIS_5) +if (LPC_FAMILY STREQUAL 11xx) + set(SDK_DIR ${TOP}/hw/mcu/nxp/lpcopen/lpc11uxx/lpc_chip_11uxx) +else() + set(SDK_DIR ${TOP}/hw/mcu/nxp/lpcopen/lpc${LPC_FAMILY}/lpc_chip_${LPC_FAMILY}) +endif() + +# toolchain set up +set(CMAKE_SYSTEM_PROCESSOR cortex-m0plus CACHE INTERNAL "System Processor") +set(CMAKE_TOOLCHAIN_FILE ${TOP}/examples/build_system/cmake/toolchain/arm_${TOOLCHAIN}.cmake) + +set(FAMILY_MCUS LPC11UXX CACHE INTERNAL "") + + +#------------------------------------ +# BOARD_TARGET +#------------------------------------ +# only need to be built ONCE for all examples +function(add_board_target BOARD_TARGET) + if (TARGET ${BOARD_TARGET}) + return() + endif () + + add_library(${BOARD_TARGET} STATIC + ${SDK_DIR}/../gcc/cr_startup_lpc${LPC_FAMILY}.c + ${SDK_DIR}/src/chip_${LPC_FAMILY}.c + ${SDK_DIR}/src/clock_${LPC_FAMILY}.c + ${SDK_DIR}/src/iocon_${LPC_FAMILY}.c + ${SDK_DIR}/src/sysinit_${LPC_FAMILY}.c + ) + target_compile_definitions(${BOARD_TARGET} PUBLIC + __USE_LPCOPEN + __VTOR_PRESENT=0 + CORE_M0 + CORE_M0PLUS + CFG_TUSB_MEM_ALIGN=TU_ATTR_ALIGNED\(64\) + ) + target_include_directories(${BOARD_TARGET} PUBLIC + ${SDK_DIR}/inc + ${CMSIS_DIR}/CMSIS/Core/Include + ) + + update_board(${BOARD_TARGET}) + + if (CMAKE_C_COMPILER_ID STREQUAL "GNU") + target_compile_options(${BOARD_TARGET} PUBLIC -nostdlib) + target_link_options(${BOARD_TARGET} PUBLIC + "LINKER:--script=${LD_FILE_GNU}" + --specs=nosys.specs --specs=nano.specs + ) + elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang") + target_link_options(${BOARD_TARGET} PUBLIC + "LINKER:--script=${LD_FILE_GNU}" + ) + elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR") + target_link_options(${BOARD_TARGET} PUBLIC + "LINKER:--config=${LD_FILE_IAR}" + ) + endif () +endfunction() + + +#------------------------------------ +# Functions +#------------------------------------ +function(family_configure_example TARGET RTOS) + family_configure_common(${TARGET} ${RTOS}) + + # Board target + add_board_target(board_${BOARD}) + + #---------- Port Specific ---------- + # These files are built for each example since it depends on example's tusb_config.h + target_sources(${TARGET} PUBLIC + # BSP + ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c + ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c + ) + target_include_directories(${TARGET} PUBLIC + # family, hw, board + ${CMAKE_CURRENT_FUNCTION_LIST_DIR} + ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../ + ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD} + ) + + # Add TinyUSB target and port source + family_add_tinyusb(${TARGET} OPT_MCU_LPC11UXX ${RTOS}) + target_sources(${TARGET}-tinyusb PUBLIC + ${TOP}/src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c + ) + target_link_libraries(${TARGET}-tinyusb PUBLIC board_${BOARD}) + + # Link dependencies + target_link_libraries(${TARGET} PUBLIC board_${BOARD} ${TARGET}-tinyusb) + + # Flashing + family_flash_jlink(${TARGET}) + #family_flash_nxplink(${TARGET}) +endfunction() diff --git a/hw/bsp/lpc11/family.mk b/hw/bsp/lpc11/family.mk index ce07ff450..09713fd55 100644 --- a/hw/bsp/lpc11/family.mk +++ b/hw/bsp/lpc11/family.mk @@ -1,5 +1,3 @@ -DEPS_SUBMODULES += hw/mcu/nxp/lpcopen - MCU_DIR = hw/mcu/nxp/lpcopen/lpc$(MCU)/lpc_chip_$(MCU) include $(TOP)/$(BOARD_PATH)/board.mk CPU_CORE ?= cortex-m0plus @@ -34,7 +32,8 @@ SRC_C += \ endif INC += \ - $(TOP)/$(MCU_DIR)/inc + $(TOP)/$(BOARD_PATH) \ + $(TOP)/$(MCU_DIR)/inc \ # For flash-jlink target JLINK_DEVICE = LPC11U68 diff --git a/src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c b/src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c index 022904a3a..6bb440743 100644 --- a/src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c +++ b/src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c @@ -42,7 +42,17 @@ #if TU_CHECK_MCU(OPT_MCU_LPC11UXX, OPT_MCU_LPC13XX, OPT_MCU_LPC15XX) // LPCOpen + #ifdef __GNUC__ + #pragma GCC diagnostic push + #pragma GCC diagnostic ignored "-Wunused-parameter" + #endif + #include "chip.h" + + #ifdef __GNUC__ + #pragma GCC diagnostic pop + #endif + #else // SDK #include "fsl_device_registers.h" |
