style changes

1 files changed, 43 insertions, 62 deletions

diff --git a/src/device/usbd_control.c b/src/device/usbd_control.c
index ea18b28da..35cce1f7e 100644
--- a/src/device/usbd_control.c
+++ b/src/device/usbd_control.c
@@ -35,9 +35,9 @@
 //--------------------------------------------------------------------+
 // Callback weak stubs (called if application does not provide)
 //--------------------------------------------------------------------+
-TU_ATTR_WEAK void dcd_edpt0_status_complete(uint8_t rhport, tusb_control_request_t const * request) {
-  (void)rhport;
-  (void)request;
+TU_ATTR_WEAK void dcd_edpt0_status_complete(uint8_t rhport, tusb_control_request_t const* request) {
+  (void) rhport;
+  (void) request;
 }
 
 //--------------------------------------------------------------------+
@@ -50,7 +50,7 @@ extern void usbd_driver_print_control_complete_name(usbd_control_xfer_cb_t callb
 
 enum {
   EDPT_CTRL_OUT = 0x00,
-  EDPT_CTRL_IN  = 0x80
+  EDPT_CTRL_IN = 0x80
 };
 
 typedef struct {
@@ -71,20 +71,18 @@ tu_static uint8_t _usbd_ctrl_buf[CFG_TUD_ENDPOINT0_SIZE];
 //--------------------------------------------------------------------+
 
 // Queue ZLP status transaction
-static inline bool _status_stage_xact(uint8_t rhport, tusb_control_request_t const * request)
-{
+static inline bool _status_stage_xact(uint8_t rhport, tusb_control_request_t const* request) {
   // Opposite to endpoint in Data Phase
   uint8_t const ep_addr = request->bmRequestType_bit.direction ? EDPT_CTRL_OUT : EDPT_CTRL_IN;
   return usbd_edpt_xfer(rhport, ep_addr, NULL, 0);
 }
 
 // Status phase
-bool tud_control_status(uint8_t rhport, tusb_control_request_t const * request)
-{
-  _ctrl_xfer.request       = (*request);
-  _ctrl_xfer.buffer        = NULL;
+bool tud_control_status(uint8_t rhport, tusb_control_request_t const* request) {
+  _ctrl_xfer.request = (*request);
+  _ctrl_xfer.buffer = NULL;
   _ctrl_xfer.total_xferred = 0;
-  _ctrl_xfer.data_len      = 0;
+  _ctrl_xfer.data_len = 0;
 
   return _status_stage_xact(rhport, request);
 }
@@ -92,16 +90,15 @@ bool tud_control_status(uint8_t rhport, tusb_control_request_t const * request)
 // Queue a transaction in Data Stage
 // Each transaction has up to Endpoint0's max packet size.
 // This function can also transfer an zero-length packet
-static bool _data_stage_xact(uint8_t rhport)
-{
-  uint16_t const xact_len = tu_min16(_ctrl_xfer.data_len - _ctrl_xfer.total_xferred, CFG_TUD_ENDPOINT0_SIZE);
+static bool _data_stage_xact(uint8_t rhport) {
+  uint16_t const xact_len = tu_min16(_ctrl_xfer.data_len - _ctrl_xfer.total_xferred,
+                                     CFG_TUD_ENDPOINT0_SIZE);
 
   uint8_t ep_addr = EDPT_CTRL_OUT;
 
-  if ( _ctrl_xfer.request.bmRequestType_bit.direction == TUSB_DIR_IN )
-  {
+  if (_ctrl_xfer.request.bmRequestType_bit.direction == TUSB_DIR_IN) {
     ep_addr = EDPT_CTRL_IN;
-    if ( xact_len ) {
+    if (xact_len) {
       TU_VERIFY(0 == tu_memcpy_s(_usbd_ctrl_buf, CFG_TUD_ENDPOINT0_SIZE, _ctrl_xfer.buffer, xact_len));
     }
   }
@@ -111,29 +108,24 @@ static bool _data_stage_xact(uint8_t rhport)
 
 // Transmit data to/from the control endpoint.
 // If the request's wLength is zero, a status packet is sent instead.
-bool tud_control_xfer(uint8_t rhport, tusb_control_request_t const * request, void* buffer, uint16_t len)
-{
-  _ctrl_xfer.request       = (*request);
-  _ctrl_xfer.buffer        = (uint8_t*) buffer;
+bool tud_control_xfer(uint8_t rhport, tusb_control_request_t const* request, void* buffer, uint16_t len) {
+  _ctrl_xfer.request = (*request);
+  _ctrl_xfer.buffer = (uint8_t*) buffer;
   _ctrl_xfer.total_xferred = 0U;
-  _ctrl_xfer.data_len      = tu_min16(len, request->wLength);
+  _ctrl_xfer.data_len = tu_min16(len, request->wLength);
 
-  if (request->wLength > 0U)
-  {
-    if(_ctrl_xfer.data_len > 0U)
-    {
+  if (request->wLength > 0U) {
+    if (_ctrl_xfer.data_len > 0U) {
       TU_ASSERT(buffer);
     }
 
 //    TU_LOG2("  Control total data length is %u bytes\r\n", _ctrl_xfer.data_len);
 
     // Data stage
-    TU_ASSERT( _data_stage_xact(rhport) );
-  }
-  else
-  {
+    TU_ASSERT(_data_stage_xact(rhport));
+  } else {
     // Status stage
-    TU_ASSERT( _status_stage_xact(rhport, request) );
+    TU_ASSERT(_status_stage_xact(rhport, request));
   }
 
   return true;
@@ -143,46 +135,41 @@ bool tud_control_xfer(uint8_t rhport, tusb_control_request_t const * request, vo
 // USBD API
 //--------------------------------------------------------------------+
 void usbd_control_reset(void);
-void usbd_control_set_request(tusb_control_request_t const *request);
-void usbd_control_set_complete_callback( usbd_control_xfer_cb_t fp );
-bool usbd_control_xfer_cb (uint8_t rhport, uint8_t ep_addr, xfer_result_t event, uint32_t xferred_bytes);
+void usbd_control_set_request(tusb_control_request_t const* request);
+void usbd_control_set_complete_callback(usbd_control_xfer_cb_t fp);
+bool usbd_control_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t event, uint32_t xferred_bytes);
 
 void usbd_control_reset(void) {
   tu_varclr(&_ctrl_xfer);
 }
 
 // Set complete callback
-void usbd_control_set_complete_callback( usbd_control_xfer_cb_t fp )
-{
+void usbd_control_set_complete_callback(usbd_control_xfer_cb_t fp) {
   _ctrl_xfer.complete_cb = fp;
 }
 
 // for dcd_set_address where DCD is responsible for status response
-void usbd_control_set_request(tusb_control_request_t const *request)
-{
-  _ctrl_xfer.request       = (*request);
-  _ctrl_xfer.buffer        = NULL;
+void usbd_control_set_request(tusb_control_request_t const* request) {
+  _ctrl_xfer.request = (*request);
+  _ctrl_xfer.buffer = NULL;
   _ctrl_xfer.total_xferred = 0;
-  _ctrl_xfer.data_len      = 0;
+  _ctrl_xfer.data_len = 0;
 }
 
 // callback when a transaction complete on
 // - DATA stage of control endpoint or
 // - Status stage
-bool usbd_control_xfer_cb (uint8_t rhport, uint8_t ep_addr, xfer_result_t result, uint32_t xferred_bytes)
-{
+bool usbd_control_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t result, uint32_t xferred_bytes) {
   (void) result;
 
   // Endpoint Address is opposite to direction bit, this is Status Stage complete event
-  if ( tu_edpt_dir(ep_addr) != _ctrl_xfer.request.bmRequestType_bit.direction )
-  {
+  if (tu_edpt_dir(ep_addr) != _ctrl_xfer.request.bmRequestType_bit.direction) {
     TU_ASSERT(0 == xferred_bytes);
 
     // invoke optional dcd hook if available
     dcd_edpt0_status_complete(rhport, &_ctrl_xfer.request);
 
-    if (_ctrl_xfer.complete_cb)
-    {
+    if (_ctrl_xfer.complete_cb) {
       // TODO refactor with usbd_driver_print_control_complete_name
       _ctrl_xfer.complete_cb(rhport, CONTROL_STAGE_ACK, &_ctrl_xfer.request);
     }
@@ -190,8 +177,7 @@ bool usbd_control_xfer_cb (uint8_t rhport, uint8_t ep_addr, xfer_result_t result
     return true;
   }
 
-  if ( _ctrl_xfer.request.bmRequestType_bit.direction == TUSB_DIR_OUT )
-  {
+  if (_ctrl_xfer.request.bmRequestType_bit.direction == TUSB_DIR_OUT) {
     TU_VERIFY(_ctrl_xfer.buffer);
     memcpy(_ctrl_xfer.buffer, _usbd_ctrl_buf, xferred_bytes);
     TU_LOG_MEM(CFG_TUD_LOG_LEVEL, _usbd_ctrl_buf, xferred_bytes, 2);
@@ -202,15 +188,14 @@ bool usbd_control_xfer_cb (uint8_t rhport, uint8_t ep_addr, xfer_result_t result
 
   // Data Stage is complete when all request's length are transferred or
   // a short packet is sent including zero-length packet.
-  if ( (_ctrl_xfer.request.wLength == _ctrl_xfer.total_xferred) || (xferred_bytes < CFG_TUD_ENDPOINT0_SIZE) )
-  {
+  if ((_ctrl_xfer.request.wLength == _ctrl_xfer.total_xferred) ||
+      (xferred_bytes < CFG_TUD_ENDPOINT0_SIZE)) {
     // DATA stage is complete
     bool is_ok = true;
 
     // invoke complete callback if set
     // callback can still stall control in status phase e.g out data does not make sense
-    if ( _ctrl_xfer.complete_cb )
-    {
+    if (_ctrl_xfer.complete_cb) {
       #if CFG_TUSB_DEBUG >= CFG_TUD_LOG_LEVEL
       usbd_driver_print_control_complete_name(_ctrl_xfer.complete_cb);
       #endif
@@ -218,21 +203,17 @@ bool usbd_control_xfer_cb (uint8_t rhport, uint8_t ep_addr, xfer_result_t result
       is_ok = _ctrl_xfer.complete_cb(rhport, CONTROL_STAGE_DATA, &_ctrl_xfer.request);
     }
 
-    if ( is_ok )
-    {
+    if (is_ok) {
       // Send status
-      TU_ASSERT( _status_stage_xact(rhport, &_ctrl_xfer.request) );
-    }else
-    {
+      TU_ASSERT(_status_stage_xact(rhport, &_ctrl_xfer.request));
+    } else {
       // Stall both IN and OUT control endpoint
       dcd_edpt_stall(rhport, EDPT_CTRL_OUT);
       dcd_edpt_stall(rhport, EDPT_CTRL_IN);
     }
-  }
-  else
-  {
+  } else {
     // More data to transfer
-    TU_ASSERT( _data_stage_xact(rhport) );
+    TU_ASSERT(_data_stage_xact(rhport));
   }
 
   return true;