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authorHa Thach <[email protected]>2025-10-30 16:30:00 +0700
committerGitHub <[email protected]>2025-10-30 16:30:00 +0700
commitfc3857eb1abefff3cf19816e231e549bf75b9dc3 (patch)
tree2f04e0a02780d1112042bee90a2f4e3ebd928d92 /src/portable
parent813eba22c146f85c924717c458b20bd3d9d5d3b0 (diff)
parent3f1f7140c4ad1991c8c1bf73a0864414da68a40d (diff)
Merge pull request #3294 from hathach/add-ohci-lpc55
try to enable ohci for lpc55 but not working, probably clock issue
Diffstat (limited to 'src/portable')
-rw-r--r--src/portable/ohci/ohci.c11
-rw-r--r--src/portable/ohci/ohci.h49
-rw-r--r--src/portable/ohci/ohci_nxp.h (renamed from src/portable/nxp/lpc17_40/hcd_lpc17_40.c)48
3 files changed, 67 insertions, 41 deletions
diff --git a/src/portable/ohci/ohci.c b/src/portable/ohci/ohci.c
index f1689b5b4..a12f7d6ed 100644
--- a/src/portable/ohci/ohci.c
+++ b/src/portable/ohci/ohci.c
@@ -41,13 +41,16 @@
#include "host/usbh.h"
#include "ohci.h"
-// TODO remove
-#include "chip.h"
+#if defined(TUP_USBIP_OHCI_NXP)
+ #include "ohci_nxp.h"
+#else
+ #error Unsupported OHCI IP
+#endif
//--------------------------------------------------------------------+
// MACRO CONSTANT TYPEDEF
//--------------------------------------------------------------------+
-#define OHCI_REG ((ohci_registers_t *) LPC_USB_BASE)
+
enum {
OHCI_CONTROL_FUNCSTATE_RESET = 0,
@@ -181,6 +184,8 @@ bool hcd_init(uint8_t rhport, const tusb_rhport_init_t* rh_init) {
(void) rhport;
(void) rh_init;
+ ohci_phy_init(rhport);
+
//------------- Data Structure init -------------//
tu_memclr(&ohci_data, sizeof(ohci_data_t));
for(uint8_t i=0; i<32; i++)
diff --git a/src/portable/ohci/ohci.h b/src/portable/ohci/ohci.h
index 3366f15f7..38cc84858 100644
--- a/src/portable/ohci/ohci.h
+++ b/src/portable/ohci/ohci.h
@@ -192,10 +192,10 @@ typedef struct TU_ATTR_ALIGNED(256) {
//--------------------------------------------------------------------+
typedef volatile struct
{
- uint32_t revision;
+ uint32_t revision; // 0x00
union {
- uint32_t control;
+ uint32_t control; // 0x04
struct {
uint32_t control_bulk_service_ratio : 2;
uint32_t periodic_list_enable : 1;
@@ -211,7 +211,7 @@ typedef volatile struct
};
union {
- uint32_t command_status;
+ uint32_t command_status; // 0x08
struct {
uint32_t controller_reset : 1;
uint32_t control_list_filled : 1;
@@ -222,26 +222,24 @@ typedef volatile struct
}command_status_bit;
};
- uint32_t interrupt_status;
- uint32_t interrupt_enable;
- uint32_t interrupt_disable;
-
- uint32_t hcca;
- uint32_t period_current_ed;
- uint32_t control_head_ed;
- uint32_t control_current_ed;
- uint32_t bulk_head_ed;
- uint32_t bulk_current_ed;
- uint32_t done_head;
-
- uint32_t frame_interval;
- uint32_t frame_remaining;
- uint32_t frame_number;
- uint32_t periodic_start;
- uint32_t lowspeed_threshold;
+ uint32_t interrupt_status; // 0x0C
+ uint32_t interrupt_enable; // 0x10
+ uint32_t interrupt_disable; // 0x14
+ uint32_t hcca; // 0x18
+ uint32_t period_current_ed; // 0x1C
+ uint32_t control_head_ed; // 0x20
+ uint32_t control_current_ed; // 0x24
+ uint32_t bulk_head_ed; // 0x28
+ uint32_t bulk_current_ed; // 0x2C
+ uint32_t done_head; // 0x30
+ uint32_t frame_interval; // 0x34
+ uint32_t frame_remaining; // 0x38
+ uint32_t frame_number; // 0x3C
+ uint32_t periodic_start; // 0x40
+ uint32_t lowspeed_threshold; // 0x44
union {
- uint32_t rh_descriptorA;
+ uint32_t rh_descriptorA; // 0x48
struct {
uint32_t number_downstream_ports : 8;
uint32_t power_switching_mode : 1;
@@ -255,7 +253,7 @@ typedef volatile struct
};
union {
- uint32_t rh_descriptorB;
+ uint32_t rh_descriptorB; // 0x4C
struct {
uint32_t device_removable : 16;
uint32_t port_power_control_mask : 16;
@@ -263,9 +261,9 @@ typedef volatile struct
};
union {
- uint32_t rh_status;
+ uint32_t rh_status; // 0x50
struct {
- uint32_t local_power_status : 1; // read Local Power Status; write: Clear Global Power
+ uint32_t local_power_status : 1; // read Local Power Status; write: Clear Global Power
uint32_t over_current_indicator : 1;
uint32_t : 13;
uint32_t device_remote_wakeup_enable : 1;
@@ -277,7 +275,8 @@ typedef volatile struct
};
union {
- uint32_t rhport_status[TUP_OHCI_RHPORTS];
+ uint32_t rhport_status[TUP_OHCI_RHPORTS]; // 0x54
+
struct {
uint32_t current_connect_status : 1;
uint32_t port_enable_status : 1;
diff --git a/src/portable/nxp/lpc17_40/hcd_lpc17_40.c b/src/portable/ohci/ohci_nxp.h
index fea3e2a66..9cba05e95 100644
--- a/src/portable/nxp/lpc17_40/hcd_lpc17_40.c
+++ b/src/portable/ohci/ohci_nxp.h
@@ -1,7 +1,7 @@
/*
* The MIT License (MIT)
*
- * Copyright (c) 2019, Ha Thach (tinyusb.org)
+ * Copyright (c) 2025 Ha Thach (tinyusb.org)
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
@@ -23,26 +23,48 @@
*
* This file is part of the TinyUSB stack.
*/
+#ifndef TUSB_OHCI_NXP_H
+#define TUSB_OHCI_NXP_H
-#include "tusb_option.h"
-
-#if CFG_TUH_ENABLED && \
- (CFG_TUSB_MCU == OPT_MCU_LPC175X_6X || CFG_TUSB_MCU == OPT_MCU_LPC177X_8X || CFG_TUSB_MCU == OPT_MCU_LPC40XX)
+#if TU_CHECK_MCU(OPT_MCU_LPC175X_6X, OPT_MCU_LPC177X_8X, OPT_MCU_LPC40XX)
#include "chip.h"
-#include "host/hcd.h"
-#include "host/usbh.h"
+#define OHCI_REG ((ohci_registers_t *) LPC_USB_BASE)
-void hcd_int_enable(uint8_t rhport)
-{
- (void) rhport;
+void hcd_int_enable(uint8_t rhport) {
+ (void)rhport;
NVIC_EnableIRQ(USB_IRQn);
}
-void hcd_int_disable(uint8_t rhport)
-{
- (void) rhport;
+void hcd_int_disable(uint8_t rhport) {
+ (void)rhport;
NVIC_DisableIRQ(USB_IRQn);
}
+static void ohci_phy_init(uint8_t rhport) {
+ (void) rhport;
+}
+
+#else
+
+#include "fsl_device_registers.h"
+
+// for LPC55 USB0 controller
+#define OHCI_REG ((ohci_registers_t *) USBFSH_BASE)
+
+static void ohci_phy_init(uint8_t rhport) {
+ (void) rhport;
+}
+
+void hcd_int_enable(uint8_t rhport) {
+ (void)rhport;
+ NVIC_EnableIRQ(USB0_IRQn);
+}
+
+void hcd_int_disable(uint8_t rhport) {
+ (void)rhport;
+ NVIC_DisableIRQ(USB0_IRQn);
+}
+#endif
+
#endif