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authorhathach <[email protected]>2023-07-07 16:24:22 +0700
committerhathach <[email protected]>2023-07-07 16:24:22 +0700
commit88478a9d052edc364561da39382faef72f937ecb (patch)
tree05fa8d9e326140c26c10aa3e974bae10e615d8da /src
parente0f1ba8b0e9cf46fabcddc72a61d5515df424edf (diff)
add PORT selection for makefile
Diffstat (limited to 'src')
-rw-r--r--src/portable/renesas/rusb2/dcd_rusb2.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/src/portable/renesas/rusb2/dcd_rusb2.c b/src/portable/renesas/rusb2/dcd_rusb2.c
index 3d3e52bfa..17d22f696 100644
--- a/src/portable/renesas/rusb2/dcd_rusb2.c
+++ b/src/portable/renesas/rusb2/dcd_rusb2.c
@@ -216,6 +216,7 @@ static void pipe_write_packet(rusb2_reg_t * rusb, void *buf, volatile void *fifo
// Highspeed FIFO is 32-bit
if ( is_highspeed_regbase(rusb) ) {
+ // TODO 32-bit access for better performance
ff16 = (volatile uint16_t*) ((uintptr_t) fifo+2);
ff8 = (volatile uint8_t *) ((uintptr_t) fifo+3);
}else {
@@ -241,6 +242,9 @@ static void pipe_write_packet(rusb2_reg_t * rusb, void *buf, volatile void *fifo
static void pipe_read_packet(rusb2_reg_t * rusb, void *buf, volatile void *fifo, unsigned len)
{
(void) rusb;
+
+ // TODO 16/32-bit access for better performance
+
uint8_t *p = (uint8_t*)buf;
volatile uint8_t *reg = (volatile uint8_t*)fifo; /* byte access is always at base register address */
while (len--) *p++ = *reg;