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2025-10-06remove dcd_esp32sx which is replaced by dwc2hathach
2024-10-14change dcd_init() return from void to boolhathach
2024-10-14change the tusb_rhport_init_t struct, exclude the rhport to make API more ↵hathach
consistent
2024-10-11change dcd_init() to take rhport structhathach
2024-08-29Fix ESP32-SX resumeScott Shawcroft
The interrupt handler pipes through the resume event but the interrupt wasn't enabled in the first place.
2024-05-29fix xtensa_api.h includehathach
2024-03-20Tweaks for ESP-IDF 5.2.1Scott Shawcroft
2023-03-17fix trailing space and new linehathach
temporarily disable codespell
2022-12-04Fix typosBastien Nocera
2022-10-18esp: Fix Isochronous transfersTomas Rezucha
On ESP32-S2/S3 ISO transfers must be configured for even or odd frame. Closes https://github.com/hathach/tinyusb/issues/1382
2022-03-07added dcd_sof_enable() stubs for all other portshathach
2022-03-04fix build with esp32s2, also use dwc2 for esp examplehathach
2022-02-25rename TUSB_OPT_DEVICE_ENABLED to CFG_TUD_ENABLEDhathach
TUSB_OPT_DEVICE_ENABLED still usable for backward compatible
2021-10-25update dcd_esp32sx with correct include listsuda-morris
2021-10-24remove ep descriptor wMaxPacketSize bitfield due to endian issuehathach
2021-09-13esp32sx implement dcd_remote_wakeup(), fully compliance to chapter9 test suitehathach
2021-09-13implement dcd_edpt_close_all(), pass chapter9 test suite (without remote wakeup)hathach
2021-08-26add dcd_edpt_close_all() for clear existing configured statehathach
correctly responded to TD 9.13 Set Configuration Test
2021-05-27clean up tusb_fifo.h includehathach
2021-05-10minor clean uphathach
2021-04-16tinyusb: add support of esp32s3 targetAlex Lisitsyn
add support of new esp32s3 target and the board update the roles.mk wrapper to allow dfu flashing of espressif chip update examples to allow compilation for esp32s3_addax_1 board once the code is tested the PR to original tinyusb repo will be submitted
2021-04-06revert dcd_edpt_xfer_fifo() implementation for esp32s2hathach
2021-03-23Fix bug in writing to constant src/dst address.Reinhard Panhuber
Copying has to be conduct in full words (at least for STM32). Renamed copy function to tu_fifo_write_n_const_addr_full_words()
2021-03-02Change copy modes for new read/write functions in tusb_fifo.cReinhard Panhuber
2021-03-02Rename dcd_edpt_iso_xfer() to dcd_edpt_xfer_fifo()Reinhard Panhuber
2021-02-14Change FIFO use indication to ff == NULL to avoid future errors.Reinhard Panhuber
This way people don't need to pay attention for the buffer pointer
2021-02-13Implement dcd_edpt_iso_xfer() for dcd_esp32s2.cReinhard Panhuber
2021-01-08use dcd_event_bus_reset() with speed to replace bus_signalhathach
2020-11-27fix cihathach
2020-11-27add bus suspend & resume support for esp32s2hathach
2020-08-01enable pull-up in dcd_init() instead of usbdhathach
2020-07-29fix strict prototypehathach
2020-07-28Merge pull request #454 from me-no-dev/esp32-s2-fifosHa Thach
ESP32-S2: Handle the fact that available EP IN FIFOs are less than the number of available EP INs
2020-07-28Update dcd_esp32s2.cme-no-dev
2020-07-02ESP32-S2: Detect EP IN Xfer Timeoutme-no-dev
In some rare ocasions (bad cable, noise, etc.) data transfer might timeout and hang the endpoint, unless the interrupt flag is cleared. This pull request targets to solve that case.
2020-07-01ESP32-S2: Handle the fact that available EP IN FIFOs are less than the ↵me-no-dev
number of available EP INs ESP32-S2 has only 5 available endpoint-in FIFOs (including EP0) but 7 available EP IN numbers. This change decouples the fifo number from the endpoint number, providing FIFO numbers until they reach the limit, at which point it will return false and assert an error that too many endpoints were allocated.
2020-04-26sync synopsis fix for esp32s2hathach
2020-04-18session end interrupt doesn't trigger on esp32 saola boardhathach
it is possibly due to the board design without vbus sense. Revisit later.
2020-04-17complete remove dcd_set_config(), fix unit testhathach
2020-04-17mass rename tud/dcd_irq_handler to tud/dcd_init_handlerhathach
2020-04-16cleanup for esp32hathach
2020-04-11fix incorrect setup packethathach
also increase usbd stack in example when debug is enabled
2020-04-10remove CONFIG_IDF_TARGET_ESP32S2BETA per reviewhathach
2020-04-10added comment note for beta chip walkaroundhathach
2020-04-10Correct dedicated FIFO SRAM size to 1024hathach
add note for up to 5 active IN endpoints (including EP0 IN)
2020-04-10remove 100us delay at the end of dcd_init()hathach
2020-04-10revert name to dcd_int_handler due to function prototype warninghathach
2020-04-10clear USB_RXFLVI_M before read_rx_fifo()hathach
more format clean up
2020-04-10change indent from 4 -> 2 spaceshathach
2020-04-10rename dcd_init_handler to dcd_irq_handler to consistent with other portshathach