| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2025-10-06 | remove dcd_esp32sx which is replaced by dwc2 | hathach | |
| 2024-10-14 | change dcd_init() return from void to bool | hathach | |
| 2024-10-14 | change the tusb_rhport_init_t struct, exclude the rhport to make API more ↵ | hathach | |
| consistent | |||
| 2024-10-11 | change dcd_init() to take rhport struct | hathach | |
| 2024-08-29 | Fix ESP32-SX resume | Scott Shawcroft | |
| The interrupt handler pipes through the resume event but the interrupt wasn't enabled in the first place. | |||
| 2024-05-29 | fix xtensa_api.h include | hathach | |
| 2024-03-20 | Tweaks for ESP-IDF 5.2.1 | Scott Shawcroft | |
| 2023-03-17 | fix trailing space and new line | hathach | |
| temporarily disable codespell | |||
| 2022-12-04 | Fix typos | Bastien Nocera | |
| 2022-10-18 | esp: Fix Isochronous transfers | Tomas Rezucha | |
| On ESP32-S2/S3 ISO transfers must be configured for even or odd frame. Closes https://github.com/hathach/tinyusb/issues/1382 | |||
| 2022-03-07 | added dcd_sof_enable() stubs for all other ports | hathach | |
| 2022-03-04 | fix build with esp32s2, also use dwc2 for esp example | hathach | |
| 2022-02-25 | rename TUSB_OPT_DEVICE_ENABLED to CFG_TUD_ENABLED | hathach | |
| TUSB_OPT_DEVICE_ENABLED still usable for backward compatible | |||
| 2021-10-25 | update dcd_esp32sx with correct include list | suda-morris | |
| 2021-10-24 | remove ep descriptor wMaxPacketSize bitfield due to endian issue | hathach | |
| 2021-09-13 | esp32sx implement dcd_remote_wakeup(), fully compliance to chapter9 test suite | hathach | |
| 2021-09-13 | implement dcd_edpt_close_all(), pass chapter9 test suite (without remote wakeup) | hathach | |
| 2021-08-26 | add dcd_edpt_close_all() for clear existing configured state | hathach | |
| correctly responded to TD 9.13 Set Configuration Test | |||
| 2021-05-27 | clean up tusb_fifo.h include | hathach | |
| 2021-05-10 | minor clean up | hathach | |
| 2021-04-16 | tinyusb: add support of esp32s3 target | Alex Lisitsyn | |
| add support of new esp32s3 target and the board update the roles.mk wrapper to allow dfu flashing of espressif chip update examples to allow compilation for esp32s3_addax_1 board once the code is tested the PR to original tinyusb repo will be submitted | |||
| 2021-04-06 | revert dcd_edpt_xfer_fifo() implementation for esp32s2 | hathach | |
| 2021-03-23 | Fix bug in writing to constant src/dst address. | Reinhard Panhuber | |
| Copying has to be conduct in full words (at least for STM32). Renamed copy function to tu_fifo_write_n_const_addr_full_words() | |||
| 2021-03-02 | Change copy modes for new read/write functions in tusb_fifo.c | Reinhard Panhuber | |
| 2021-03-02 | Rename dcd_edpt_iso_xfer() to dcd_edpt_xfer_fifo() | Reinhard Panhuber | |
| 2021-02-14 | Change FIFO use indication to ff == NULL to avoid future errors. | Reinhard Panhuber | |
| This way people don't need to pay attention for the buffer pointer | |||
| 2021-02-13 | Implement dcd_edpt_iso_xfer() for dcd_esp32s2.c | Reinhard Panhuber | |
| 2021-01-08 | use dcd_event_bus_reset() with speed to replace bus_signal | hathach | |
| 2020-11-27 | fix ci | hathach | |
| 2020-11-27 | add bus suspend & resume support for esp32s2 | hathach | |
| 2020-08-01 | enable pull-up in dcd_init() instead of usbd | hathach | |
| 2020-07-29 | fix strict prototype | hathach | |
| 2020-07-28 | Merge pull request #454 from me-no-dev/esp32-s2-fifos | Ha Thach | |
| ESP32-S2: Handle the fact that available EP IN FIFOs are less than the number of available EP INs | |||
| 2020-07-28 | Update dcd_esp32s2.c | me-no-dev | |
| 2020-07-02 | ESP32-S2: Detect EP IN Xfer Timeout | me-no-dev | |
| In some rare ocasions (bad cable, noise, etc.) data transfer might timeout and hang the endpoint, unless the interrupt flag is cleared. This pull request targets to solve that case. | |||
| 2020-07-01 | ESP32-S2: Handle the fact that available EP IN FIFOs are less than the ↵ | me-no-dev | |
| number of available EP INs ESP32-S2 has only 5 available endpoint-in FIFOs (including EP0) but 7 available EP IN numbers. This change decouples the fifo number from the endpoint number, providing FIFO numbers until they reach the limit, at which point it will return false and assert an error that too many endpoints were allocated. | |||
| 2020-04-26 | sync synopsis fix for esp32s2 | hathach | |
| 2020-04-18 | session end interrupt doesn't trigger on esp32 saola board | hathach | |
| it is possibly due to the board design without vbus sense. Revisit later. | |||
| 2020-04-17 | complete remove dcd_set_config(), fix unit test | hathach | |
| 2020-04-17 | mass rename tud/dcd_irq_handler to tud/dcd_init_handler | hathach | |
| 2020-04-16 | cleanup for esp32 | hathach | |
| 2020-04-11 | fix incorrect setup packet | hathach | |
| also increase usbd stack in example when debug is enabled | |||
| 2020-04-10 | remove CONFIG_IDF_TARGET_ESP32S2BETA per review | hathach | |
| 2020-04-10 | added comment note for beta chip walkaround | hathach | |
| 2020-04-10 | Correct dedicated FIFO SRAM size to 1024 | hathach | |
| add note for up to 5 active IN endpoints (including EP0 IN) | |||
| 2020-04-10 | remove 100us delay at the end of dcd_init() | hathach | |
| 2020-04-10 | revert name to dcd_int_handler due to function prototype warning | hathach | |
| 2020-04-10 | clear USB_RXFLVI_M before read_rx_fifo() | hathach | |
| more format clean up | |||
| 2020-04-10 | change indent from 4 -> 2 spaces | hathach | |
| 2020-04-10 | rename dcd_init_handler to dcd_irq_handler to consistent with other ports | hathach | |
