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path: root/src/portable/renesas/rusb2/dcd_rusb2.c
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2026-07-13rusb2: EP0 OUT reliability, HS UTMI PHY power-up, FS-only build supporthathach
- EP0 OUT: park a back-to-back data-stage packet the DCP accepted before PID could go NAK and deliver it into the next armed chunk; flow-control the single-buffer control pipe between chunks (usbtest ctrl_out corruption); discard a packet parked while an OUT pipe was halted so BOT reset recovery's fresh CBW read can't receive stale WRITE data - HS UTMI PHY power-up per the FSP sequence, shared by dcd/hcd: CLKSEL programmed from the board XTAL (EK-RA8M1 runs 20 MHz; the 24 MHz reset default never locks) while DIRPD holds the PHY down, then timed release - hw/bsp(ra8m1_ek): fix U60CK divider macro - BSP_CFG_U60CK_DIV used the generic USB_CLOCK_DIV_8 encoding (7), which USB60CKDIVCR rejects, leaving the USBHS link domain at 480 MHz; the USB60-specific BSP_CLOCKS_USB60_CLOCK_DIV_8 (4) sticks and yields the required 60 MHz from PLL1P - support FS-only builds on the high-speed port: gate SYSCFG.HSE on TUD_OPT_HIGH_SPEED (RHPORT_DEVICE_SPEED=OPT_MODE_FULL_SPEED was a silent no-op) and always compile both hwfifo access widths - the FIFO width belongs to the module, not the link speed (FS builds corrupted odd-length tails: 16-bit access against MBW-32) - iso activate: reset stale pipe bookkeeping so a BRDY firing before the class re-arms can't replay a pre-SET_INTERFACE transfer; write PIPEBUF after PIPESEL selects the pipe (PIPESEL-windowed register) - clear-halt: re-assert BUF on a still-armed OUT pipe (usbtest case 29) - bound the D0FIFO ready spin so an undrained double-buffered IN pipe can't freeze the stack with the IRQ masked - usbtest example: cap interrupt mps at 64 on RUSB2 high speed (pipes 6-9 have a fixed 64-byte buffer, RA6M5 UM 29.1) Verified: usbtest 30/30 on ra6m5_ek (HS), ra4m1_ek (FS) and ra8m1_ek (FS-forced build on the HS port). Co-Authored-By: Claude Fable 5 <[email protected]> Claude-Session: https://claude.ai/code/session_01HeF2gZ1M7GWkz6Av4BpKPg
2026-07-09dcd(rusb2): iso alloc/activate; bound the FIFO-ready waithathach
An unpolled full iso-IN pipe keeps FRDY low forever and froze the stack with IRQs masked; bound the spin and abort the FIFO access. Co-Authored-By: Claude Fable 5 <[email protected]> Claude-Session: https://claude.ai/code/session_01HeF2gZ1M7GWkz6Av4BpKPg
2026-07-02license: use SPDX identifiers for src/ headers (#3749)Ha Thach
* license: use SPDX identifiers for src/ headers Replace the full ~20-line MIT license boilerplate on every src/ file with a two-line SPDX tag (SPDX-FileCopyrightText + SPDX-License-Identifier), following the REUSE convention used by CircuitPython and the Linux kernel. Removes ~3500 lines of duplicated boilerplate.
2026-04-17fix some Wconversion warningshathach
2026-01-04update hcd rusb2 to use tu_hwfifo read/writehathach
2026-01-03rusb2 move tu_hwfifo_write() to rusb2_common.chathach
2026-01-03hwfifo support custom write/readhathach
rusb use custom write enable all hil test for ra4m1
2026-01-01rusb2 use tu_hwfifo API to write usb packethathach
2026-01-01minor refactorhathach
2025-12-11dcd/rusb2: fix fifo writeHiFiPhile
Signed-off-by: HiFiPhile <[email protected]>
2025-11-26change tu_fifo_buffer_info_t layouthathach
2025-11-19Merge remote-tracking branch 'tinyusb/master' into ↵HiFiPhile
copilot/fix-dcd-edpt-xfer-issue Signed-off-by: HiFiPhile <[email protected]>
2025-11-17make TUP_DCD_EDPT_ISO_ALLOC i.e dcd_edpt_iso_alloc()/dcd_edpt_iso_activate() ↵hathach
as default driver implementation. dcd_edpt_close() is deprecated and will be removed from all driver in the future.
2025-10-22Apply suggestions from code reviewZixun LI
Co-authored-by: Copilot <[email protected]>
2025-10-22Add is_isr parameter to dcd_edpt_xfer and dcd_edpt_xfer_fifocopilot-swe-agent[bot]
Co-authored-by: HiFiPhile <[email protected]>
2024-10-14change dcd_init() return from void to boolhathach
2024-10-14change the tusb_rhport_init_t struct, exclude the rhport to make API more ↵hathach
consistent
2024-10-11change dcd_init() to take rhport structhathach
2024-05-27renesas: Add support for dcd_sof_enable().Andrew Leech
2024-04-15revert to use __builtin_ctz() for optimized timehathach
2024-04-11apply find_pipe() and forloop for hcdhathach
2024-04-10fix mask typo for brdysts when using pipe9hathach
2024-04-10support ra2a1 pipe numbering, fix ra2a1 ek led/button. Though usb not ↵hathach
enumerated yet, probably due to bsp/clock setup
2024-04-10use for loop instead of__builtin_ctz() which is not portable (e.g with ccrx)hathach
2024-04-10revert pr2245hathach
2023-09-08wait_pipe_fifo_empty() now returns bool (as expected using TU_ASSERT macro)maidnl
2023-09-08renesas: added wait function for IN transactionmaidnl
This fixes a problem found on MSD class where data read from from disks were sometimes partially overwritten by the status MSD message ("USBS..."). The function introduced wait for the hw fifo pipe to be empty, that prevent that new writing in the fife overwrite data which are not yet be transmitted by hw.
2023-08-01add rusb2_common.c for dynami irqhathach
2023-07-31enable USBMC for uno r4, add board_init_after_tusb() APIhathach
add BOARD_UPPERCASE for board detection
2023-07-31enable_irq since uno bootloader can disable it. systick triggered, however ↵hathach
usb still not work with uno
2023-07-28- revert usb addresshathach
- more clean up
2023-07-28fix cihathach
2023-07-26refactored multiple ports for hcd rusb2hathach
2023-07-26updating hcd rusb2hathach
- make osal_task_delay() as weak function in usbh - implement osal_task_delay() in hcd rusb2 (may moved to other places)
2023-07-07move check highspeed to rusb_rahathach
2023-07-07add PORT selection for makefilehathach
2023-07-07fully work with multiple ports without CFG_TUSB_RHPORT0/1hathach
2023-07-07use unaligned access read for hw fifohathach
2023-07-06fix build with rxhathach
2023-07-06more multiple ports updatehathach
2023-07-06add rusb2_module_start(), more update for multiple ports for dcd rusb2hathach
2023-07-05minor pipe clean uphathach
2023-07-05usb hs work with ra 6m5 ekhathach
2023-06-05renesas_rx: fix compilation on latest GCCMartino Facchin
__CCRX__ only applyes to version 4 of RX family compiler http://tool-support.renesas.com/autoupdate/support/onlinehelp/csp/V4.01.00/CS+.chm/Compiler-CCRX.chm/Output/ccrx04c0201y.html __RX__ is one of the macros exported by latest gcc (gcc_8.3.0.202305_rx_elf)
2023-05-17renesas: provide default for CFG_TUSB_RHPORT1_MODEMartino Facchin
Should fix CI failure for Renesas RX family
2023-05-03renesas: add fallback for targets not defining CFG_TUSB_RHPORT*_MODEMartino Facchin
2023-05-03renesas_ra: support RA2A1 (FS only)Martino Facchin
2023-05-03renesas_ra: add support for HS portMartino Facchin
2023-03-16rename symbolshathach
2023-03-16rename file link to rusb2hathach