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2026-07-09dcd(fsdev): don't disarm an armed endpoint on clear-halt toggle resethathach
Co-Authored-By: Claude Fable 5 <[email protected]> Claude-Session: https://claude.ai/code/session_01HeF2gZ1M7GWkz6Av4BpKPg
2026-07-02license: use SPDX identifiers for src/ headers (#3749)Ha Thach
* license: use SPDX identifiers for src/ headers Replace the full ~20-line MIT license boilerplate on every src/ file with a two-line SPDX tag (SPDX-FileCopyrightText + SPDX-License-Identifier), following the REUSE convention used by CircuitPython and the Linux kernel. Removes ~3500 lines of duplicated boilerplate.
2026-06-18dcd/stm32_fsdev: restore CH32 EP0 CONTROL type when stallinghathach
The CH32 workaround only restored EP0 to CONTROL in edpt_xfer(). When the stack rejects a control write with data (handle_ctr_setup having already switched EP0 to BULK) it stalls EP0 via dcd_edpt_stall() without ever calling dcd_edpt_xfer(), leaving EP0 typed BULK+STALL. As SETUP recognition is tied to CONTROL-typed endpoints, the host's recovery SETUP (which should auto-clear the stall) would be ignored, wedging EP0 until a bus reset. Restore CONTROL for EP0 in the same exclusive write that sets the STALL status. DFU download-in-wrong-state is a concrete trigger. Co-Authored-By: Claude Fable 5 <[email protected]>
2026-06-18dcd/stm32_fsdev: restore CH32 EP0 CONTROL type atomically with arminghathach
edpt_xfer() restored EP0 to CONTROL at the top of the function, before the OUT stage was armed (rx bufsize + STAT_RX=VALID written further down, with interrupts enabled in between). That re-enabled the CH32 blind OUT ACK while STAT_RX was still NAK and the buffer size stale, so a host-retried DATA OUT / status ZLP could be ACKed into the wrong buffer in the gap. Fold the CONTROL restore into the single exclusive write that programs STAT_RX=VALID for the OUT direction, after the buffer size is set, so type and arming go live together. The IN direction keeps the (now atomic) early restore, where no pending OUT exists to be blind-ACKed. Co-Authored-By: Claude Fable 5 <[email protected]>
2026-06-18dcd/stm32_fsdev: tidy CH32 EP0 setup parsing and whitespacehathach
Parse the setup packet via tusb_control_request_t instead of hand-rolled byte indexing; drop a stray blank line and fix indentation. No functional change. Co-Authored-By: Claude Fable 5 <[email protected]>
2026-06-18dcd/stm32_fsdev: make CH32 ep0_set_type read-modify-write atomichathach
ep0_set_type() read the EP0 register outside any critical section and only ep_write() masked the USB IRQ around the store. A USB interrupt landing between the read and the write (e.g. a new SETUP whose handler installs the BULK gate) was silently undone when the task resumed and wrote back its pre-interrupt snapshot with the type forced to CONTROL, re-exposing the unsolicited EP0 OUT ACK the workaround blocks. Bracket the whole read-modify-write with fsdev_int_disable/enable when called with need_exclusive (task context). ISR-context callers pass false and are unaffected (the ISR cannot preempt itself). Co-Authored-By: Claude Fable 5 <[email protected]>
2026-06-12Merge branch 'master' into ch32_fsdevHa Thach
2026-05-25optimize interrupt handling timeHiFiPhile
Signed-off-by: HiFiPhile <[email protected]>
2026-05-24dcd/stm32_fsdev: workaround CH32 EP0 premature OUT ACKHiFiPhile
Track EP0 control transfer state from SETUP (direction and wLength) and gate CH32 EP0 handshakes accordingly. Switch EP0 type away from control to bulk to block unsolicited OUT ACKs during control read/write gaps, then restore control type when EP0 transfer is explicitly armed. Signed-off-by: HiFiPhile <[email protected]>
2026-05-10add stm32c5 supportHiFiPHile
Signed-off-by: HiFiPHile <[email protected]>
2026-04-23Merge pull request #3590 from ↵Ha Thach
hathach/copilot/extract-hcd-pma-buffer-errata-workaround Refactor STM32 FSDEV PMA errata delay into shared static inline helper and apply to DCD/HCD with overridable timing
2026-04-17fix some Wconversion warningshathach
2026-04-10debloat the workaroundHiFiPhile
Signed-off-by: HiFiPhile <[email protected]>
2026-04-09Refactor STM32 FSDEV PMA errata delay into common helpercopilot-swe-agent[bot]
Agent-Logs-Url: https://github.com/hathach/tinyusb/sessions/3ec0d5b6-cb8e-48ff-8606-3371beb1efcb Co-authored-by: HiFiPhile <[email protected]>
2026-03-18fix bugs in fsdev hcd, dcd and midi host stream writehathach
- hcd_edpt_clear_stall: use ep_addr instead of hardcoded 0 (control endpoint) - hcd: add TUP_USBIP_FSDEV_DRD define for MCUs with host support (C0, G0, H5, U3, U5) and use it in hcd compile guard instead of enumerating MCUs - dcd_edpt_close_all: use FSDEV_EP_COUNT instead of CFG_TUD_ENDPPOINT_MAX for PMA btable offset to match handle_bus_reset - midi host tuh_midi_stream_write: add missing cable_num to system messages, SysEx, and real-time MIDI packets. Add 0xF mask for SysEx CIN checks. Aligns with midi_device.c tud_midi_n_stream_write implementation. Co-Authored-By: Claude Opus 4.6 (1M context) <[email protected]>
2026-03-16clean up fsdev symbolshathach
2026-03-16Unify USB FSDEV driver implementation for various microcontrollers. Replace ↵hathach
`FSDEV_BUS_32BIT` with `CFG_TUSB_FSDEV_32BIT`, adjust data/address stride macros, and refactor register/PMU access for consistency across platforms.
2026-03-16Consolidate USB FSDEV register definitions for STM32, CH32, and AT32 ↵hathach
microcontrollers. Replace vendor-specific macros with unified `U_`-prefixed equivalents, ensuring consistency and reducing duplication across all platforms.
2026-01-24Fix macro directive for FSDEV of CH32V20xMitsumine Suzu
2026-01-06rename FSDEV_PMA_SIZE CFG_TUSB_FSDEV_PMA_SIZEhathach
2026-01-03add default access mode for tu_hwfifo API make it easier for non-custom ↵hathach
read/write
2026-01-03add tu_hwfifo_access_t param to hwfifo APIhathach
2026-01-01change signature of tu_hwfifo_* to have hwfifo as first parameterhathach
2025-12-31replace PMA buffer packet read/write by using tu_hwfifo APIhathach
2025-12-31add separate tu_hwifo_*() with data from buffer/software fifo. Remove ↵hathach
duplicated packet write/read for fsdev
2025-12-31update tu_fifo to work with fsdev hwfifo with increased address 16/32bithathach
2025-11-27Remove redundant EP reg clearZixun LI
Signed-off-by: Zixun LI <[email protected]>
2025-11-27Add fsdev_deinitZixun LI
Signed-off-by: Zixun LI <[email protected]>
2025-11-27extract core resetZixun LI
Signed-off-by: Zixun LI <[email protected]>
2025-11-26Merge remote-tracking branch 'tinyusb/master' into hcd_fsdevZixun LI
2025-11-25fsdev: reorganize functionsHiFiPhile
Signed-off-by: HiFiPhile <[email protected]>
2025-11-25hcd: add fsdev driverHiFiPhile
Signed-off-by: HiFiPhile <[email protected]>
2025-11-23stm32_fsdev: Fix missed cases in single-buffered isochronous endpoint support.milek7
2025-10-22Apply suggestions from code reviewZixun LI
Co-authored-by: Copilot <[email protected]>
2025-10-22Add is_isr parameter to dcd_edpt_xfer and dcd_edpt_xfer_fifocopilot-swe-agent[bot]
Co-authored-by: HiFiPhile <[email protected]>
2025-09-29Fix warningMengsk
Signed-off-by: Mengsk <[email protected]>
2025-09-12Merge branch 'master' into sb-epHiFiPhile
2025-07-07support at32 mcuzhiqiang
2025-06-25stm32_fsdev: Allow configuring single-buffered isochronous endpoints.milek7
Controlled by the embedder defining CFG_TUD_FSDEV_DOUBLE_BUFFERED_ISO_EP in tusb_config.h. If hardware does have SBUF_ISO bit it will use only one half of endpoint pair register.
2024-11-27Add support for the STM32C0 and the NUCLEO-C071RB.David (Pololu)
2024-10-14change dcd_init() return from void to boolhathach
2024-10-14change the tusb_rhport_init_t struct, exclude the rhport to make API more ↵hathach
consistent
2024-10-11change dcd_init() to take rhport structhathach
2024-08-13Fix double buffer not disabled for smaller devices.HiFiPhile
2024-08-13Fix buf_id read for ISO transfer.HiFiPhile
2024-08-13Fix tusb_dir_t warning.HiFiPhile
2024-08-12fix more race with ch32v203 and setup when queuing zlp.hathach
improve hil test failed output
2024-08-08refactor read/write pma from/to fifohathach
2024-08-08revert the use of EP_KIND. ch32v203 seems to unconditionally accept ZLP on ↵hathach
EP0 OUT, which can incorrectly use queued_len of previous transfer. So reset total_len and queued_len to 0.
2024-08-08use EP_KIND for STATUS OUT to fix OUT packet is auto accepted after SETUP ↵hathach
without usbd consent