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path: root/src/portable/synopsys/dwc2/dwc2_info.py
AgeCommit message (Expand)Author
2026-04-10clean uphathach
2026-04-09rename ep_fifo_size (bytes) to otg_dfifo_depth (words)hathach
2026-03-28Add nrf54lm20 dwc2 infogab-k
2026-02-13add CFG_TUD_VBUS_SENSE, that could allow to skip tud_configure() for fixed vb...hathach
2025-12-01add linkermap to deps and linkermap tagethathach
2025-09-15add nrf54 to dwc2 infohathach
2025-09-03add at32f415 dwc2 infohathach
2025-08-07update at32f405 dwc2 info and phy width selectionhathach
2025-06-12Merge branch 'master' into fork/james-advatek/stm32n657nucleohathach
2025-06-11add h7rs to ci matrixhathach
2025-06-04chore: squash previous commits from other branchesJames Sandison
2025-01-24Add NUCLEO-H7S3L8 BSP.HiFiPhile
2024-11-11correctly test dwc2 dma device for s3, disable for p4 (cache issue) and f407 ...hathach
2024-10-28implement hcd_edpt_abort_xfer, hcd_device_close,hathach
2024-10-25more progress on dwc2 hcd, initial code for edpt xferhathach
2024-10-21add tusb_time_millis(), able to reset and enable dwc2 port and get SOF activehathach
2024-10-10add f407disco to hil poolhathach
2024-10-10improving dwc2, merging diep and doep if possiblehathach
2024-10-10enhance dwc2 markdown with field mappinghathach
2024-10-07Merge pull request #2809 from shuffle2/masterHa Thach
2024-09-30added p4, seems to work well and enumeratedhathach
2024-09-30update/rename ghwcfg registershathach
2024-09-30update to dwc2 register structhathach
2024-09-17make all python files executable and standardize interpreterShawn Hoffman
2023-11-22add spec version to dwc2 infohathach
2023-11-19Fix CIHiFiPhile
2023-11-19Add dwc2 info of F429.HiFiPhile
2023-10-30addd dwc2_info.py/md update stm32u5a5 board clock & power configure, able to ...hathach
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