Merge https://git.u-boot-project.org/u-boot/custodians/u-boot-riscv

CI: https://git.u-boot-project.org/u-boot/custodians/u-boot-riscv/-/pipelines/740

- some fixes
- Add Yao Zi as a reviewer

12 files changed, 27 insertions, 21 deletions

diff --git a/MAINTAINERS b/MAINTAINERS
index 53034b703df..87cd487c5f3 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1576,6 +1576,7 @@ F:	drivers/mtd/nand/raw/
 RISC-V
 M:	Tim Ouyang <[email protected]>
 M:	Leo Liang <[email protected]>
+R:	Yao Zi <[email protected]>
 S:	Maintained
 T:	git https://git.u-boot-project.org/u-boot/custodians/u-boot-riscv.git
 F:	arch/riscv/
diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index 485067ed266..0865620912c 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -378,7 +378,7 @@ config DMA_ADDR_T_64BIT
 	default y if 64BIT
 
 config RISCV_ACLINT
-	bool
+	bool "RISC-V ACLINT support"
 	depends on RISCV_MMODE
 	select REGMAP
 	select SYSCON
@@ -387,7 +387,7 @@ config RISCV_ACLINT
 	  associated with software and timer interrupts.
 
 config SPL_RISCV_ACLINT
-	bool
+	bool "RISC-V ACLINT support in SPL"
 	depends on SPL_RISCV_MMODE
 	select SPL_REGMAP
 	select SPL_SYSCON
diff --git a/arch/riscv/cpu/cpu.c b/arch/riscv/cpu/cpu.c
index bbadd0c9a46..3bec7c7cb6d 100644
--- a/arch/riscv/cpu/cpu.c
+++ b/arch/riscv/cpu/cpu.c
@@ -638,6 +638,9 @@ int riscv_cpu_setup(void)
 	const char *isa, **exts;
 	struct udevice *dev;
 
+	if (!CONFIG_IS_ENABLED(CPU))
+		return 0;
+
 	uclass_find_first_device(UCLASS_CPU, &dev);
 	if (!dev) {
 		debug("unable to find the RISC-V cpu device\n");
diff --git a/arch/riscv/dts/cv18xx.dtsi b/arch/riscv/dts/cv18xx.dtsi
index 6fac247e7ac..8530527aa39 100644
--- a/arch/riscv/dts/cv18xx.dtsi
+++ b/arch/riscv/dts/cv18xx.dtsi
@@ -205,7 +205,7 @@
 			status = "disabled";
 		};
 
-		spif: spi-nor@10000000 {
+		spif: spi@10000000 {
 			compatible = "sophgo,cv1800b-spif";
 			reg = <0x10000000 0x10000000>;
 			#address-cells = <1>;
diff --git a/arch/riscv/lib/cache.c b/arch/riscv/lib/cache.c
index 31aa30bc7d7..ac5136fa6be 100644
--- a/arch/riscv/lib/cache.c
+++ b/arch/riscv/lib/cache.c
@@ -149,8 +149,6 @@ __weak int dcache_status(void)
 __weak void enable_caches(void)
 {
 	zicbom_block_size = riscv_get_cbom_block_size();
-	if (!zicbom_block_size)
-		log_debug("Zicbom not initialized.\n");
 }
 
 int __weak pgprot_set_attrs(phys_addr_t addr, size_t size, enum pgprot_attrs perm)
diff --git a/board/starfive/visionfive2/spl.c b/board/starfive/visionfive2/spl.c
index e231467f2a1..1b4d623d002 100644
--- a/board/starfive/visionfive2/spl.c
+++ b/board/starfive/visionfive2/spl.c
@@ -144,7 +144,12 @@ int board_fit_config_name_match(const char *name)
 		    !strncmp(get_product_id_from_eeprom(), "VF7110B", 7)) {
 		return 0;
 	} else if (!strcmp(name, "starfive/jh7110-starfive-visionfive-2-lite") &&
-		    !strncmp(get_product_id_from_eeprom(), "VF7110SL", 8)) {
+		    !strncmp(get_product_id_from_eeprom(), "VF7110SL", 8) &&
+		    !get_mmc_size_from_eeprom()) {
+		return 0;
+	} else if (!strcmp(name, "starfive/jh7110-starfive-visionfive-2-lite-emmc") &&
+		    !strncmp(get_product_id_from_eeprom(), "VF7110SL", 8) &&
+		    get_mmc_size_from_eeprom()) {
 		return 0;
 	}
 
diff --git a/board/starfive/visionfive2/starfive_visionfive2.c b/board/starfive/visionfive2/starfive_visionfive2.c
index 1a76f745ec8..97f40715f8f 100644
--- a/board/starfive/visionfive2/starfive_visionfive2.c
+++ b/board/starfive/visionfive2/starfive_visionfive2.c
@@ -72,7 +72,11 @@ static void set_fdtfile(void)
 	} else if (!strncmp(get_product_id_from_eeprom(), "VF7110B", 7)) {
 		fdtfile = "starfive/jh7110-starfive-visionfive-2-v1.3b.dtb";
 	} else if (!strncmp(get_product_id_from_eeprom(), "VF7110SL", 8)) {
-		fdtfile = "starfive/jh7110-starfive-visionfive-2-lite.dtb";
+		if (get_mmc_size_from_eeprom()) {
+			fdtfile = "starfive/jh7110-starfive-visionfive-2-lite-emmc.dtb";
+		} else {
+			fdtfile = "starfive/jh7110-starfive-visionfive-2-lite.dtb";
+		}
 	} else {
 		log_err("Unknown product\n");
 		return;
diff --git a/configs/starfive_visionfive2_defconfig b/configs/starfive_visionfive2_defconfig
index 23f903a6df4..6fd43544a0c 100644
--- a/configs/starfive_visionfive2_defconfig
+++ b/configs/starfive_visionfive2_defconfig
@@ -80,7 +80,7 @@ CONFIG_WGET_HTTPS=y
 CONFIG_CMD_BOOTSTAGE=y
 CONFIG_OF_BOARD=y
 CONFIG_DEVICE_TREE_INCLUDES="starfive-visionfive2-u-boot.dtsi"
-CONFIG_OF_LIST="starfive/jh7110-deepcomputing-fml13v01 starfive/jh7110-milkv-mars starfive/jh7110-milkv-marscm-emmc starfive/jh7110-milkv-marscm-lite starfive/jh7110-orangepi-rv starfive/jh7110-pine64-star64 starfive/jh7110-starfive-visionfive-2-v1.2a starfive/jh7110-starfive-visionfive-2-v1.3b starfive/jh7110-starfive-visionfive-2-lite"
+CONFIG_OF_LIST="starfive/jh7110-deepcomputing-fml13v01 starfive/jh7110-milkv-mars starfive/jh7110-milkv-marscm-emmc starfive/jh7110-milkv-marscm-lite starfive/jh7110-orangepi-rv starfive/jh7110-pine64-star64 starfive/jh7110-starfive-visionfive-2-v1.2a starfive/jh7110-starfive-visionfive-2-v1.3b starfive/jh7110-starfive-visionfive-2-lite starfive/jh7110-starfive-visionfive-2-lite-emmc"
 CONFIG_MULTI_DTB_FIT=y
 CONFIG_ENV_OVERWRITE=y
 CONFIG_ENV_IS_IN_SPI_FLASH=y
diff --git a/configs/xilinx_mbv32_defconfig b/configs/xilinx_mbv32_defconfig
index 9d0111fe8e5..097d6095df2 100644
--- a/configs/xilinx_mbv32_defconfig
+++ b/configs/xilinx_mbv32_defconfig
@@ -17,6 +17,8 @@ CONFIG_SYS_CLK_FREQ=100000000
 CONFIG_BOOT_SCRIPT_OFFSET=0x0
 CONFIG_TARGET_XILINX_MBV=y
 # CONFIG_RISCV_ISA_F is not set
+# CONFIG_RISCV_ACLINT is not set
+# CONFIG_SPL_RISCV_ACLINT is not set
 # CONFIG_SPL_SMP is not set
 # CONFIG_AVAILABLE_HARTS is not set
 CONFIG_SPL_OPTIMIZE_INLINING=y
diff --git a/doc/board/sophgo/licheerv_nano.rst b/doc/board/sophgo/licheerv_nano.rst
index a75c6a37dc5..a3b1171287d 100644
--- a/doc/board/sophgo/licheerv_nano.rst
+++ b/doc/board/sophgo/licheerv_nano.rst
@@ -43,9 +43,9 @@ To run u-boot.bin on top of FSBL, follow these steps:
    FSBL, OpenSBI, and U-Boot.
    Note that you will have to use the file cv181x.bin as the FSBL.
 
-2. Place the generated fip.bin file into the FAT partition of the SD card.
+4. Place the generated fip.bin file into the FAT partition of the SD card.
 
-3. Insert the SD card into the board and power it on.
+5. Insert the SD card into the board and power it on.
 
 The board will automatically execute the FSBL from the fip.bin file.
 Subsequently, it will transition to OpenSBI, and finally, OpenSBI will invoke
diff --git a/drivers/rng/jh7110_rng.c b/drivers/rng/jh7110_rng.c
index eb21afe4e7c..d54898c67f6 100644
--- a/drivers/rng/jh7110_rng.c
+++ b/drivers/rng/jh7110_rng.c
@@ -233,9 +233,9 @@ static int starfive_trng_of_to_plat(struct udevice *dev)
 {
 	struct starfive_trng_plat *pdata = dev_get_plat(dev);
 
-	pdata->base = (void *)dev_read_addr(dev);
+	pdata->base = dev_read_addr_ptr(dev);
 	if (!pdata->base)
-		return -ENODEV;
+		return -EINVAL;
 
 	pdata->hclk = devm_clk_get(dev, "hclk");
 	if (IS_ERR(pdata->hclk))
diff --git a/drivers/serial/serial_sifive.c b/drivers/serial/serial_sifive.c
index e47828e4d6a..0203e2fc37c 100644
--- a/drivers/serial/serial_sifive.c
+++ b/drivers/serial/serial_sifive.c
@@ -144,23 +144,16 @@ static int sifive_serial_probe(struct udevice *dev)
 
 static int sifive_serial_getc(struct udevice *dev)
 {
-	int c;
 	struct sifive_uart_plat *plat = dev_get_plat(dev);
-	struct uart_sifive *regs = plat->regs;
-
-	while ((c = _sifive_serial_getc(regs)) == -EAGAIN) ;
 
-	return c;
+	return _sifive_serial_getc(plat->regs);
 }
 
 static int sifive_serial_putc(struct udevice *dev, const char ch)
 {
-	int rc;
 	struct sifive_uart_plat *plat = dev_get_plat(dev);
 
-	while ((rc = _sifive_serial_putc(plat->regs, ch)) == -EAGAIN) ;
-
-	return rc;
+	return _sifive_serial_putc(plat->regs, ch);
 }
 
 static int sifive_serial_pending(struct udevice *dev, bool input)