Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-sh

SH HSCIF FIFO fixes, R-Car V4H/V4M DT corrections, R-Car V4H Sparrow
Hawk PCIe shutdown support before booting Linux.

6 files changed, 117 insertions, 1 deletions

diff --git a/arch/arm/dts/r8a779g0-white-hawk-u-boot.dtsi b/arch/arm/dts/r8a779g0-white-hawk-u-boot.dtsi
index 85e32208b29..8e4307ff87d 100644
--- a/arch/arm/dts/r8a779g0-white-hawk-u-boot.dtsi
+++ b/arch/arm/dts/r8a779g0-white-hawk-u-boot.dtsi
@@ -23,6 +23,8 @@
 
 &rpc {
 	bootph-all;
+	status = "disabled";
+
 	flash@0 {
 		bootph-all;
 		spi-tx-bus-width = <1>;
diff --git a/arch/arm/dts/r8a779h0-gray-hawk-single-u-boot.dtsi b/arch/arm/dts/r8a779h0-gray-hawk-single-u-boot.dtsi
new file mode 100644
index 00000000000..c04d2ae2be4
--- /dev/null
+++ b/arch/arm/dts/r8a779h0-gray-hawk-single-u-boot.dtsi
@@ -0,0 +1,41 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Device Tree Source extras for U-Boot for the Gray Hawk board
+ *
+ * Copyright (C) 2025 Renesas Electronics Corp.
+ */
+
+#include "r8a779h0-u-boot.dtsi"
+
+/ {
+	aliases {
+		spi0 = &rpc;
+	};
+};
+
+&pfc {
+	qspi0_pins: qspi0 {
+		groups = "qspi0_ctrl", "qspi0_data4";
+		function = "qspi0";
+	};
+};
+
+&rpc {
+	pinctrl-0 = <&qspi0_pins>;
+	pinctrl-names = "default";
+
+	#address-cells = <1>;
+	#size-cells = <0>;
+	spi-max-frequency = <40000000>;
+	status = "disabled";
+
+	flash@0 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "s25fs512s", "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <40000000>;
+		spi-tx-bus-width = <1>;
+		spi-rx-bus-width = <1>;
+	};
+};
diff --git a/arch/arm/dts/r8a779h0-u-boot.dtsi b/arch/arm/dts/r8a779h0-u-boot.dtsi
new file mode 100644
index 00000000000..40e070be9a8
--- /dev/null
+++ b/arch/arm/dts/r8a779h0-u-boot.dtsi
@@ -0,0 +1,11 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Device Tree Source extras for U-Boot on R-Car R8A779H0 SoC
+ *
+ * Copyright (C) 2025 Renesas Electronics Corp.
+ */
+
+&rpc {
+	bank-width = <2>;
+	num-cs = <1>;
+};
diff --git a/board/renesas/sparrowhawk/sparrowhawk.c b/board/renesas/sparrowhawk/sparrowhawk.c
index 58de7f25cbd..a4eda852743 100644
--- a/board/renesas/sparrowhawk/sparrowhawk.c
+++ b/board/renesas/sparrowhawk/sparrowhawk.c
@@ -267,3 +267,30 @@ void renesas_dram_init_banksize(void)
 			gd->bd->bi_dram[bank].size = 0x200000000ULL;
 	}
 }
+
+#define SRCR6			0xe6152c18
+#define SRCR11			0xe6152c2c
+#define SRSTCLR6		0xe6152c98
+#define SRSTCLR11		0xe6152cac
+#define SRCR_PCIEC0_PWR_RESET	BIT(24)
+#define SRCR_PCIEC1_PWR_RESET	BIT(25)
+#define SRCR_PCIEC0_APP_RESET	BIT(21)
+#define SRCR_PCIEC1_APP_RESET	BIT(22)
+
+void board_cleanup_before_linux(void)
+{
+	if (!IS_ENABLED(CONFIG_PCI_RCAR_GEN4))
+		return;
+
+	/* Set cold and application reset for both PCIe cores */
+	writel(SRCR_PCIEC0_PWR_RESET | SRCR_PCIEC1_PWR_RESET, SRCR6);
+	readl(SRCR6);
+	writel(SRCR_PCIEC0_APP_RESET | SRCR_PCIEC1_APP_RESET, SRCR11);
+	readl(SRCR11);
+
+	/* Clear cold and application reset for both PCIe cores */
+	writel(SRCR_PCIEC0_PWR_RESET | SRCR_PCIEC1_PWR_RESET, SRSTCLR6);
+	readl(SRSTCLR6);
+	writel(SRCR_PCIEC0_APP_RESET | SRCR_PCIEC1_APP_RESET, SRSTCLR11);
+	readl(SRSTCLR11);
+}
diff --git a/drivers/pci/pci-rcar-gen4.c b/drivers/pci/pci-rcar-gen4.c
index 1f41ce28b0b..e165271f58c 100644
--- a/drivers/pci/pci-rcar-gen4.c
+++ b/drivers/pci/pci-rcar-gen4.c
@@ -477,6 +477,10 @@ static int rcar_gen4_pcie_probe(struct udevice *dev)
 
 	if (!rcar_gen4_pcie_link_up(rcar)) {
 		printf("PCIE-%d: Link down\n", dev_seq(dev));
+		rcar_gen4_pcie_ltssm_control(rcar, false);
+		dm_gpio_set_value(&rcar->pe_rst, 1);
+		reset_assert(&rcar->pwr_rst);
+		clk_disable_unprepare(rcar->ref_clk);
 		return -ENODEV;
 	}
 
@@ -494,6 +498,26 @@ static int rcar_gen4_pcie_probe(struct udevice *dev)
 }
 
 /**
+ * rcar_gen4_pcie_remove() - Stop the PCIe bus active link
+ * @dev: A pointer to the device being operated on
+ *
+ * Stop an active link on the PCIe bus and deconfigure the controller.
+ *
+ * Return: 0 on success, else -ENODEV
+ */
+static int rcar_gen4_pcie_remove(struct udevice *dev)
+{
+	struct rcar_gen4_pcie *rcar = dev_get_priv(dev);
+
+	rcar_gen4_pcie_ltssm_control(rcar, false);
+	dm_gpio_set_value(&rcar->pe_rst, 1);
+	reset_assert(&rcar->pwr_rst);
+	clk_disable_unprepare(rcar->ref_clk);
+
+	return 0;
+}
+
+/**
  * rcar_gen4_pcie_of_to_plat() - Translate from DT to device state
  *
  * @dev: A pointer to the device being operated on
@@ -566,5 +590,7 @@ U_BOOT_DRIVER(rcar_gen4_pcie) = {
 	.ops		= &rcar_gen4_pcie_ops,
 	.of_to_plat	= rcar_gen4_pcie_of_to_plat,
 	.probe		= rcar_gen4_pcie_probe,
+	.remove		= rcar_gen4_pcie_remove,
 	.priv_auto	= sizeof(struct rcar_gen4_pcie),
+	.flags		= DM_FLAG_ACTIVE_DMA,
 };
diff --git a/drivers/serial/serial_sh.c b/drivers/serial/serial_sh.c
index e4cc4ee4260..7ab62e0e90b 100644
--- a/drivers/serial/serial_sh.c
+++ b/drivers/serial/serial_sh.c
@@ -112,7 +112,16 @@ static int serial_raw_putc(struct uart_port *port, const char c)
 
 static int serial_rx_fifo_level(struct uart_port *port)
 {
-	return scif_rxfill(port);
+	int ret;
+
+	ret = scif_rxfill(port);
+	if (ret)
+		return ret;
+
+	if (sci_in(port, SCxSR) & SCxSR_RDxF(port))
+		return 1;
+
+	return 0;
 }
 
 static int sh_serial_tstc_generic(struct uart_port *port)