diff options
| author | Raymond Mao <[email protected]> | 2026-06-30 09:19:07 +0800 |
|---|---|---|
| committer | Tim Ouyang <[email protected]> | 2026-07-21 16:57:13 +0800 |
| commit | 70cee8ab03c3252d17cb0c10bfe80cbda7ef4bb9 (patch) | |
| tree | c8549b685417d842db6846982e24de44abf6701a | |
| parent | 8a8a640d2a4a5c15e8146da58dbf82889fd4c118 (diff) | |
dts: k1: enable clocks in SPL
Make the K1 clock controllers visible to SPL by tagging the four root
fixed clocks (osc_32k, vctcxo_{1,3,24}m) and the four syscon nodes
(mpmu, pll, apmu, apbc) with bootph-pre-ram in the BPI-F3 U-Boot
overlay.
Signed-off-by: Raymond Mao <[email protected]>
Signed-off-by: Guodong Xu <[email protected]>
Tested-by: Songsong Zhang <[email protected]>
| -rw-r--r-- | arch/riscv/dts/k1-bananapi-f3-u-boot.dtsi | 32 |
1 files changed, 32 insertions, 0 deletions
diff --git a/arch/riscv/dts/k1-bananapi-f3-u-boot.dtsi b/arch/riscv/dts/k1-bananapi-f3-u-boot.dtsi index ef63b43f69f..e140c07b834 100644 --- a/arch/riscv/dts/k1-bananapi-f3-u-boot.dtsi +++ b/arch/riscv/dts/k1-bananapi-f3-u-boot.dtsi @@ -15,3 +15,35 @@ &uart0 { bootph-pre-ram; }; + +&osc_32k { + bootph-pre-ram; +}; + +&vctcxo_1m { + bootph-pre-ram; +}; + +&vctcxo_3m { + bootph-pre-ram; +}; + +&vctcxo_24m { + bootph-pre-ram; +}; + +&syscon_mpmu { + bootph-pre-ram; +}; + +&pll { + bootph-pre-ram; +}; + +&syscon_apmu { + bootph-pre-ram; +}; + +&syscon_apbc { + bootph-pre-ram; +}; |