diff options
| author | Tom Rini <[email protected]> | 2021-10-17 21:13:49 -0400 |
|---|---|---|
| committer | Tom Rini <[email protected]> | 2021-10-17 21:13:49 -0400 |
| commit | d990f7d75d3dcf45a9220abc900495f00792f414 (patch) | |
| tree | 357d16f322dabb5b66f2ea98b2e584c91f935a4b /arch/arm/include | |
| parent | 6a86f1212656d4497b8980048907535f5294fabe (diff) | |
| parent | 022f552704b6467966e4fad39c85a6aca9204c94 (diff) | |
Merge tag 'u-boot-rockchip-20211015' of https://source.denx.de/u-boot/custodians/u-boot-rockchip
- Fix for Rockchip mmc HS400 mode;
- Fix for px30 board Odroid Go;
- rockchip_sfc update;
- rk3568 clk update;
- doc fix;
Diffstat (limited to 'arch/arm/include')
| -rw-r--r-- | arch/arm/include/asm/arch-rockchip/cru_rk3568.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3568.h b/arch/arm/include/asm/arch-rockchip/cru_rk3568.h index 6c59033f03a..399f19ad21e 100644 --- a/arch/arm/include/asm/arch-rockchip/cru_rk3568.h +++ b/arch/arm/include/asm/arch-rockchip/cru_rk3568.h @@ -14,7 +14,7 @@ #define APLL_HZ (816 * MHz) #define GPLL_HZ (1188 * MHz) #define CPLL_HZ (1000 * MHz) -#define PPLL_HZ (100 * MHz) +#define PPLL_HZ (200 * MHz) /* RK3568 pll id */ enum rk3568_pll_id { |