diff options
| author | Simon Glass <[email protected]> | 2024-09-29 19:49:46 -0600 |
|---|---|---|
| committer | Tom Rini <[email protected]> | 2024-10-11 11:44:47 -0600 |
| commit | bef9fdbed2e525ce9264d2ae2fbcb37db7472052 (patch) | |
| tree | 2f2d2438160813a1dd77792d01a23581011c7e69 /arch/riscv/cpu | |
| parent | ac644df9a4d5d39b3214d230a14e5ef5c8cfcdf4 (diff) | |
arch: Use CONFIG_XPL_BUILD instead of CONFIG_SPL_BUILD
Use the new symbol to refer to any 'SPL' build, including TPL and VPL
Signed-off-by: Simon Glass <[email protected]>
Diffstat (limited to 'arch/riscv/cpu')
| -rw-r--r-- | arch/riscv/cpu/fu540/Makefile | 2 | ||||
| -rw-r--r-- | arch/riscv/cpu/fu740/Makefile | 2 | ||||
| -rw-r--r-- | arch/riscv/cpu/jh7110/Makefile | 2 | ||||
| -rw-r--r-- | arch/riscv/cpu/start.S | 8 |
4 files changed, 7 insertions, 7 deletions
diff --git a/arch/riscv/cpu/fu540/Makefile b/arch/riscv/cpu/fu540/Makefile index 043fb961a51..69759c55658 100644 --- a/arch/riscv/cpu/fu540/Makefile +++ b/arch/riscv/cpu/fu540/Makefile @@ -3,7 +3,7 @@ # Copyright (C) 2020 SiFive, Inc # Pragnesh Patel <[email protected]> -ifeq ($(CONFIG_SPL_BUILD),y) +ifeq ($(CONFIG_XPL_BUILD),y) obj-y += spl.o else obj-y += dram.o diff --git a/arch/riscv/cpu/fu740/Makefile b/arch/riscv/cpu/fu740/Makefile index 1d1ad98ba7c..9071c831992 100644 --- a/arch/riscv/cpu/fu740/Makefile +++ b/arch/riscv/cpu/fu740/Makefile @@ -3,7 +3,7 @@ # Copyright (C) 2020-2021 SiFive, Inc # Pragnesh Patel <[email protected]> -ifeq ($(CONFIG_SPL_BUILD),y) +ifeq ($(CONFIG_XPL_BUILD),y) obj-y += spl.o else obj-y += dram.o diff --git a/arch/riscv/cpu/jh7110/Makefile b/arch/riscv/cpu/jh7110/Makefile index 951c95631e9..0939c1061d0 100644 --- a/arch/riscv/cpu/jh7110/Makefile +++ b/arch/riscv/cpu/jh7110/Makefile @@ -2,7 +2,7 @@ # # Copyright (C) 2022 StarFive Technology Co., Ltd. -ifeq ($(CONFIG_SPL_BUILD),y) +ifeq ($(CONFIG_XPL_BUILD),y) obj-y += spl.o else obj-y += cpu.o diff --git a/arch/riscv/cpu/start.S b/arch/riscv/cpu/start.S index 8e58f641f1b..3f78932aa9d 100644 --- a/arch/riscv/cpu/start.S +++ b/arch/riscv/cpu/start.S @@ -90,7 +90,7 @@ _start: * Set stackpointer in internal/ex RAM to call board_init_f */ call_board_init_f: -#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_STACK) +#if defined(CONFIG_XPL_BUILD) && defined(CONFIG_SPL_STACK) li t0, CONFIG_SPL_STACK #else li t0, SYS_INIT_SP_ADDR @@ -218,7 +218,7 @@ wait_for_gd_init: la t5, board_init_f jalr t5 /* jump to board_init_f() */ -#ifdef CONFIG_SPL_BUILD +#ifdef CONFIG_XPL_BUILD spl_clear_bss: la t0, __bss_start la t1, __bss_end @@ -271,7 +271,7 @@ spl_call_board_init_r: j board_init_r #endif -#if !defined(CONFIG_SPL_BUILD) +#if !defined(CONFIG_XPL_BUILD) /* * void relocate_code(addr_sp, gd, addr_moni) * @@ -420,7 +420,7 @@ call_board_init_r: * jump to it ... */ jr t4 /* jump to board_init_r() */ -#endif /* !defined(CONFIG_SPL_BUILD) */ +#endif /* !defined(CONFIG_XPL_BUILD) */ #if CONFIG_IS_ENABLED(SMP) hart_out_of_bounds_loop: |