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authorTom Rini <[email protected]>2026-06-14 15:35:00 -0600
committerTom Rini <[email protected]>2026-06-14 15:35:00 -0600
commit1e80ee41441c612f05787a93bbef4e6e422e29d1 (patch)
tree390e9cd03dff4770795d5a99d309a7ba4c93a146 /arch
parent5ca1a73c7d3064582498a8aa96c29e714402a6d3 (diff)
parentcc5d760ace890b57d78b23aafb47ba220e63ae4f (diff)
Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-sh
Two fixes for R-Car Gen5 RSIP, one to surely build u-boot-elf.shdr and one to make u-boot-elf.shdr compatible with tooling. Two fixes for R-Car Gen4, which could hang in SPL without them.
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-renesas/Kconfig.rcar43
-rw-r--r--arch/arm/mach-renesas/Makefile2
2 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm/mach-renesas/Kconfig.rcar4 b/arch/arm/mach-renesas/Kconfig.rcar4
index 2439501d07e..39814950b1a 100644
--- a/arch/arm/mach-renesas/Kconfig.rcar4
+++ b/arch/arm/mach-renesas/Kconfig.rcar4
@@ -11,12 +11,14 @@ config R8A779A0
config R8A779F0
bool "Renesas SoC R8A779F0"
select GICV3
+ select GICV3_SUPPORT_GIC600
imply CLK_R8A779F0
imply PINCTRL_PFC_R8A779F0
config R8A779G0
bool "Renesas SoC R8A779G0"
select GICV3
+ select GICV3_SUPPORT_GIC600
select BINMAN
select SUPPORT_SPL
imply SPL
@@ -33,6 +35,7 @@ config R8A779G0
config R8A779H0
bool "Renesas SoC R8A779H0"
select GICV3
+ select GICV3_SUPPORT_GIC600
imply CLK_R8A779H0
imply PINCTRL_PFC_R8A779H0
diff --git a/arch/arm/mach-renesas/Makefile b/arch/arm/mach-renesas/Makefile
index 83c576d6007..4c8dbc465a6 100644
--- a/arch/arm/mach-renesas/Makefile
+++ b/arch/arm/mach-renesas/Makefile
@@ -50,6 +50,8 @@ quiet_cmd_srec_cat = SRECCAT $@
quiet_cmd_srec_shdr_cat = SRECCAT $@
cmd_srec_shdr_cat = srec_cat -output $@ -M 8 \
-Output_Block_Size 16 \
+ -DISable Data_Count \
+ -Execution_Start_Address 0x18400000 \
-generate 0x18400000 0x18400004 $(srec_cat_le_cmd) 0x00000003 4 \
-generate 0x18400004 0x18400008 $(srec_cat_le_cmd) 0x0 4 \
-generate 0x18402000 0x18402004 $(srec_cat_le_cmd) 0x6b657963 4 \