Merge patch series "This series introduces initial U-Boot support for mach-axiado AX3005 SCM3005 board, a quad-core ARM Cortex-A53 (ARMv8/ARM64) platform."

Siu Ming Tong <[email protected]> says:

Patch 1 adds the device tree files: an SoC-level DTSI describing
GIC-v3, Cadence/Zynq UART, a fixed reference clock, and spin-table
secondary CPU boot, plus a board-level DTS setting the console to
uart3 at 115200 baud with 2 GB DRAM at 0x80000000.

Patch 2 adds mach-axiado to support Axiado SoC-based boards, Kconfig
plumbing (AXIADO_AX3005 and TARGET_SCM3005), defconfig, board source
with ft_board_setup() and a MAINTAINERS entry.

Tested on SCM3005 EVK hardware

Link: https://lore.kernel.org/r/[email protected]

7 files changed, 177 insertions, 0 deletions

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 514bf2000b4..8047c5e1f87 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -2153,6 +2153,13 @@ config ARCH_ASPEED
 	select OF_CONTROL
 	imply CMD_DM
 
+config ARCH_AXIADO
+	bool "Support Axiado SoCs"
+	select AXIADO_AX3005
+	help
+	  Support for Axiado AX-series SoCs such as the AX3005.
+	  These ARM64 SoCs are used in BMC and security applications.
+
 config TARGET_DURIAN
 	bool "Support Phytium Durian Platform"
 	select ARM64
@@ -2294,6 +2301,8 @@ source "arch/arm/mach-aspeed/Kconfig"
 
 source "arch/arm/mach-at91/Kconfig"
 
+source "arch/arm/mach-axiado/Kconfig"
+
 source "arch/arm/mach-bcm283x/Kconfig"
 
 source "arch/arm/mach-bcmbca/Kconfig"
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index c647379c5ac..b63143c2bf0 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -4,6 +4,7 @@ dtb-$(CONFIG_TARGET_SMARTWEB) += at91sam9260-smartweb.dtb
 dtb-$(CONFIG_TARGET_TAURUS) += at91sam9g20-taurus.dtb
 dtb-$(CONFIG_TARGET_CORVUS) += at91sam9g45-corvus.dtb
 dtb-$(CONFIG_TARGET_GURNARD) += at91sam9g45-gurnard.dtb
+dtb-$(CONFIG_TARGET_SCM3005) += ax3005-scm3005.dtb
 
 dtb-$(CONFIG_TARGET_SMDKC100) += s5pc1xx-smdkc100.dtb
 dtb-$(CONFIG_TARGET_S5P_GONI) += s5pc1xx-goni.dtb
diff --git a/arch/arm/dts/ax3005-scm3005.dts b/arch/arm/dts/ax3005-scm3005.dts
new file mode 100644
index 00000000000..b684602176c
--- /dev/null
+++ b/arch/arm/dts/ax3005-scm3005.dts
@@ -0,0 +1,28 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (c) 2021-2026 Axiado Corporation (or its affiliates).
+ */
+
+/dts-v1/;
+
+#include "ax3005.dtsi"
+
+/ {
+	model = "Axiado AX3005 SCM3005";
+	compatible = "axiado,ax3005-scm3005", "axiado,ax3005";
+	#address-cells = <2>;
+	#size-cells = <2>;
+
+	chosen {
+		stdout-path = "serial3:115200";
+	};
+
+	memory@80000000 {
+		device_type = "memory";
+		reg = <0x00 0x80000000 0x00 0x80000000>;
+	};
+};
+
+&uart3 {
+	status = "okay";
+};
diff --git a/arch/arm/dts/ax3005.dtsi b/arch/arm/dts/ax3005.dtsi
new file mode 100644
index 00000000000..6df2e4a821c
--- /dev/null
+++ b/arch/arm/dts/ax3005.dtsi
@@ -0,0 +1,100 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (c) 2021-2026 Axiado Corporation (or its affiliates).
+ */
+
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+
+/memreserve/ 0x80002fa0 0x00000008;
+
+/ {
+	aliases {
+		serial3 = &uart3;
+	};
+
+	cpus {
+		#address-cells = <2>;
+		#size-cells = <0>;
+
+		cpu0: cpu@0 {
+			compatible = "arm,cortex-a53";
+			device_type = "cpu";
+			reg = <0x0 0x0>;
+			enable-method = "spin-table";
+			cpu-release-addr = <0x0 0x80002fa0>;
+		};
+		cpu1: cpu@1 {
+			compatible = "arm,cortex-a53";
+			device_type = "cpu";
+			reg = <0x0 0x1>;
+			enable-method = "spin-table";
+			cpu-release-addr = <0x0 0x80002fa0>;
+		};
+		cpu2: cpu@2 {
+			compatible = "arm,cortex-a53";
+			device_type = "cpu";
+			reg = <0x0 0x2>;
+			enable-method = "spin-table";
+			cpu-release-addr = <0x0 0x80002fa0>;
+		};
+		cpu3: cpu@3 {
+			compatible = "arm,cortex-a53";
+			device_type = "cpu";
+			reg = <0x0 0x3>;
+			enable-method = "spin-table";
+			cpu-release-addr = <0x0 0x80002fa0>;
+		};
+	};
+
+	timer {
+		compatible = "arm,armv8-timer";
+		interrupt-parent = <&gic500>;
+		interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,
+			     <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>,
+			     <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>,
+			     <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>;
+		clock-frequency = <1000000000>;
+	};
+
+	clocks {
+		refclk: refclk {
+			compatible = "fixed-clock";
+			#clock-cells = <0>;
+			clock-frequency = <125000000>;
+			bootph-pre-reloc;
+		};
+	};
+
+	soc: soc {
+		compatible = "simple-bus";
+		#address-cells = <2>;
+		#size-cells = <2>;
+		interrupt-parent = <&gic500>;
+		ranges;
+
+		gic500: interrupt-controller@40400000 {
+			compatible = "arm,gic-v3";
+			#address-cells = <2>;
+			#size-cells = <2>;
+			ranges;
+			#interrupt-cells = <3>;
+			interrupt-controller;
+			#redistributor-regions = <1>;
+			reg = <0x00 0x40400000 0x00 0x10000>,
+			      <0x00 0x40500000 0x00 0xc0000>;
+			interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
+		};
+
+		uart3: serial@33020800 {
+			compatible = "cdns,uart-r1p12", "xlnx,xuartps";
+			interrupt-parent = <&gic500>;
+			interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>;
+			reg = <0x00 0x33020800 0x00 0x100>;
+			clock-names = "uart_clk", "pclk";
+			clocks = <&refclk &refclk>;
+			bootph-pre-reloc;
+			status = "disabled";
+		};
+	};
+};
diff --git a/arch/arm/mach-axiado/Kconfig b/arch/arm/mach-axiado/Kconfig
new file mode 100644
index 00000000000..12ad44070eb
--- /dev/null
+++ b/arch/arm/mach-axiado/Kconfig
@@ -0,0 +1,22 @@
+if ARCH_AXIADO
+
+config SYS_ARCH
+	default "arm"
+
+config SYS_SOC
+	default "axiado"
+
+config AXIADO_AX3005
+	bool
+	select ARM64
+	select ARMV8_SWITCH_TO_EL1
+	select DM
+	select DM_SERIAL
+	select GICV3
+	select ZYNQ_SERIAL
+	select MMC_SDHCI_AXIADO
+	select PHY_AXIADO_EMMC
+
+source "arch/arm/mach-axiado/scm3005/Kconfig"
+
+endif
diff --git a/arch/arm/mach-axiado/Makefile b/arch/arm/mach-axiado/Makefile
new file mode 100644
index 00000000000..2acd5466dd9
--- /dev/null
+++ b/arch/arm/mach-axiado/Makefile
@@ -0,0 +1,6 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright (c) 2021-2026 Axiado Corporation (or its affiliates).
+#
+
+obj-$(CONFIG_AXIADO_AX3005) += scm3005/
diff --git a/arch/arm/mach-axiado/scm3005/Kconfig b/arch/arm/mach-axiado/scm3005/Kconfig
new file mode 100644
index 00000000000..fc74aa0871b
--- /dev/null
+++ b/arch/arm/mach-axiado/scm3005/Kconfig
@@ -0,0 +1,11 @@
+if AXIADO_AX3005
+
+config TARGET_SCM3005
+	bool "Support Axiado AX3005 SCM3005"
+	help
+	  Support for the Axiado AX3005 SCM3005 board.
+	  Based on the Axiado AX3005 quad-core ARMv8 Cortex-A53 SoC.
+
+source "board/axiado/scm3005/Kconfig"
+
+endif