Merge branch 'staging' of https://source.denx.de/u-boot/custodians/u-boot-tegra

Assorted Tegra enhancements. Merged with the recent XPL_BUILD changes,
resolve some whitespace issues and fix the name of the new apalis-tk1
env file by Tom.

Signed-off-by: Tom Rini <[email protected]>

7 files changed, 55 insertions, 11 deletions

diff --git a/arch/arm/dts/tegra-u-boot.dtsi b/arch/arm/dts/tegra-u-boot.dtsi
index b3d0dec7757..c200f2d3a0b 100644
--- a/arch/arm/dts/tegra-u-boot.dtsi
+++ b/arch/arm/dts/tegra-u-boot.dtsi
@@ -19,6 +19,27 @@
 			};
 		};
 
+#ifdef CONFIG_MULTI_DTB_FIT
+		image2 {
+			filename = "u-boot-dtb-tegra.bin";
+			pad-byte = <0xff>;
+			u-boot-spl {
+			};
+			u-boot-nodtb {
+				offset = <(U_BOOT_OFFSET)>;
+			};
+			fit-dtb {
+#ifdef CONFIG_MULTI_DTB_FIT_LZO
+				filename = "fit-dtb.blob.lzo";
+#elif CONFIG_MULTI_DTB_FIT_GZIP
+				filename = "fit-dtb.blob.gz";
+#else
+				filename = "fit-dtb.blob";
+#endif
+				type = "blob";
+			};
+		};
+#else
 		/* Same as image1 - some tools still expect the -dtb suffix */
 		image2 {
 			filename = "u-boot-dtb-tegra.bin";
@@ -29,6 +50,7 @@
 				offset = <(U_BOOT_OFFSET)>;
 			};
 		};
+#endif
 
 		image3 {
 			filename = "u-boot-nodtb-tegra.bin";
diff --git a/arch/arm/include/asm/arch-tegra/tegra.h b/arch/arm/include/asm/arch-tegra/tegra.h
index 7a4e0972fb7..a399c94213b 100644
--- a/arch/arm/include/asm/arch-tegra/tegra.h
+++ b/arch/arm/include/asm/arch-tegra/tegra.h
@@ -68,8 +68,9 @@ struct timerus {
 
 /* These are the available SKUs (product types) for Tegra */
 enum {
-	SKU_ID_T20_7		= 0x7,
+	SKU_ID_AP20		= 0x7,
 	SKU_ID_T20		= 0x8,
+	SKU_ID_AP20H		= 0xf,
 	SKU_ID_T25SE		= 0x14,
 	SKU_ID_AP25		= 0x17,
 	SKU_ID_T25		= 0x18,
diff --git a/arch/arm/include/asm/arch-tegra/usb.h b/arch/arm/include/asm/arch-tegra/usb.h
index 6e6ea1443cb..2ae109ab6c1 100644
--- a/arch/arm/include/asm/arch-tegra/usb.h
+++ b/arch/arm/include/asm/arch-tegra/usb.h
@@ -336,10 +336,13 @@ struct usb_ctlr {
 #define UTMIP_XCVR_HSSLEW_MSB_SHIFT		25
 #define UTMIP_XCVR_HSSLEW_MSB_MASK		\
 			(0x7f << UTMIP_XCVR_HSSLEW_MSB_SHIFT)
-#define UTMIP_XCVR_SETUP_MSB_SHIFT	22
-#define UTMIP_XCVR_SETUP_MSB_MASK	(0x7 << UTMIP_XCVR_SETUP_MSB_SHIFT)
-#define UTMIP_XCVR_SETUP_SHIFT		0
-#define UTMIP_XCVR_SETUP_MASK		(0xf << UTMIP_XCVR_SETUP_SHIFT)
+
+#define UTMIP_XCVR_SETUP(x)			(((x) & 0xf) << 0)
+#define UTMIP_XCVR_SETUP_MSB(x)			((((x) & 0x70) >> 4) << 22)
+#define UTMIP_XCVR_LSRSLEW(x)			(((x) & 0x3) << 8)
+#define UTMIP_XCVR_LSFSLEW(x)			(((x) & 0x3) << 10)
+#define UTMIP_XCVR_HSSLEW(x)			(((x) & 0x3) << 4)
+#define UTMIP_XCVR_HSSLEW_MSB(x)		((((x) & 0x1fc) >> 2) << 25)
 
 /* USBx_UTMIP_XCVR_CFG1_0 */
 #define UTMIP_XCVR_TERM_RANGE_ADJ_SHIFT		18
diff --git a/arch/arm/include/asm/arch-tegra30/funcmux.h b/arch/arm/include/asm/arch-tegra30/funcmux.h
index 2e8b3359161..05414061a23 100644
--- a/arch/arm/include/asm/arch-tegra30/funcmux.h
+++ b/arch/arm/include/asm/arch-tegra30/funcmux.h
@@ -16,5 +16,6 @@ enum {
 
 	/* UART configs */
 	FUNCMUX_UART1_ULPI = 0,
+	FUNCMUX_UART5_SDMMC1 = 1,
 };
 #endif	/* _TEGRA30_FUNCMUX_H_ */
diff --git a/arch/arm/mach-tegra/ap.c b/arch/arm/mach-tegra/ap.c
index 1ea620e4ab5..f35bdba4d48 100644
--- a/arch/arm/mach-tegra/ap.c
+++ b/arch/arm/mach-tegra/ap.c
@@ -32,7 +32,7 @@ int tegra_get_chip(void)
 	 * Tegra30, 0x35 for T114, and 0x40 for Tegra124.
 	 */
 	rev = (readl(&gp->hidrev) & HIDREV_CHIPID_MASK) >> HIDREV_CHIPID_SHIFT;
-	debug("%s: CHIPID is 0x%02X\n", __func__, rev);
+	debug("%s: CHIPID is 0x%02x\n", __func__, rev);
 
 	return rev;
 }
@@ -43,7 +43,7 @@ int tegra_get_sku_info(void)
 	struct fuse_regs *fuse = (struct fuse_regs *)NV_PA_FUSE_BASE;
 
 	sku_id = readl(&fuse->sku_info) & 0xff;
-	debug("%s: SKU info byte is 0x%02X\n", __func__, sku_id);
+	debug("%s: SKU info byte is 0x%02x\n", __func__, sku_id);
 
 	return sku_id;
 }
@@ -58,8 +58,9 @@ int tegra_get_chip_sku(void)
 	switch (chip_id) {
 	case CHIPID_TEGRA20:
 		switch (sku_id) {
-		case SKU_ID_T20_7:
+		case SKU_ID_AP20:
 		case SKU_ID_T20:
+		case SKU_ID_AP20H:
 			return TEGRA_SOC_T20;
 		case SKU_ID_T25SE:
 		case SKU_ID_AP25:
@@ -103,8 +104,8 @@ int tegra_get_chip_sku(void)
 	}
 
 	/* unknown chip/sku id */
-	printf("%s: ERROR: UNKNOWN CHIP/SKU ID COMBO (0x%02X/0x%02X)\n",
-		__func__, chip_id, sku_id);
+	printf("%s: ERROR: UNKNOWN CHIP/SKU ID COMBO (0x%02x/0x%02x)\n",
+	       __func__, chip_id, sku_id);
 	return TEGRA_SOC_UNKNOWN;
 }
 
diff --git a/arch/arm/mach-tegra/board.c b/arch/arm/mach-tegra/board.c
index cc37878b8d1..7ca56a3b081 100644
--- a/arch/arm/mach-tegra/board.c
+++ b/arch/arm/mach-tegra/board.c
@@ -181,7 +181,7 @@ static int uart_configs[] = {
 	-1,
 	-1,
 	-1,
-	-1,
+	FUNCMUX_UART5_SDMMC1,  /* UARTE */
 #elif defined(CONFIG_TEGRA114)
 	-1,
 	-1,
diff --git a/arch/arm/mach-tegra/board2.c b/arch/arm/mach-tegra/board2.c
index 8e7fd7efc7b..6e9ef68caf9 100644
--- a/arch/arm/mach-tegra/board2.c
+++ b/arch/arm/mach-tegra/board2.c
@@ -6,6 +6,7 @@
 
 #include <config.h>
 #include <dm.h>
+#include <dm/root.h>
 #include <env.h>
 #include <errno.h>
 #include <init.h>
@@ -457,3 +458,18 @@ phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
 
 	return CFG_SYS_SDRAM_BASE + usable_ram_size_below_4g();
 }
+
+#if IS_ENABLED(CONFIG_DTB_RESELECT)
+int embedded_dtb_select(void)
+{
+	int ret, rescan;
+
+	ret = fdtdec_resetup(&rescan);
+	if (!ret && rescan) {
+		dm_uninit();
+		dm_init_and_scan(true);
+	}
+
+	return 0;
+}
+#endif