Merge tag 'u-boot-rockchip-20251101' of https://source.denx.de/u-boot/custodians/u-boot-rockchip

CI: https://source.denx.de/u-boot/custodians/u-boot-rockchip/-/pipelines/28119
- New Boards support:
    rk3588: MNT Reform2
    rk3528: Radxa ROCK 2A/2F
    rk3576: ArmSoM Sige1, Luckfox Omni3576, FriendlyElec NanoPi M5,
            Radxa ROCK 4D
    rk3568: Lunzn FastRhino R66S
- Other board level updates.

31 files changed, 425 insertions, 153 deletions

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 1028764b742..3db5474a05b 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -2073,30 +2073,30 @@ config ARCH_ROCKCHIP
 	bool "Support Rockchip SoCs"
 	select BINMAN if SPL_OPTEE || SPL
 	select DM
-	select DM_GPIO
-	select DM_I2C
-	select DM_PWM
-	select DM_REGULATOR
-	select DM_SERIAL
-	select DM_SPI
-	select DM_SPI_FLASH
 	select DM_USB_GADGET if USB_DWC3_GADGET
 	select ENABLE_ARM_SOC_BOOT0_HOOK
 	select OF_CONTROL
-	select MMC
-	select MTD
-	select SPI
 	select SPL_DM if SPL
-	select SPL_DM_SPI if SPL
-	select SPL_DM_SPI_FLASH if SPL
 	select SYS_MALLOC_F
 	select SYS_THUMB_BUILD if !ARM64
 	imply ADC
+	imply BOOTSTD_DEFAULTS
 	imply CMD_DM
 	imply DEBUG_UART_BOARD_INIT
-	imply BOOTSTD_DEFAULTS
+	imply DM_GPIO
+	imply DM_I2C
+	imply DM_PWM
+	imply DM_REGULATOR
+	imply DM_SERIAL
+	imply DM_SPI
+	imply DM_SPI_FLASH
 	imply FAT_WRITE
+	imply MMC
+	imply MTD
 	imply SARADC_ROCKCHIP
+	imply SPI
+	imply SPL_DM_SPI if SPL
+	imply SPL_DM_SPI_FLASH if SPL
 	imply SPL_SYSRESET
 	imply SPL_SYS_MALLOC_SIMPLE
 	imply SYS_NS16550
diff --git a/arch/arm/dts/rk3326-odroid-go2-u-boot.dtsi b/arch/arm/dts/rk3326-odroid-go2-u-boot.dtsi
index a0ab8b69f2e..170e0f7d847 100644
--- a/arch/arm/dts/rk3326-odroid-go2-u-boot.dtsi
+++ b/arch/arm/dts/rk3326-odroid-go2-u-boot.dtsi
@@ -3,83 +3,33 @@
  * Copyright (c) 2020 Theobroma Systems Design und Consulting GmbH
  */
 
-#include "rockchip-u-boot.dtsi"
+#include "rk3326-u-boot.dtsi"
 
-/ {
-	chosen {
-		u-boot,spl-boot-order = &sdmmc;
-	};
-
-	aliases {
-		i2c0 = &i2c0;
-		i2c1 = &i2c1;
-		mmc0 = &sdmmc;
-		serial1 = &uart1;
-		serial2 = &uart2;
-		spi0 = &sfc;
-	};
-
-	dmc {
-		bootph-all;
-		compatible = "rockchip,px30-dmc", "syscon";
-		reg = <0x0 0xff2a0000 0x0 0x1000>;
-	};
-
-	rng: rng@ff0b0000 {
-		compatible = "rockchip,cryptov2-rng";
-		reg = <0x0 0xff0b0000 0x0 0x4000>;
-		status = "okay";
-	};
-};
-
-/* U-Boot clk driver for px30 cannot set GPU_CLK */
-&cru {
-	bootph-all;
-	assigned-clocks = <&cru PLL_NPLL>,
-		<&cru ACLK_BUS_PRE>, <&cru ACLK_PERI_PRE>,
-		<&cru HCLK_BUS_PRE>, <&cru HCLK_PERI_PRE>,
-		<&cru PCLK_BUS_PRE>, <&cru PLL_CPLL>;
-
-	assigned-clock-rates = <1188000000>,
-		<200000000>, <200000000>,
-		<150000000>, <150000000>,
-		<100000000>, <17000000>;
-};
-
-&gpio0 {
-	bootph-all;
-	gpio-ranges = <&pinctrl 0 0 32>;
-};
-
-&gpio1 {
-	bootph-all;
-	gpio-ranges = <&pinctrl 0 32 32>;
-};
-
-&gpio2 {
-	bootph-all;
-	gpio-ranges = <&pinctrl 0 64 32>;
+&blue_led {
+	default-state = "on";
+	u-boot,default-brightness = <127>;
 };
 
-&gpio3 {
-	bootph-all;
-	gpio-ranges = <&pinctrl 0 96 32>;
+&i2c0_xfer {
+	bootph-pre-ram;
 };
 
-&grf {
-	bootph-all;
+&i2s1_2ch_mclk {
+	bootph-pre-ram;
 };
 
-&pmucru {
-	bootph-all;
+&pcfg_pull_none_smt {
+	bootph-pre-ram;
 };
 
-&pmugrf {
-	bootph-all;
+&pmic_int {
+	bootph-pre-ram;
 };
 
 &rk817 {
 	regulators {
+		bootph-pre-ram;
+
 		vcc_cam: LDO_REG9 {
 			regulator-name = "vcc_cam";
 			regulator-min-microvolt = <3000000>;
@@ -94,35 +44,28 @@
 };
 
 &saradc {
-	bootph-all;
-	status = "okay";
-};
-
-&sdmmc {
-	bootph-all;
-
-	/* mmc to sram can't do dma, prevent aborts transferring TF-A parts */
-	u-boot,spl-fifo-mode;
+	bootph-pre-ram;
+	vdd-microvolts = <1800000>;
 };
 
 &sfc {
-	bootph-all;
-};
-
-&{/spi@ff3a0000/flash@0} {
-	bootph-all;
+	flash@0 {
+		bootph-pre-ram;
+		bootph-some-ram;
+	};
 };
 
 &uart1 {
-	clock-frequency = <24000000>;
 	bootph-all;
+	clock-frequency = <24000000>;
 };
 
-&uart2 {
-	clock-frequency = <24000000>;
-	bootph-all;
+&uart1_cts {
+	bootph-pre-sram;
+	bootph-pre-ram;
 };
 
-&xin24m {
-	bootph-all;
+&uart1_xfer {
+	bootph-pre-sram;
+	bootph-pre-ram;
 };
diff --git a/arch/arm/dts/rk3326-odroid-go2-v11-u-boot.dtsi b/arch/arm/dts/rk3326-odroid-go2-v11-u-boot.dtsi
new file mode 100644
index 00000000000..89b2d9573ad
--- /dev/null
+++ b/arch/arm/dts/rk3326-odroid-go2-v11-u-boot.dtsi
@@ -0,0 +1,3 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+#include "rk3326-odroid-go2-u-boot.dtsi"
diff --git a/arch/arm/dts/rk3326-odroid-go3-u-boot.dtsi b/arch/arm/dts/rk3326-odroid-go3-u-boot.dtsi
new file mode 100644
index 00000000000..89b2d9573ad
--- /dev/null
+++ b/arch/arm/dts/rk3326-odroid-go3-u-boot.dtsi
@@ -0,0 +1,3 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+#include "rk3326-odroid-go2-u-boot.dtsi"
diff --git a/arch/arm/dts/rk3326-u-boot.dtsi b/arch/arm/dts/rk3326-u-boot.dtsi
new file mode 100644
index 00000000000..6503a9382b9
--- /dev/null
+++ b/arch/arm/dts/rk3326-u-boot.dtsi
@@ -0,0 +1,154 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2020 Theobroma Systems Design und Consulting GmbH
+ */
+
+#include "rockchip-u-boot.dtsi"
+
+/ {
+	aliases {
+		spi2 = &sfc;
+	};
+
+	chosen {
+		u-boot,spl-boot-order = "same-as-spl", &sdmmc;
+	};
+
+	dmc {
+		compatible = "rockchip,px30-dmc", "syscon";
+		reg = <0x0 0xff2a0000 0x0 0x1000>;
+		bootph-all;
+	};
+
+	rng: rng@ff0b0000 {
+		compatible = "rockchip,cryptov2-rng";
+		reg = <0x0 0xff0b0000 0x0 0x4000>;
+	};
+};
+
+#ifdef CONFIG_ROCKCHIP_SPI_IMAGE
+&binman {
+	simple-bin-spi {
+		mkimage {
+			args = "-n", CONFIG_SYS_SOC, "-T", "rksd";
+			offset = <0x10000>;
+		};
+	};
+};
+#endif
+
+&cru {
+	bootph-all;
+};
+
+&gpio0 {
+	gpio-ranges = <&pinctrl 0 0 32>;
+};
+
+&gpio1 {
+	gpio-ranges = <&pinctrl 0 32 32>;
+};
+
+&gpio2 {
+	gpio-ranges = <&pinctrl 0 64 32>;
+};
+
+&gpio3 {
+	gpio-ranges = <&pinctrl 0 96 32>;
+};
+
+&grf {
+	bootph-all;
+};
+
+&otp {
+	bootph-some-ram;
+};
+
+&pcfg_pull_none {
+	bootph-all;
+};
+
+&pcfg_pull_none_8ma {
+	bootph-pre-ram;
+	bootph-some-ram;
+};
+
+&pcfg_pull_up {
+	bootph-all;
+};
+
+&pcfg_pull_up_8ma {
+	bootph-pre-ram;
+	bootph-some-ram;
+};
+
+&pmucru {
+	bootph-all;
+};
+
+&pmugrf {
+	bootph-all;
+};
+
+&sdmmc {
+	bootph-pre-ram;
+	bootph-some-ram;
+
+	/* mmc to sram can't do dma, prevent aborts transferring TF-A parts */
+	u-boot,spl-fifo-mode;
+};
+
+&sdmmc_bus4 {
+	bootph-pre-ram;
+	bootph-some-ram;
+};
+
+&sdmmc_clk {
+	bootph-pre-ram;
+	bootph-some-ram;
+};
+
+&sdmmc_cmd {
+	bootph-pre-ram;
+	bootph-some-ram;
+};
+
+&sdmmc_det {
+	bootph-pre-ram;
+	bootph-some-ram;
+};
+
+&sfc {
+	bootph-some-ram;
+	u-boot,spl-sfc-no-dma;
+};
+
+&sfc_bus2 {
+	bootph-pre-ram;
+	bootph-some-ram;
+};
+
+&sfc_clk {
+	bootph-pre-ram;
+	bootph-some-ram;
+};
+
+&sfc_cs0 {
+	bootph-pre-ram;
+	bootph-some-ram;
+};
+
+&uart2 {
+	bootph-all;
+	clock-frequency = <24000000>;
+};
+
+&uart2m1_xfer {
+	bootph-pre-sram;
+	bootph-pre-ram;
+};
+
+&xin24m {
+	bootph-all;
+};
diff --git a/arch/arm/dts/rk3328-u-boot.dtsi b/arch/arm/dts/rk3328-u-boot.dtsi
index b0e50a973a8..8ffc9ed3d57 100644
--- a/arch/arm/dts/rk3328-u-boot.dtsi
+++ b/arch/arm/dts/rk3328-u-boot.dtsi
@@ -132,6 +132,10 @@
 	bootph-pre-ram;
 };
 
+&spi0 {
+	bootph-some-ram;
+};
+
 &uart2 {
 	bootph-all;
 	clock-frequency = <24000000>;
diff --git a/arch/arm/dts/rk3528-armsom-sige1-u-boot.dtsi b/arch/arm/dts/rk3528-armsom-sige1-u-boot.dtsi
new file mode 100644
index 00000000000..3e2fbd81da1
--- /dev/null
+++ b/arch/arm/dts/rk3528-armsom-sige1-u-boot.dtsi
@@ -0,0 +1,11 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+#include "rk3528-u-boot.dtsi"
+
+&vdd_arm {
+	regulator-init-microvolt = <953000>;
+};
+
+&vdd_logic {
+	regulator-init-microvolt = <900000>;
+};
diff --git a/arch/arm/dts/rk3528-radxa-e20c-u-boot.dtsi b/arch/arm/dts/rk3528-radxa-e20c-u-boot.dtsi
index 16c47e6b9a9..e8c8dc2f032 100644
--- a/arch/arm/dts/rk3528-radxa-e20c-u-boot.dtsi
+++ b/arch/arm/dts/rk3528-radxa-e20c-u-boot.dtsi
@@ -2,8 +2,9 @@
 
 #include "rk3528-u-boot.dtsi"
 
-&sdhci {
-	mmc-hs200-1_8v;
+&saradc {
+	bootph-pre-ram;
+	vdd-microvolts = <1800000>;
 };
 
 &vdd_arm {
diff --git a/arch/arm/dts/rk3528-rock-2-u-boot.dtsi b/arch/arm/dts/rk3528-rock-2-u-boot.dtsi
new file mode 100644
index 00000000000..e8c8dc2f032
--- /dev/null
+++ b/arch/arm/dts/rk3528-rock-2-u-boot.dtsi
@@ -0,0 +1,16 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+#include "rk3528-u-boot.dtsi"
+
+&saradc {
+	bootph-pre-ram;
+	vdd-microvolts = <1800000>;
+};
+
+&vdd_arm {
+	regulator-init-microvolt = <953000>;
+};
+
+&vdd_logic {
+	regulator-init-microvolt = <900000>;
+};
diff --git a/arch/arm/dts/rk3528-rock-2a-u-boot.dtsi b/arch/arm/dts/rk3528-rock-2a-u-boot.dtsi
new file mode 100644
index 00000000000..bd35ef88298
--- /dev/null
+++ b/arch/arm/dts/rk3528-rock-2a-u-boot.dtsi
@@ -0,0 +1,3 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+#include "rk3528-rock-2-u-boot.dtsi"
diff --git a/arch/arm/dts/rk3528-rock-2f-u-boot.dtsi b/arch/arm/dts/rk3528-rock-2f-u-boot.dtsi
new file mode 100644
index 00000000000..bd35ef88298
--- /dev/null
+++ b/arch/arm/dts/rk3528-rock-2f-u-boot.dtsi
@@ -0,0 +1,3 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+#include "rk3528-rock-2-u-boot.dtsi"
diff --git a/arch/arm/dts/rk3568-fastrhino-r66s-u-boot.dtsi b/arch/arm/dts/rk3568-fastrhino-r66s-u-boot.dtsi
new file mode 100644
index 00000000000..a2b60da6586
--- /dev/null
+++ b/arch/arm/dts/rk3568-fastrhino-r66s-u-boot.dtsi
@@ -0,0 +1,3 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "rk356x-u-boot.dtsi"
diff --git a/arch/arm/dts/rk356x-u-boot.dtsi b/arch/arm/dts/rk356x-u-boot.dtsi
index 87186973953..738b9673d35 100644
--- a/arch/arm/dts/rk356x-u-boot.dtsi
+++ b/arch/arm/dts/rk356x-u-boot.dtsi
@@ -157,6 +157,7 @@
 };
 
 &sfc {
+	bootph-some-ram;
 	u-boot,spl-sfc-no-dma;
 };
 
diff --git a/arch/arm/dts/rk3576-luckfox-omni3576-u-boot.dtsi b/arch/arm/dts/rk3576-luckfox-omni3576-u-boot.dtsi
new file mode 100644
index 00000000000..28773696b97
--- /dev/null
+++ b/arch/arm/dts/rk3576-luckfox-omni3576-u-boot.dtsi
@@ -0,0 +1,11 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+#include "rk3576-u-boot.dtsi"
+
+&green_led {
+	default-state = "on";
+};
+
+&sdhci {
+	cap-mmc-highspeed;
+};
diff --git a/arch/arm/dts/rk3576-nanopi-m5-u-boot.dtsi b/arch/arm/dts/rk3576-nanopi-m5-u-boot.dtsi
new file mode 100644
index 00000000000..0767fbb8168
--- /dev/null
+++ b/arch/arm/dts/rk3576-nanopi-m5-u-boot.dtsi
@@ -0,0 +1,22 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+#include "rk3576-u-boot.dtsi"
+
+&led1 {
+	default-state = "off";
+};
+
+&led2 {
+	default-state = "off";
+};
+
+&led_sys {
+	default-state = "on";
+};
+
+&sfc1 {
+	flash@0 {
+		bootph-pre-ram;
+		bootph-some-ram;
+	};
+};
diff --git a/arch/arm/dts/rk3576-rock-4d-u-boot.dtsi b/arch/arm/dts/rk3576-rock-4d-u-boot.dtsi
new file mode 100644
index 00000000000..db46553b66a
--- /dev/null
+++ b/arch/arm/dts/rk3576-rock-4d-u-boot.dtsi
@@ -0,0 +1,10 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+#include "rk3576-u-boot.dtsi"
+
+&sfc0 {
+	flash@0 {
+		bootph-pre-ram;
+		bootph-some-ram;
+	};
+};
diff --git a/arch/arm/dts/rk3576-u-boot.dtsi b/arch/arm/dts/rk3576-u-boot.dtsi
index fb5a107f47d..dc3771b556a 100644
--- a/arch/arm/dts/rk3576-u-boot.dtsi
+++ b/arch/arm/dts/rk3576-u-boot.dtsi
@@ -6,6 +6,11 @@
 #include "rockchip-u-boot.dtsi"
 
 / {
+	aliases {
+		spi5 = &sfc0;
+		spi6 = &sfc1;
+	};
+
 	chosen {
 		u-boot,spl-boot-order = "same-as-spl", &sdmmc, &sdhci;
 	};
@@ -16,6 +21,17 @@
 	};
 };
 
+#ifdef CONFIG_ROCKCHIP_SPI_IMAGE
+&binman {
+	simple-bin-spi {
+		mkimage {
+			args = "-n", CONFIG_SYS_SOC, "-T", "rksd";
+			offset = <0x8000>;
+		};
+	};
+};
+#endif
+
 &cru {
 	bootph-all;
 };
@@ -45,6 +61,26 @@
 	bootph-some-ram;
 };
 
+&fspi0_csn0 {
+	bootph-pre-ram;
+	bootph-some-ram;
+};
+
+&fspi0_pins {
+	bootph-pre-ram;
+	bootph-some-ram;
+};
+
+&fspi1m1_csn0 {
+	bootph-pre-ram;
+	bootph-some-ram;
+};
+
+&fspi1m1_pins {
+	bootph-pre-ram;
+	bootph-some-ram;
+};
+
 &ioc_grf {
 	bootph-all;
 };
@@ -116,6 +152,16 @@
 	bootph-some-ram;
 };
 
+&sfc0 {
+	bootph-some-ram;
+	u-boot,spl-sfc-no-dma;
+};
+
+&sfc1 {
+	bootph-some-ram;
+	u-boot,spl-sfc-no-dma;
+};
+
 &sys_grf {
 	bootph-all;
 };
diff --git a/arch/arm/dts/rk3588s-u-boot.dtsi b/arch/arm/dts/rk3588s-u-boot.dtsi
index 5eeb138f351..71fd352f640 100644
--- a/arch/arm/dts/rk3588s-u-boot.dtsi
+++ b/arch/arm/dts/rk3588s-u-boot.dtsi
@@ -140,6 +140,7 @@
 };
 
 &sfc {
+	bootph-some-ram;
 	u-boot,spl-sfc-no-dma;
 };
 
diff --git a/arch/arm/include/asm/arch-rockchip/bootrom.h b/arch/arm/include/asm/arch-rockchip/bootrom.h
index e736772fda7..b15938c021d 100644
--- a/arch/arm/include/asm/arch-rockchip/bootrom.h
+++ b/arch/arm/include/asm/arch-rockchip/bootrom.h
@@ -64,4 +64,6 @@ extern const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1];
  */
 #define BROM_BOOTSOURCE_ID_ADDR   (CFG_IRAM_BASE + 0x10)
 
+u32 read_brom_bootsource_id(void);
+
 #endif
diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile
index ae15a9f8a2d..06fb527b21a 100644
--- a/arch/arm/mach-rockchip/Makefile
+++ b/arch/arm/mach-rockchip/Makefile
@@ -11,9 +11,9 @@ obj-spl-$(CONFIG_ROCKCHIP_BROM_HELPER) += bootrom.o
 obj-spl-$(CONFIG_SPL_ROCKCHIP_COMMON_BOARD) += spl.o spl-boot-order.o spl_common.o
 obj-tpl-$(CONFIG_ROCKCHIP_BROM_HELPER) += bootrom.o
 obj-tpl-$(CONFIG_TPL_ROCKCHIP_COMMON_BOARD) += tpl.o spl_common.o
-obj-tpl-$(CONFIG_ROCKCHIP_PX30) += px30-board-tpl.o
+obj-tpl-$(CONFIG_ROCKCHIP_PX30) += px30-board-tpl.o spl_common.o
 
-obj-spl-$(CONFIG_ROCKCHIP_RK3036) += rk3036-board-spl.o
+obj-spl-$(CONFIG_ROCKCHIP_RK3036) += rk3036-board-spl.o spl_common.o
 
 ifeq ($(CONFIG_XPL_BUILD)$(CONFIG_TPL_BUILD),)
 
diff --git a/arch/arm/mach-rockchip/px30-board-tpl.c b/arch/arm/mach-rockchip/px30-board-tpl.c
index f0b3c5f83f4..2a3dcdac845 100644
--- a/arch/arm/mach-rockchip/px30-board-tpl.c
+++ b/arch/arm/mach-rockchip/px30-board-tpl.c
@@ -4,32 +4,9 @@
  */
 
 #include <debug_uart.h>
-#include <dm.h>
-#include <init.h>
-#include <ram.h>
-#include <spl.h>
-#include <asm/io.h>
 #include <asm/arch-rockchip/bootrom.h>
 #include <asm/arch-rockchip/sdram_px30.h>
-
-#define TIMER_LOAD_COUNT0	0x00
-#define TIMER_LOAD_COUNT1	0x04
-#define TIMER_CUR_VALUE0	0x08
-#define TIMER_CUR_VALUE1	0x0c
-#define TIMER_CONTROL_REG	0x10
-
-#define TIMER_EN	0x1
-#define	TIMER_FMODE	(0 << 1)
-#define	TIMER_RMODE	(1 << 1)
-
-void secure_timer_init(void)
-{
-	writel(0, CONFIG_ROCKCHIP_STIMER_BASE + TIMER_CONTROL_REG);
-	writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE + TIMER_LOAD_COUNT0);
-	writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE + TIMER_LOAD_COUNT1);
-	writel(TIMER_EN | TIMER_FMODE,
-	       CONFIG_ROCKCHIP_STIMER_BASE + TIMER_CONTROL_REG);
-}
+#include <asm/arch-rockchip/timer.h>
 
 void board_init_f(ulong dummy)
 {
@@ -50,7 +27,8 @@ void board_init_f(ulong dummy)
 #endif
 #endif
 
-	secure_timer_init();
+	rockchip_stimer_init();
+
 	ret = sdram_init();
 	if (ret)
 		printascii("sdram_init failed\n");
diff --git a/arch/arm/mach-rockchip/rk3036-board-spl.c b/arch/arm/mach-rockchip/rk3036-board-spl.c
index 64e100172fa..d69139278a8 100644
--- a/arch/arm/mach-rockchip/rk3036-board-spl.c
+++ b/arch/arm/mach-rockchip/rk3036-board-spl.c
@@ -5,28 +5,9 @@
 
 #include <debug_uart.h>
 #include <init.h>
-#include <asm/io.h>
 #include <asm/arch-rockchip/bootrom.h>
 #include <asm/arch-rockchip/sdram_rk3036.h>
-
-#define TIMER_LOAD_COUNT_L	0x00
-#define TIMER_LOAD_COUNT_H	0x04
-#define TIMER_CONTROL_REG	0x10
-#define TIMER_EN	0x1
-#define	TIMER_FMODE	(0 << 1)
-#define	TIMER_RMODE	(1 << 1)
-
-void rockchip_stimer_init(void)
-{
-	asm volatile("mcr p15, 0, %0, c14, c0, 0"
-		     : : "r"(CONFIG_COUNTER_FREQUENCY));
-
-	writel(0, CONFIG_ROCKCHIP_STIMER_BASE + TIMER_CONTROL_REG);
-	writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE);
-	writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE + 4);
-	writel(TIMER_EN | TIMER_FMODE, CONFIG_ROCKCHIP_STIMER_BASE +
-	       TIMER_CONTROL_REG);
-}
+#include <asm/arch-rockchip/timer.h>
 
 void board_init_f(ulong dummy)
 {
diff --git a/arch/arm/mach-rockchip/rk3399/rk3399.c b/arch/arm/mach-rockchip/rk3399/rk3399.c
index 43d151708e4..8687a9347ec 100644
--- a/arch/arm/mach-rockchip/rk3399/rk3399.c
+++ b/arch/arm/mach-rockchip/rk3399/rk3399.c
@@ -61,8 +61,8 @@ struct mm_region *mem_map = rk3399_mem_map;
 #define TIMER_CONTROL_REG	0x1c
 
 #define TIMER_EN	0x1
-#define TIMER_FMODE	BIT(0)
-#define TIMER_RMODE	BIT(1)
+#define TIMER_FMODE	(0 << 1)
+#define TIMER_RMODE	(1 << 1)
 
 void rockchip_stimer_init(void)
 {
diff --git a/arch/arm/mach-rockchip/rk3528/Kconfig b/arch/arm/mach-rockchip/rk3528/Kconfig
index 993b2dd274e..480ac2942ff 100644
--- a/arch/arm/mach-rockchip/rk3528/Kconfig
+++ b/arch/arm/mach-rockchip/rk3528/Kconfig
@@ -1,5 +1,10 @@
 if ROCKCHIP_RK3528
 
+config TARGET_RADXA_ROCK_2_RK3528
+	bool "Radxa ROCK 2A/2F"
+	help
+	  Radxa ROCK 2A/2F single board computers with a RK3528A SoC.
+
 config ROCKCHIP_BOOT_MODE_REG
 	default 0xff370200
 
@@ -9,6 +14,8 @@ config ROCKCHIP_STIMER_BASE
 config SYS_SOC
 	default "rk3528"
 
+source "board/radxa/rock-2-rk3528/Kconfig"
+
 config SYS_CONFIG_NAME
 	default "rk3528_common"
 
diff --git a/arch/arm/mach-rockchip/rk3528/MAINTAINERS b/arch/arm/mach-rockchip/rk3528/MAINTAINERS
index f343f71cf7f..ee840396e8b 100644
--- a/arch/arm/mach-rockchip/rk3528/MAINTAINERS
+++ b/arch/arm/mach-rockchip/rk3528/MAINTAINERS
@@ -9,3 +9,9 @@ M:	Jonas Karlman <[email protected]>
 S:	Maintained
 F:	arch/arm/dts/rk3528-radxa-e20c*
 F:	configs/radxa-e20c-rk3528_defconfig
+
+SIGE1-RK3528
+M:	Jonas Karlman <[email protected]>
+S:	Maintained
+F:	arch/arm/dts/rk3528-armsom-sige1*
+F:	configs/sige1-rk3528_defconfig
diff --git a/arch/arm/mach-rockchip/rk3528/rk3528.c b/arch/arm/mach-rockchip/rk3528/rk3528.c
index f9bfc445b85..57ead0006f1 100644
--- a/arch/arm/mach-rockchip/rk3528/rk3528.c
+++ b/arch/arm/mach-rockchip/rk3528/rk3528.c
@@ -49,6 +49,21 @@ void board_debug_uart_init(void)
 {
 }
 
+u32 read_brom_bootsource_id(void)
+{
+	u32 bootsource_id = readl(BROM_BOOTSOURCE_ID_ADDR);
+
+	/* Re-map the raw value read from reg to an existing BROM_BOOTSOURCE
+	 * enum value to avoid having to create a larger boot_devices table.
+	 */
+	if (bootsource_id == 0x81)
+		return BROM_BOOTSOURCE_USB;
+	else if (bootsource_id > BROM_LAST_BOOTSOURCE)
+		log_debug("Unknown bootsource %x\n", bootsource_id);
+
+	return bootsource_id;
+}
+
 int arch_cpu_init(void)
 {
 	u32 val;
diff --git a/arch/arm/mach-rockchip/rk3576/MAINTAINERS b/arch/arm/mach-rockchip/rk3576/MAINTAINERS
index 94ef74d429f..393edd3984c 100644
--- a/arch/arm/mach-rockchip/rk3576/MAINTAINERS
+++ b/arch/arm/mach-rockchip/rk3576/MAINTAINERS
@@ -4,6 +4,24 @@ S:	Maintained
 F:	arch/arm/dts/rk3576-generic*
 F:	configs/generic-rk3576_defconfig
 
+NANOPI-M5-RK3576
+M:	Jonas Karlman <[email protected]>
+S:	Maintained
+F:	arch/arm/dts/rk3576-nanopi-m5*
+F:	configs/nanopi-m5-rk3576_defconfig
+
+OMNI3576-RK3576
+M:	Jonas Karlman <[email protected]>
+S:	Maintained
+F:	arch/arm/dts/rk3576-luckfox-omni3576*
+F:	configs/omni3576-rk3576_defconfig
+
+ROCK-4D-RK3576
+M:	Jonas Karlman <[email protected]>
+S:	Maintained
+F:	arch/arm/dts/rk3576-rock-4d*
+F:	configs/rock-4d-rk3576_defconfig
+
 SIGE5-RK3576
 M:	Jonas Karlman <[email protected]>
 S:	Maintained
diff --git a/arch/arm/mach-rockchip/rk3576/rk3576.c b/arch/arm/mach-rockchip/rk3576/rk3576.c
index a6c2fbdc484..a1e8a7572fa 100644
--- a/arch/arm/mach-rockchip/rk3576/rk3576.c
+++ b/arch/arm/mach-rockchip/rk3576/rk3576.c
@@ -36,8 +36,15 @@
 #define USB_GRF_BASE		0x2601E000
 #define USB3OTG0_CON1		0x0030
 
+enum {
+	BROM_BOOTSOURCE_FSPI0 = 3,
+	BROM_BOOTSOURCE_FSPI1_M1 = 6,
+};
+
 const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1] = {
 	[BROM_BOOTSOURCE_EMMC] = "/soc/mmc@2a330000",
+	[BROM_BOOTSOURCE_FSPI0] = "/soc/spi@2a340000/flash@0",
+	[BROM_BOOTSOURCE_FSPI1_M1] = "/soc/spi@2a300000/flash@0",
 	[BROM_BOOTSOURCE_SD] = "/soc/mmc@2a310000",
 };
 
@@ -85,6 +92,24 @@ void board_debug_uart_init(void)
 {
 }
 
+u32 read_brom_bootsource_id(void)
+{
+	u32 bootsource_id = readl(BROM_BOOTSOURCE_ID_ADDR);
+
+	/* Re-map the raw value read from reg to a redefined or existing
+	 * BROM_BOOTSOURCE enum value to avoid having to create a larger
+	 * boot_devices table.
+	 */
+	if (bootsource_id == 0x23)
+		return BROM_BOOTSOURCE_FSPI1_M1;
+	else if (bootsource_id == 0x81)
+		return BROM_BOOTSOURCE_USB;
+	else if (bootsource_id > BROM_LAST_BOOTSOURCE)
+		log_debug("Unknown bootsource %x\n", bootsource_id);
+
+	return bootsource_id;
+}
+
 #define HP_TIMER_BASE			CONFIG_ROCKCHIP_STIMER_BASE
 #define HP_CTRL_REG			0x04
 #define TIMER_EN			BIT(0)
diff --git a/arch/arm/mach-rockchip/spl-boot-order.c b/arch/arm/mach-rockchip/spl-boot-order.c
index 561bddd12a6..1ea1033b5ea 100644
--- a/arch/arm/mach-rockchip/spl-boot-order.c
+++ b/arch/arm/mach-rockchip/spl-boot-order.c
@@ -40,7 +40,7 @@ static int spl_node_to_boot_device(int node)
 	 * aware of the block-device layer.  Until then (and to avoid unneeded
 	 * delays in getting this feature out), it lives at the board-level.
 	 */
-	if (!uclass_get_device_by_of_offset(UCLASS_MMC, node, &parent)) {
+	if (!uclass_find_device_by_of_offset(UCLASS_MMC, node, &parent)) {
 		struct udevice *dev;
 		struct blk_desc *desc = NULL;
 
@@ -72,7 +72,7 @@ static int spl_node_to_boot_device(int node)
 	 * extended with awareness of the BLK layer (and matching OF_CONTROL)
 	 * soon.
 	 */
-	if (!uclass_get_device_by_of_offset(UCLASS_SPI_FLASH, node, &parent))
+	if (!uclass_find_device_by_of_offset(UCLASS_SPI_FLASH, node, &parent))
 		return BOOT_DEVICE_SPI;
 
 	return -1;
diff --git a/arch/arm/mach-rockchip/spl.c b/arch/arm/mach-rockchip/spl.c
index f4d29bbdd17..1ce3a3b0554 100644
--- a/arch/arm/mach-rockchip/spl.c
+++ b/arch/arm/mach-rockchip/spl.c
@@ -31,6 +31,11 @@ int board_return_to_bootrom(struct spl_image_info *spl_image,
 __weak const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1] = {
 };
 
+__weak u32 read_brom_bootsource_id(void)
+{
+	return readl(BROM_BOOTSOURCE_ID_ADDR);
+}
+
 const char *board_spl_was_booted_from(void)
 {
 	static u32 brom_bootsource_id_cache = BROM_BOOTSOURCE_UNKNOWN;
@@ -40,7 +45,7 @@ const char *board_spl_was_booted_from(void)
 	if (brom_bootsource_id_cache != BROM_BOOTSOURCE_UNKNOWN)
 		bootdevice_brom_id = brom_bootsource_id_cache;
 	else
-		bootdevice_brom_id = readl(BROM_BOOTSOURCE_ID_ADDR);
+		bootdevice_brom_id = read_brom_bootsource_id();
 
 	if (bootdevice_brom_id < ARRAY_SIZE(boot_devices))
 		bootdevice_ofpath = boot_devices[bootdevice_brom_id];
diff --git a/arch/arm/mach-rockchip/spl_common.c b/arch/arm/mach-rockchip/spl_common.c
index b29f33448ab..208cd22fcad 100644
--- a/arch/arm/mach-rockchip/spl_common.c
+++ b/arch/arm/mach-rockchip/spl_common.c
@@ -10,8 +10,8 @@
 #define TIMER_LOAD_COUNT_H	0x04
 #define TIMER_CONTROL_REG	0x10
 #define TIMER_EN	0x1
-#define	TIMER_FMODE	BIT(0)
-#define	TIMER_RMODE	BIT(1)
+#define	TIMER_FMODE	(0 << 1)
+#define	TIMER_RMODE	(1 << 1)
 
 __weak void rockchip_stimer_init(void)
 {