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| author | Marek Vasut <[email protected]> | 2024-07-08 13:43:23 +0200 |
|---|---|---|
| committer | Patrick Delaunay <[email protected]> | 2024-09-25 19:40:46 +0200 |
| commit | b0348a97de9e01fe2165520cfc1bc9ed5594f9ab (patch) | |
| tree | aefd6eefd8765f43d96cca934bce06fd695b12fe /doc/develop/python_cq.rst | |
| parent | 6b84683acc86f94c7dc15d621b5bca533bf8a01a (diff) | |
ARM: stm32: Fix secure_waitbits() mask check
Do not apply bitwise AND to register value and expected value, only
apply bitwise AND to register value and mask, and only then compare
the result with expected value that the function polls for.
Fixes: b49105320a5b ("stm32mp: psci: Implement PSCI system suspend and DRAM SSR")
Signed-off-by: Marek Vasut <[email protected]>
Diffstat (limited to 'doc/develop/python_cq.rst')
0 files changed, 0 insertions, 0 deletions