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| author | Balaji Selvanathan <[email protected]> | 2026-01-13 12:28:55 +0530 |
|---|---|---|
| committer | Casey Connolly <[email protected]> | 2026-01-14 16:25:09 +0100 |
| commit | f4886799a0afd20ab4df663247bff3c1a78a2b85 (patch) | |
| tree | d68aae0b3f561bdc1b9b7b51d90b9db674af38fc /doc/develop | |
| parent | 3422e915aca58faf32a80eaa3a05e7894307f81c (diff) | |
clk: qcom: sa8775p: Fix USB clock configuration and add resets
Correct USB30 primary clock RCG configuration and add missing
USB3_PRIM_PHY_AUX_CMD_RCGR RCG configuration.
Above taken from Linux commit 08c51ceb12f7 ("clk: qcom: add the GCC driver for sa8775p")
Add missing USB3_PRIM_PHY_PIPE_CLK gate clock definition.
Extend reset map with USB-related BCR entries and video BCR
for comprehensive reset control support.
Signed-off-by: Balaji Selvanathan <[email protected]>
Link: https://patch.msgid.link/[email protected]
[casey: indentation fix]
Signed-off-by: Casey Connolly <[email protected]>
Diffstat (limited to 'doc/develop')
0 files changed, 0 insertions, 0 deletions