Merge branch '2022-04-01-arm-semihosting-cleanups-and-new-features' into next

This brings in two related series.  The first from Andre:

This series is the continuation of last year's effort to support the new
Armv8-R64 application profile. This led to a significant rework of the
existing fastmodel (FVP) support, to both upgrade it to newest U-Boot
standards (OF_CONTROL and distro_boot support), but also to generalise
the code, so that plugging in the v8-R64 support in the last patch gets
much easier. This is because apart from the twisted memory map between
the two profiles there is actually little difference, when it comes to
U-Boot relevant parts of the hardware.

I kept the legacy semihosting support (which picks up magic files from
the current directory), but if that fails, we go and try virtio-blk
(.iso installer images work), then virtio-net.

Please have a look, and give it a try, if possible. Both the v8-R and
v8-A FVP models are available for free on the Arm website[1].

Patch 01/11 fixes a regression introduced in December, it should be
applied now. The rest of the patches are for the next merge window.

[1]
https://developer.arm.com/tools-and-software/simulation-models/fast-models

And the second from Sean (where we exclude 27, 28 and 29 for now):
This cleans up the semihosting code and adds the following new features:

- hostfs support (like sandbox)
- support for being used as a SPL boot device
- serial device support
- falling back to normal drivers if semihosting is disabled

The main device affected by these changes is vexpress64, so I'd
appreciate
if Andre (or anyone else) could try booting.

These changes are motivated by bringup for ls1046a. When forcing JTAG
boot, this device disables most communication peripherals, including
serial and ethernet devices. This appears to be fixed in later
generation devices, but we are stuck with it for now. Semihosting
provides an easy way to run a few console commands.

The patches in this series are organized as follows:

0-4: rST conversions and other documentation updates
5-9: Semihosting cleanups
10-14: Filesystem support (including SPL boot device)
15-16: Serial support
16: Documentation update
17: JTAG boot support for LS1046A
19-25: Semihosting fallback
26-29: DM puts support

The last two groups of patches are "bonus;" the first 17 patches stand
on their own. The last two groups could be broken out as separate
series, but I have kept them in this one to help with my sanity (and not
have to deal with too many outstanding series).

Patch 14 depends on [1] to apply cleanly. Patch 17 depends on [2] for
correctness. This series should be applied to u-boot/next (in
particular, the EROFS series must have been applied).

[1]
https://lore.kernel.org/u-boot/CACRpkdZ+9fmNjC_mvrbPa9-iuTQVd8UkJ7Zpe7cL0c5vZygsVw@mail.gmail.com/T/
[2]
https://lore.kernel.org/u-boot/[email protected]/

7 files changed, 305 insertions, 39 deletions

diff --git a/doc/README.semihosting b/doc/README.semihosting
deleted file mode 100644
index f382d0131eb..00000000000
--- a/doc/README.semihosting
+++ /dev/null
@@ -1,38 +0,0 @@
-SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright 2014 Broadcom Corporation.
- */
-
-Semihosting is ARM's way of having a real or virtual target communicate
-with a host or host debugger for basic operations such as file I/O,
-console I/O, etc. Please see
-http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0471c/Bgbjjgij.html for more information.
-
-For developing on armv8 virtual fastmodel platforms, semihosting is a
-valuable tool since it allows access to image/configuration files before
-eMMC or other NV media are available.
-
-There are two main ARM virtual Fixed Virtual Platform (FVP) models,
-Versatile Express (VE) FVP and BASE FVP (See
-http://www.arm.com/products/tools/models/fast-models/foundation-model.php)
-The initial vexpress64 u-boot board created here runs on the VE virtual
-platform using the license-free Foundation_v8 simulator. Fortunately,
-the Foundation_v8 simulator also supports the BASE_FVP model which
-companies can purchase licenses for and contain much more functionality.
-So we can, in u-boot, run either model by either using the VE FVP (default),
-or turning on CONFIG_BASE_FVP for the more full featured model.
-
-Rather than create a new armv8 board similar to armltd/vexpress64, add
-semihosting calls to the existing one, enabled with CONFIG_SEMIHOSTING
-and CONFIG_BASE_FVP both set. Also reuse the existing board config file
-vexpress_aemv8.h but differentiate the two models by the presence or
-absence of CONFIG_BASE_FVP. This change is tested and works on both the
-Foundation and Base fastmodel simulators.
-
-The semihosting code adds a command:
-
-  smhload <image> <address> [env var]
-
-That will load an image from the host filesystem into RAM at the specified
-address and optionally store the load end address in the specified
-environment variable.
diff --git a/doc/arch/arm64.rst b/doc/arch/arm64.rst
index 80498f6f6b8..7c0713504c4 100644
--- a/doc/arch/arm64.rst
+++ b/doc/arch/arm64.rst
@@ -18,7 +18,8 @@ Notes
    classical firmware (like initial hardware setup, CPU errata workarounds
    or SMP bringup). U-Boot can be entered in EL2 when its main purpose is
    that of a boot loader. It can drop to lower exception levels before
-   entering the OS.
+   entering the OS. For ARMv8-R it is recommened to enter at S-EL1, as for this
+   architecture there is no S-EL3.
 
 2. U-Boot for arm64 is compiled with AArch64-gcc. AArch64-gcc
    use rela relocation format, a tool(tools/relocate-rela) by Scott Wood
diff --git a/doc/board/armltd/vexpress64.rst b/doc/board/armltd/vexpress64.rst
index d87b1c38f5b..a7f771d2667 100644
--- a/doc/board/armltd/vexpress64.rst
+++ b/doc/board/armltd/vexpress64.rst
@@ -6,6 +6,7 @@ Arm Versatile Express
 The vexpress_* board configuration supports the following platforms:
 
  * FVP_Base_RevC-2xAEMvA
+ * FVP_BaseR_AEMv8R
  * Juno development board
 
 Fixed Virtual Platforms
diff --git a/doc/board/nxp/index.rst b/doc/board/nxp/index.rst
index 63956287c5b..4514b8951ba 100644
--- a/doc/board/nxp/index.rst
+++ b/doc/board/nxp/index.rst
@@ -13,6 +13,7 @@ NXP Semiconductors
    imx8qxp_mek
    imxrt1020-evk
    imxrt1050-evk
+   ls1046ardb
    mx6sabreauto
    mx6sabresd
    mx6ul_14x14_evk
diff --git a/doc/board/nxp/ls1046ardb.rst b/doc/board/nxp/ls1046ardb.rst
new file mode 100644
index 00000000000..35465d00612
--- /dev/null
+++ b/doc/board/nxp/ls1046ardb.rst
@@ -0,0 +1,193 @@
+.. SPDX-License-Identifier: GPL-2.0+
+
+LS1046ARDB
+==========
+
+The LS1046A Reference Design Board (RDB) is a high-performance computing,
+evaluation, and development platform that supports the QorIQ LS1046A
+LayerScape Architecture processor. The LS1046ARDB provides SW development
+platform for the Freescale LS1046A processor series, with a complete
+debugging environment. The LS1046A RDB is lead-free and RoHS-compliant.
+
+LS1046A SoC Overview
+--------------------
+Please refer arch/arm/cpu/armv8/fsl-layerscape/doc/README.soc for LS1046A
+SoC overview.
+
+LS1046ARDB board Overview
+-------------------------
+- SERDES1 Connections, 4 lanes supporting:
+
+  - Lane0: 10GBase-R with x1 RJ45 connector
+  - Lane1: 10GBase-R Cage
+  - Lane2: SGMII.5
+  - Lane3: SGMII.6
+
+- SERDES2 Connections, 4 lanes supporting:
+
+  - Lane0: PCIe1 with miniPCIe slot
+  - Lane1: PCIe2 with PCIe x2 slot
+  - Lane2: PCIe3 with PCIe x4 slot
+  - Lane3: SATA
+
+- DDR Controller
+
+  - 8GB 64bits DDR4 SDRAM. Support rates of up to 2133MT/s
+
+- IFC/Local Bus
+
+  - One 512 MB NAND flash with ECC support
+  - CPLD connection
+
+- USB 3.0
+
+  - one Type A port, one Micro-AB port
+
+- SDHC: connects directly to a full SD/MMC slot
+- DSPI: 64 MB high-speed flash Memory for boot code and storage (up to 108MHz)
+- 4 I2C controllers
+- UART
+
+  - Two 4-pin serial ports at up to 115.2 Kbit/s
+  - Two DB9 D-Type connectors supporting one Serial port each
+
+- ARM JTAG support
+
+Memory map from core's view
+----------------------------
+
+================== ================== ================ =====
+Start Address      End Address        Description      Size
+================== ================== ================ =====
+``0x00_0000_0000`` ``0x00_000F_FFFF`` Secure Boot ROM  1M
+``0x00_0100_0000`` ``0x00_0FFF_FFFF`` CCSRBAR          240M
+``0x00_1000_0000`` ``0x00_1000_FFFF`` OCRAM0           64K
+``0x00_1001_0000`` ``0x00_1001_FFFF`` OCRAM1           64K
+``0x00_2000_0000`` ``0x00_20FF_FFFF`` DCSR             16M
+``0x00_7E80_0000`` ``0x00_7E80_FFFF`` IFC - NAND Flash 64K
+``0x00_7FB0_0000`` ``0x00_7FB0_0FFF`` IFC - CPLD       4K
+``0x00_8000_0000`` ``0x00_FFFF_FFFF`` DRAM1            2G
+``0x05_0000_0000`` ``0x05_07FF_FFFF`` QMAN S/W Portal  128M
+``0x05_0800_0000`` ``0x05_0FFF_FFFF`` BMAN S/W Portal  128M
+``0x08_8000_0000`` ``0x09_FFFF_FFFF`` DRAM2            6G
+``0x40_0000_0000`` ``0x47_FFFF_FFFF`` PCI Express1     32G
+``0x48_0000_0000`` ``0x4F_FFFF_FFFF`` PCI Express2     32G
+``0x50_0000_0000`` ``0x57_FFFF_FFFF`` PCI Express3     32G
+================== ================== ================ =====
+
+QSPI flash map
+--------------
+
+================== ================== ================== =====
+Start Address      End Address        Description        Size
+================== ================== ================== =====
+``0x00_4000_0000`` ``0x00_400F_FFFF`` RCW + PBI          1M
+``0x00_4010_0000`` ``0x00_402F_FFFF`` U-Boot             2M
+``0x00_4030_0000`` ``0x00_403F_FFFF`` U-Boot Env         1M
+``0x00_4040_0000`` ``0x00_405F_FFFF`` PPA                2M
+``0x00_4060_0000`` ``0x00_408F_FFFF`` Secure boot header 3M
+                                      + bootscript
+``0x00_4090_0000`` ``0x00_4093_FFFF`` FMan ucode         256K
+``0x00_4094_0000`` ``0x00_4097_FFFF`` QE/uQE firmware    256K
+``0x00_4098_0000`` ``0x00_40FF_FFFF`` Reserved           6M
+``0x00_4100_0000`` ``0x00_43FF_FFFF`` FIT Image          48M
+================== ================== ================== =====
+
+Booting Options
+---------------
+
+NB: The reference manual documents the RCW source with the *least-significant
+bit first*.
+
+QSPI boot
+^^^^^^^^^
+
+This is the default. ``{ SW5[0:8], SW4[0] }`` should be ``0010_0010_0``.
+
+SD boot and eMMC boot
+^^^^^^^^^^^^^^^^^^^^^
+
+``{ SW5[0:8], SW4[0] }`` should be ``0010_0000_0``. eMMC is selected only if
+there is no SD card in the slot.
+
+.. _ls1046ardb_jtag:
+
+JTAG boot
+^^^^^^^^^
+
+To recover a bricked board, or to perform initial programming, the ls1046
+supports using two hard-coded Reset Configuration Words (RCWs). Unfortunately,
+this configuration disables most functionality, including the uarts and ethernet.
+However, the SD/MMC and flash controllers are still functional. To get around
+the lack of a serial console, we will use ARM semihosting instead. When
+enabled, OpenOCD will interpret certain instructions as calls to the host
+operating system. This allows U-Boot to use the console, read/write files, or
+run arbitrary commands (!).
+
+When configuring U-Boot, ensure that ``CONFIG_SEMIHOSTING``,
+``CONFIG_SPL_SEMIHOSTING``, and ``CONFIG_SEMIHOSTING_SERIAL`` are enabled.
+``{ SW5[0:8], SW4[0] }`` should be ``0100_1111_0``. Additionally, ``SW4[7]``
+should be set to ``0``. Connect to the "console" USB connector on the front of
+the enclosure.
+
+Create a new file called ``u-boot.tcl`` (or whatever you choose) with the
+following contents::
+
+    # Load the configuration for the LS1046ARDB
+    source [find board/nxp_rdb-ls1046a.cfg]
+    # Initialize the scan chain
+    init
+    # Stop the processor
+    halt
+    # Enable semihosting
+    arm semihosting enable
+    # Load U-Boot SPL
+    load_image spl/u-boot-spl 0 elf
+    # Start executing SPL at the beginning of OCRAM
+    resume 0x10000000
+
+Then, launch openocd like::
+
+    openocd -f u-boot.tcl
+
+You should see the U-boot SPL banner followed by the banner for U-Boot proper
+in the output of openocd. The CMSIS-DAP adapter is slow, so this can take a
+long time. If you don't see it, something has gone wrong. After a while, you
+should see the prompt. You can load an image using semihosting by running::
+
+    => load hostfs - $loadaddr <name of file>
+
+Note that openocd's terminal is "cooked," so commands will only be sent to
+U-Boot when you press enter, and all commands will be echoed twice.
+Additionally, openocd will block when waiting for input, ignoring gdb, JTAG
+events, and Ctrl-Cs. To make openocd process these events, just hit enter.
+
+Using an external JTAG adapter
+""""""""""""""""""""""""""""""
+
+The CMSIS-DAP adapter can be rather slow. To speed up booting, use an external
+JTAG adapter. The following examples assume you are using a J-Link, though any
+adapter supported by OpenOCD will do. Ensure that ``SW4[7]`` is ``1``. Attach
+your jtag adapter to J22. Modify ``u-boot.tcl`` and replace the first two lines
+with the following::
+
+    # Load the J-Link configuration (or whatever your adapter is)
+    source [find interface/jlink.cfg]
+    # Use JTAG, since the J-Link also supports SWD
+    transport select jtag
+    # The reset pin resets the whole CPU
+    reset_config srst_only
+    # Load the LS1046A config
+    source [find target/ls1046a.cfg]
+
+You can proceed as normal through the rest of the steps above. I got a speedup
+of around 100x by using a J-Link.
+
+Debug UART
+----------
+
+To enable the debug UART, enable the following config options::
+
+    CONFIG_DEBUG_UART_NS16550=y
+    CONFIG_DEBUG_UART_BASE=0x21c0500
+    CONFIG_DEBUG_UART_CLOCK=300000000
diff --git a/doc/usage/index.rst b/doc/usage/index.rst
index 5b42579dfc6..3e520530c62 100644
--- a/doc/usage/index.rst
+++ b/doc/usage/index.rst
@@ -11,6 +11,7 @@ Use U-Boot
    netconsole
    partitions
    cmdline
+   semihosting
 
 Shell commands
 --------------
diff --git a/doc/usage/semihosting.rst b/doc/usage/semihosting.rst
new file mode 100644
index 00000000000..6a280b455e0
--- /dev/null
+++ b/doc/usage/semihosting.rst
@@ -0,0 +1,107 @@
+.. SPDX-License-Identifier: GPL-2.0+
+.. Copyright 2014 Broadcom Corporation.
+
+Semihosting
+===========
+
+Semihosting is ARM's way of having a real or virtual target communicate
+with a host or host debugger for basic operations such as file I/O,
+console I/O, etc. Please see `Arm's semihosting documentation
+<https://developer.arm.com/documentation/100863/latest/>`_ for more
+information.
+
+Platform Support
+----------------
+
+Versatile Express
+^^^^^^^^^^^^^^^^^
+
+For developing on armv8 virtual fastmodel platforms, semihosting is a
+valuable tool since it allows access to image/configuration files before
+eMMC or other NV media are available.
+
+There are two main ARM virtual Fixed Virtual Platform (FVP) models,
+`Versatile Express (VE) FVP and BASE FVP
+<http://www.arm.com/products/tools/models/fast-models/foundation-model.php>`_.
+The initial vexpress64 u-boot board created here runs on the VE virtual
+platform using the license-free Foundation_v8 simulator. Fortunately,
+the Foundation_v8 simulator also supports the BASE_FVP model which
+companies can purchase licenses for and contain much more functionality.
+So we can, in U-Boot, run either model by either using the VE FVP (default),
+or turning on ``CONFIG_BASE_FVP`` for the more full featured model.
+
+Rather than create a new armv8 board similar to ``armltd/vexpress64``, add
+semihosting calls to the existing one, enabled with ``CONFIG_SEMIHOSTING``
+and ``CONFIG_BASE_FVP`` both set. Also reuse the existing board config file
+vexpress_aemv8.h but differentiate the two models by the presence or
+absence of ``CONFIG_BASE_FVP``. This change is tested and works on both the
+Foundation and Base fastmodel simulators.
+
+QEMU
+^^^^
+
+Another ARM emulator which supports semihosting is `QEMU
+<https://www.qemu.org/>`_. To enable semihosting, enable
+``CONFIG_SERIAL_PROBE_ALL`` when configuring U-Boot, and use
+``-semihosting`` when invoking QEMU. Adding ``-nographic`` can also be
+helpful. When using a semihosted serial console, QEMU will block waiting
+for input. This will cause the GUI to become unresponsive. To mitigate
+this, try adding ``-nographic``. For more information about building and
+running QEMU, refer to the :doc:`board documentation
+<../board/emulation/qemu-arm>`.
+
+OpenOCD
+^^^^^^^
+
+Any ARM platform can use semihosting with an attached debugger. One such
+debugger with good support for a variety of boards and JTAG adapters is
+`OpenOCD <https://openocd.org/>`_. Semihosting is not enabled by default,
+so you will need to enable it::
+
+    $ openocd -f <your board config> -c init -c halt -c \
+          'arm semihosting enable' -c resume
+
+Note that enabling semihosting can only be done after attaching to the
+board with ``init``, and must be done while the CPU is halted. For a more
+extended example, refer to the :ref:`LS1046ARDB docs <ls1046ardb_jtag>`.
+
+Loading files
+-------------
+
+The semihosting code adds a "semihosting filesystem"::
+
+  load hostfs - <address> <image>
+
+That will load an image from the host filesystem into RAM at the specified
+address. If you are using U-Boot SPL, you can also use ``BOOT_DEVICE_SMH``
+which will load ``CONFIG_SPL_FS_LOAD_PAYLOAD_NAME``.
+
+Host console
+------------
+
+U-Boot can use the host's console instead of a physical serial device by
+enabling ``CONFIG_SERIAL_SEMIHOSTING``. If you don't have
+``CONFIG_DM_SERIAL`` enabled, make sure you disable any other serial
+drivers.
+
+Migrating from ``smhload``
+--------------------------
+
+If you were using the ``smhload`` command, you can migrate commands like::
+
+    smhload <file> <address> [<end var>]
+
+to a generic load command like::
+
+    load hostfs - <address> <file>
+
+The ``load`` command will set the ``filesize`` variable with the size of
+the file. The ``fdt chosen`` command has been updated to take a size
+instead of an end address. If you were adding the initramfs to your device
+tree like::
+
+    fdt chosen <address> <end var>
+
+you can now run::
+
+    fdt chosen <address> $filesize