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authorTom Rini <[email protected]>2025-12-08 15:10:53 -0600
committerTom Rini <[email protected]>2025-12-08 15:10:53 -0600
commite09d04dae5aaef5cda6b648c9c0b8282fce05559 (patch)
treed60e6b3fd860a23cd75caf26281a1a666f50c8de /drivers
parent59202e5ae76ef3acb34c4236e43248f1cd3fc642 (diff)
parent2da2c01cd1238e210009c4aea5d429bea431754d (diff)
Merge branch 'next' of https://source.denx.de/u-boot/custodians/u-boot-riscv into next
CI: https://source.denx.de/u-boot/custodians/u-boot-riscv/-/pipelines/28674 - riscv: Implement private GCC library - mpfs: Add MPFS CPU Implementation - andes: Stop disabling device tree relocation and some minor fixes - sifive: Stop disabling device tree relocation - starfive: Cleanup size types and typos
Diffstat (limited to 'drivers')
-rw-r--r--drivers/ram/starfive/ddrcsr_boot.c3
-rw-r--r--drivers/ram/starfive/ddrphy_start.c1
-rw-r--r--drivers/ram/starfive/starfive_ddr.c5
-rw-r--r--drivers/ram/starfive/starfive_ddr.h1
4 files changed, 2 insertions, 8 deletions
diff --git a/drivers/ram/starfive/ddrcsr_boot.c b/drivers/ram/starfive/ddrcsr_boot.c
index 6764b3ed5cc..ece6f5aae94 100644
--- a/drivers/ram/starfive/ddrcsr_boot.c
+++ b/drivers/ram/starfive/ddrcsr_boot.c
@@ -231,7 +231,6 @@ void ddrcsr_boot(u32 *csrreg, u32 *secreg, u32 *phyreg, enum ddr_size_t size)
mask = REG8G;
break;
- case DDR_SIZE_16G:
default:
return;
};
@@ -260,7 +259,6 @@ void ddrcsr_boot(u32 *csrreg, u32 *secreg, u32 *phyreg, enum ddr_size_t size)
out_le32(csrreg + REGOFFSET(0x10), 0x3c);
break;
- case DDR_SIZE_16G:
default:
break;
};
@@ -286,7 +284,6 @@ void ddrcsr_boot(u32 *csrreg, u32 *secreg, u32 *phyreg, enum ddr_size_t size)
break;
case DDR_SIZE_2G:
- case DDR_SIZE_16G:
default:
break;
};
diff --git a/drivers/ram/starfive/ddrphy_start.c b/drivers/ram/starfive/ddrphy_start.c
index efe3f8a181a..f26bc9ccaad 100644
--- a/drivers/ram/starfive/ddrphy_start.c
+++ b/drivers/ram/starfive/ddrphy_start.c
@@ -267,7 +267,6 @@ void ddr_phy_start(u32 *phyreg, enum ddr_size_t size)
mask = REG8G;
break;
- case DDR_SIZE_16G:
default:
return;
};
diff --git a/drivers/ram/starfive/starfive_ddr.c b/drivers/ram/starfive/starfive_ddr.c
index b31ed3bcf61..e151179398f 100644
--- a/drivers/ram/starfive/starfive_ddr.c
+++ b/drivers/ram/starfive/starfive_ddr.c
@@ -43,13 +43,12 @@ static int starfive_ddr_setup(struct udevice *dev, struct starfive_ddr_priv *pri
size = DDR_SIZE_4G;
break;
- case 0x200000000:
+ case SZ_8G:
size = DDR_SIZE_8G;
break;
- case 0x400000000:
default:
- pr_err("unsupport size %lx\n", priv->info.size);
+ pr_err("Unknown DDR size %lx\n", priv->info.size);
return -EINVAL;
}
diff --git a/drivers/ram/starfive/starfive_ddr.h b/drivers/ram/starfive/starfive_ddr.h
index c29d26b510c..3ab0b0e8fa6 100644
--- a/drivers/ram/starfive/starfive_ddr.h
+++ b/drivers/ram/starfive/starfive_ddr.h
@@ -48,7 +48,6 @@ enum ddr_size_t {
DDR_SIZE_2G,
DDR_SIZE_4G,
DDR_SIZE_8G,
- DDR_SIZE_16G,
};
void ddr_phy_train(u32 *phyreg);