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authorVenkatesh Yadav Abbarapu <[email protected]>2024-09-26 10:25:06 +0530
committerTom Rini <[email protected]>2024-10-09 09:01:54 -0600
commit217b0a28b6db3d664300f82df8e4cf342de3b8a0 (patch)
treef85da03b87b59ccf124d8332b6dc2e5c71506188 /include
parent34da258bb0465de4bf44dc8949a9536cc06bf725 (diff)
spi: zynqmp_gqspi: Add parallel memories support in GQSPI driver
Add support for parallel memories in zynqmp_gqspi.c driver. In case of parallel memories STRIPE bit is set and sent to the qspi ip, which will send data bits to both the flashes in parallel. However for few commands we should not use stripe, instead send same data to both the flashes. Those commands are exclueded by using zynqmp_qspi_update_stripe(). Also update copyright info for this file. Signed-off-by: Ashok Reddy Soma <[email protected]> Signed-off-by: Venkatesh Yadav Abbarapu <[email protected]>
Diffstat (limited to 'include')
-rw-r--r--include/spi.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/include/spi.h b/include/spi.h
index b7148864e78..3a92d02f215 100644
--- a/include/spi.h
+++ b/include/spi.h
@@ -38,6 +38,9 @@
#define SPI_DEFAULT_WORDLEN 8
+#define SPI_3BYTE_MODE 0x0
+#define SPI_4BYTE_MODE 0x1
+
/* SPI transfer flags */
#define SPI_XFER_STRIPE (1 << 6)
#define SPI_XFER_MASK (3 << 8)
@@ -172,6 +175,7 @@ struct spi_slave {
* at once.
*/
bool multi_cs_cap;
+ u32 bytemode;
};
/**